Charging and discharging control circuit, chip and charging and discharging circuit

Abstract

The utility model discloses a charge and discharge control circuit, a chip and a charge and discharge circuit, and the charge and discharge control circuit comprises a mode switching circuit which is connected with a mode control end, a time delay circuit and a grounding end, and is used for obtaining a mode control signal of the mode control end and outputting a mode switching signal corresponding to the mode control signal to the time delay circuit; the time-delay circuit is connected with the logic control circuit and is used for carrying out time-delay processing on the mode switching signal and outputting a time-delay switching signal to the logic control circuit; the logic control circuit is used for being connected with the charging and discharging switching circuit, entering a working mode corresponding to the delay switching signal according to the delay switching signal and controlling the charging and discharging switching circuit to work; the working modes comprise an over-discharge adjusting mode, a shipping mode and a charging and discharging forbidding mode. According to the technical scheme, multi-mode switching of the over-discharge adjusting mode, the shipping mode and the charging and discharging forbidding mode is achieved through the mode control signal of the mode control end, flexible use is facilitated, and the functions are comprehensive.

Description

Technical Field

[0001] This utility model relates to the field of battery technology, and in particular to a charge and discharge control circuit, a chip, and a charge and discharge circuit. Background Technology

[0002] With the continuous development of technology, charging and discharging devices such as power banks and lithium batteries are playing an increasingly important role in people's lives. To ensure the safety and reliability of these devices during use, charging and discharging control circuits have become a key component. However, most existing charging and discharging control circuits only have basic charging and discharging protection functions. For example, when the battery voltage or current exceeds a set threshold, the protection circuit will automatically cut off the power supply to prevent abnormal conditions such as overcharging, over-discharging, and overcurrent. This is insufficient to meet the diverse actual needs of customers. Utility Model Content

[0003] This utility model provides a charge / discharge control circuit, a chip, and a charge / discharge circuit to solve the problem of limited protection functions in existing charge / discharge control circuits.

[0004] A charging and discharging control circuit includes a mode switching circuit, a delay circuit, and a logic control circuit;

[0005] The mode switching circuit is connected to the mode control terminal, the delay circuit and the ground terminal, and is used to acquire the mode control signal of the mode control terminal and output the mode switching signal corresponding to the mode control signal to the delay circuit.

[0006] The delay circuit is connected to the logic control circuit and is used to delay the mode switching signal and output a delayed switching signal to the logic control circuit.

[0007] The logic control circuit is connected to the charge / discharge switch circuit and is used to enter the working mode corresponding to the delay switching signal according to the delay switching signal, and control the charge / discharge switch circuit to work in the working mode; the working modes include over-discharge adjustment mode, shipping mode and charge / discharge prohibition mode.

[0008] Furthermore, the mode switching circuit includes a port pull-down circuit, an over-discharge adjustment circuit, a shipping adjustment circuit, and a charge / discharge adjustment circuit;

[0009] The port pull-down circuit is connected in series between the mode control terminal and the ground terminal, and is connected to the pull-down control terminal and the first input terminal of the first comparator circuit. It is used to obtain the pull-down control signal of the pull-down control terminal, and output the pull-down signal corresponding to the mode control terminal to the over-amplification adjustment circuit according to the pull-down control signal and the mode control signal.

[0010] The over-amplification adjustment circuit is connected to the delay circuit and is used to output a first mode switching signal according to the pull-down signal;

[0011] The shipping adjustment circuit is connected to the over-discharge adjustment circuit and the delay circuit, and is used to output a second mode switching signal according to the first mode switching signal;

[0012] The charge / discharge adjustment circuit is connected to the power supply terminal, the mode control terminal, and the delay circuit, and is used to output a third mode switching signal according to the mode control signal.

[0013] Furthermore, the port pull-down circuit includes a first switching transistor and a first resistor circuit;

[0014] The first terminal of the first switch is connected to the mode control terminal, the second terminal of the first switch is connected to the ground terminal through the first resistor circuit, and the third terminal of the first switch is the pull-down control terminal, which is used to turn on or off according to the pull-down control signal.

[0015] The first resistor circuit is connected to the over-discharge adjustment circuit and is used to output the pull-down signal corresponding to the mode control terminal to the over-discharge adjustment circuit when the first switch is turned on.

[0016] Furthermore, the over-discharge adjustment circuit includes a first comparator;

[0017] The first input terminal of the first comparator is connected to the first resistor circuit, the second input terminal of the first comparator is used to connect to the first reference circuit, and the output terminal of the first comparator is connected to the delay circuit.

[0018] Furthermore, the shipping adjustment circuit includes a first inverter, a first transistor, a second transistor, a capacitor circuit, a Schmitt trigger, a first D flip-flop, a second D flip-flop, a third D flip-flop, a NAND gate circuit, and a second inverter;

[0019] The input terminal of the first inverter is connected to the over-amplifier adjustment circuit, and the output terminal of the first inverter is used to output the inverted signal corresponding to the first mode switching signal.

[0020] The first transistor and the second transistor are connected in series between the power supply terminal and ground; the control terminals of the first transistor and the second transistor are connected to the output terminal of the first inverter; the connection node between the first transistor and the second transistor is connected to the input terminal of the Schmitt trigger.

[0021] The first terminal of the capacitor circuit is connected to the connection node and the input terminal of the Schmitt trigger, and the second terminal of the capacitor circuit is grounded.

[0022] The output of the Schmitt trigger is connected to the input of the first D trigger;

[0023] The second output terminal of the first D flip-flop is connected to the input terminal of the second D flip-flop, the second output terminal of the second D flip-flop is connected to the input terminal of the third D flip-flop, and the control terminals of the first D flip-flop, the second D flip-flop, and the third D flip-flop are all connected to the output terminal of the first inverter.

[0024] The input terminal of the NAND gate is connected to the second output terminal of the first D flip-flop, the first output terminal of the second D flip-flop, and the second output terminal of the third D flip-flop; the output terminal of the NAND gate is connected to the input terminal of the second inverter.

[0025] The output of the second inverter is connected to the delay circuit.

[0026] Furthermore, the charge / discharge adjustment circuit includes a second comparator;

[0027] The first input terminal of the second comparator is connected to the mode control terminal, the second input terminal of the second comparator is connected to the power supply terminal, and the output terminal of the second comparator is connected to the delay circuit.

[0028] A charge / discharge control chip includes the charge / discharge control circuit described above.

[0029] A charging and discharging circuit includes a battery, a charging and discharging switch circuit, a main control circuit, and the aforementioned charging and discharging control chip.

[0030] The positive terminal of the battery is used to connect to the first load connection terminal, and the negative terminal of the battery is used to connect to the second load connection terminal.

[0031] The charge / discharge switch circuit is connected in series between the negative terminal of the battery and the second load connection terminal.

[0032] The main control circuit is connected to the battery and the charge / discharge control chip, and is used to output a mode control signal to the charge / discharge control chip.

[0033] The charge / discharge control chip is connected to the battery and the charge / discharge switch circuit, and is used to acquire the mode control signal, enter the working mode corresponding to the mode control signal, and control the charge / discharge switch circuit to work in the working mode; the working modes include over-discharge adjustment mode, shipping mode and charge / discharge prohibition mode.

[0034] Furthermore, the main control circuit includes a first diode, a second diode, a second switching transistor, and a second resistor circuit;

[0035] The cathode of the first diode is connected to the power supply terminal of the main control circuit, the anode of the first diode is connected to the cathode of the second diode, and the anode of the second diode is connected to the ground terminal of the main control circuit.

[0036] The first end of the second switching transistor is connected to the power supply terminal, and the second end of the second switching transistor is connected to the connection node between the first diode and the second diode through the second resistor circuit.

[0037] The connection node between the first diode and the second diode is connected to the charge / discharge control chip.

[0038] Furthermore, the charging and discharging circuit also includes a voltage regulator module;

[0039] The voltage regulator module is located between the positive terminal of the battery and the power supply terminal of the main control circuit.

[0040] The aforementioned charge / discharge control circuit, chip, and charge / discharge circuit include a mode switching circuit, a delay circuit, and a logic control circuit. The mode switching circuit is connected to the mode control terminal, the delay circuit, and the ground terminal. It is used to acquire the mode control signal from the mode control terminal and output a mode switching signal corresponding to the mode control signal to the delay circuit. The delay circuit is connected to the logic control circuit and is used to delay the mode switching signal, outputting a delayed switching signal to the logic control circuit to prevent misjudgment and improve the reliability of the delayed switching signal. The logic control circuit is connected to the charge / discharge switch circuit and is used to enter the working mode corresponding to the delayed switching signal according to the delayed switching signal, and control the operation of the charge / discharge switch circuit in this working mode. The working modes include over-discharge adjustment mode, shipping mode, and charge / discharge prohibition mode. Thus, through the mode control signal of the mode control terminal, multiple mode switching of over-discharge adjustment mode, shipping mode, and charge / discharge prohibition mode can be realized, which is convenient for flexible use and has comprehensive functions. Attached Figure Description

[0041] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments of this utility model will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a circuit diagram of a charging and discharging circuit in one embodiment of the present invention;

[0043] Figure 2 This is a schematic diagram of the charging and discharging circuit in one embodiment of the present invention;

[0044] Figure 3 This is another circuit diagram of the charging and discharging circuit in one embodiment of this utility model;

[0045] Figure 4 This is a circuit diagram of a port pull-down circuit in one embodiment of the present invention;

[0046] Figure 5 This is a circuit diagram of an over-discharge adjustment circuit in one embodiment of the present invention;

[0047] Figure 6 This is a circuit diagram of a shipping adjustment circuit in one embodiment of the present invention;

[0048] Figure 7 This is a circuit diagram of a charge / discharge adjustment circuit in one embodiment of the present invention;

[0049] Figure 8 This is a signal timing diagram of the charging and discharging circuit in one embodiment of the present invention.

[0050] In the diagram: 1. Battery; 2. Charge / discharge switch circuit; 3. Main control circuit; 4. Charge / discharge control chip; 41. Mode switching circuit; 411. Port pull-down circuit; 412. Over-discharge adjustment circuit; 413. Shipping adjustment circuit; 414. Charge / discharge adjustment circuit; 42. Delay circuit; 43. Logic control circuit; 44. Voltage detection circuit; 45. Current detection circuit. Detailed Implementation

[0051] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present utility model.

[0052] It should be understood that this invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this invention to those skilled in the art.

[0053] To fully understand this utility model, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by this utility model. Preferred embodiments of this utility model are described in detail below; however, in addition to these detailed descriptions, this utility model may have other embodiments.

[0054] This embodiment provides a charge / discharge control circuit, which is applied in a charge / discharge control chip 4. Exemplarily, this charge / discharge control chip 4 is used in a charge / discharge circuit to protect the battery 1 in the circuit from charge / discharge.

[0055] This embodiment provides a charge / discharge control circuit, such as... Figures 1 to 7 As shown, the circuit includes a mode switching circuit 41, a delay circuit 42, and a logic control circuit 43. The mode switching circuit 41 is connected to the mode control terminal CTL, the delay circuit 42, and the ground terminal VSS. It is used to acquire the mode control signal CTL from the mode control terminal CTL and output the mode switching signal corresponding to the mode control signal CTL to the delay circuit 42. The delay circuit 42 is connected to the logic control circuit 43 and is used to perform delay processing on the mode switching signal and output the delayed switching signal to the logic control circuit 43. The logic control circuit 43 is connected to the charge / discharge switch circuit 2 and is used to enter the working mode corresponding to the delayed switching signal according to the delayed switching signal, and control the charge / discharge switch circuit 2 to work in this working mode. The working modes include over-discharge adjustment mode, shipping mode, and charge / discharge prohibition mode.

[0056] The mode control signal CTL is used to control the switching of the operating mode of the charge / discharge control circuit. This mode control signal CTL can be user-defined and is sent to the mode switching circuit 41 via the main control circuit 3 in the charge / discharge circuit. For example, the main control circuit 3 includes an MCU (Microcontroller Unit).

[0057] As an example, the mode switching circuit 41 is connected to the mode control terminal CTL, the delay circuit 42, and the ground terminal VSS. It is used to acquire the mode control signal CTL from the mode control terminal CTL and output the mode switching signal corresponding to the mode control signal CTL to the delay circuit 42. In this example, the main control circuit 3 outputs the mode control signal CTL to the mode switching circuit 41 according to the user-defined configuration. After receiving the mode control signal CTL through the mode control terminal CTL, the mode switching circuit 41 processes the mode control signal CTL, such as filtering and parsing, and outputs the mode switching signal corresponding to the mode control signal CTL to the delay circuit 42.

[0058] As an example, delay circuit 42, connected to logic control circuit 43, is used to delay the mode switching signal and output a delayed switching signal to logic control circuit 43. In this example, delay circuit 42, connected to logic control circuit 43, is used to delay the mode switching signal and output a delayed switching signal to logic control circuit 43 to prevent misjudgment and improve the reliability of the delayed switching signal.

[0059] As an example, the logic control circuit 43 is connected to the charge / discharge switch circuit 2 and is used to enter the working mode corresponding to the delay switching signal according to the delay switching signal, and control the charge / discharge switch circuit 2 to work in the working mode; the working modes include over-discharge adjustment mode, shipping mode and charge / discharge prohibition mode.

[0060] For example, the charging and discharging circuit includes a battery 1, a charging and discharging switch circuit 2, a main control circuit 3, and the aforementioned charging and discharging control chip 4; the positive terminal of the battery 1 is used to connect to the first load connection terminal P+, and the negative terminal of the battery 1 is used to connect to the second load connection terminal P-; the charging and discharging switch circuit 2 is connected in series between the negative terminal of the battery 1 and the second load connection terminal P-; the main control circuit 3 is connected to the battery 1 and the charging and discharging control chip 4, and is used to output a mode control signal CTL to the charging and discharging control chip 4; the charging and discharging control chip 4 is connected to the battery 1 and the charging and discharging switch circuit 2, and is used to acquire the mode control signal CTL, enter the working mode corresponding to the mode control signal CTL, and control the charging and discharging switch circuit 2 to work in the working mode; the working modes include over-discharge adjustment mode, shipping mode, and charging and discharging prohibition mode.

[0061] Specifically, under normal operating conditions, the logic control circuit 43 in the charge / discharge control chip 4 controls the charge / discharge switch circuit 2 to turn on, allowing the battery 1 to perform normal charge / discharge.

[0062] As an example, when the logic control circuit 43 determines, based on the delay switching signal, that the CTL voltage of the mode control terminal CTL exceeds the first threshold voltage VH1 (e.g., 1.8V) and the duration exceeds the first preset time TH1 (e.g., 128ms), the logic control circuit 43 will enter the over-discharge adjustment mode. At this time, the over-discharge protection threshold of the logic control circuit 43 will be adjusted from the first protection threshold VOD1 (e.g., 2.6V) to the second protection threshold VOD2 (e.g., 2.1V). When it is determined that the CTL voltage of the mode control terminal CTL is lower than the first threshold voltage VH1 (e.g., 1.8V) and the duration exceeds the second preset time TRH1 (e.g., 1ms), the over-discharge protection threshold of the logic control circuit 43 will be restored from the second protection threshold VOD2 (e.g., 2.1V) to the first protection threshold VOD1 (e.g., 2.6V).

[0063] As an example, when the logic control circuit 43 determines, based on the delay switching signal, that the mode control signal CTL received by the mode control terminal CTL is three consecutive pulse signals, and the three pulse signals are a wide pulse, a narrow pulse, and a wide pulse respectively, it enters the shipping mode, shuts off the charging and discharging switch circuit 2, and enters an ultra-low power consumption state (less than 10nA). The high-level threshold of each pulse signal is a first threshold voltage VH1, and the high-level time of the wide pulse exceeds a third preset time T1. Further, the charging and discharging control circuit also includes a voltage detection circuit 44 and a current detection circuit 45. The first terminal of the voltage detection circuit 44 is connected to the power supply terminal VDD, which is used to connect to the positive terminal of battery 1. The second terminal of the voltage detection circuit 44 is connected to the delay circuit 42 to detect the voltage of battery 1. The first terminal of the current measurement circuit is connected to the current detection terminal VINI, which is used to connect to the charging and discharging switch circuit 2. The second terminal of the current measurement circuit is connected to the delay circuit 42 to detect the charging and discharging current of the charging and discharging switch circuit 2. The delay circuit 42 is used to delay the electrical signals detected by the voltage detection circuit 44 and the current detection circuit 45 before inputting them to the logic control circuit 43. For example... Figure 2 As shown, the power supply terminal VDD and the voltage detection terminal VM are connected in series with the third switch K3 and the resistor RVMS. When the logic control circuit 43 enters the shipping mode, the voltage of the voltage detection terminal VM is pulled up to the voltage of the power supply terminal VDD. When the first load connection terminal P+ and the second load connection terminal P- are connected to the charger (the voltage of the voltage detection terminal VM < the second threshold voltage VH2) and the duration exceeds the fourth preset time TRH2, the shipping mode is deactivated. The voltage detection terminal VM of the charge / discharge control chip 4 is connected to the second load connection terminal P- through the resistor R2.

[0064] As an example, when the logic control circuit 43 determines, based on the delay switching signal, that the voltage of the mode control terminal CTL exceeds the second threshold voltage VH2 (e.g., VDD) and the duration exceeds the fifth preset time TH2 (e.g., 256ms), the logic control circuit 43 will enter the charge / discharge prohibition mode, turning off the charge / discharge switch circuit 2, and the battery 1 cannot be charged or discharged. When the logic control circuit 43 determines that the voltage of the mode control terminal CTL is lower than the second threshold voltage VH2 (e.g., VDD) and the duration exceeds the sixth preset time TRH3 (e.g., 4ms), the logic control circuit 43 will exit the mode and turn on the charge / discharge switch circuit 2, allowing the battery 1 to charge and discharge.

[0065] In this embodiment, the charge / discharge control circuit includes a mode switching circuit 41, a delay circuit 42, and a logic control circuit 43. The mode switching circuit 41 is connected to the mode control terminal CTL, the delay circuit 42, and the ground terminal VSS. It is used to acquire the mode control signal CTL from the mode control terminal CTL and output the mode switching signal corresponding to the mode control signal CTL to the delay circuit 42. The delay circuit 42 is connected to the logic control circuit 43 and is used to delay the mode switching signal and output the delayed switching signal to the logic control circuit 43 to prevent misjudgment and improve the reliability of the delayed switching signal. The logic control circuit 43 is connected to the charge / discharge switch circuit 2 and is used to enter the working mode corresponding to the delayed switching signal according to the delayed switching signal, and control the charge / discharge switch circuit 2 to work in this working mode. The working modes include over-discharge adjustment mode, shipping mode, and charge / discharge prohibition mode. Thus, through the mode control signal CTL from the mode control terminal CTL, multiple mode switching of over-discharge adjustment mode, shipping mode, and charge / discharge prohibition mode can be realized, which is convenient for flexible use and has comprehensive functions.

[0066] In one embodiment, the mode switching circuit 41 includes a port pull-down circuit 411, an over-discharge adjustment circuit 412, a shipping adjustment circuit 413, and a charge / discharge adjustment circuit 414. The port pull-down circuit 411 is connected in series between the mode control terminal CTL and the ground terminal VSS, and is connected to the pull-down control terminal CTL_GATE and the first input terminal of the first comparator circuit. It is used to acquire the pull-down control signal of the pull-down control terminal CTL_GATE, and output the pull-down signal corresponding to the mode control terminal CTL to the over-discharge adjustment circuit 412 according to the pull-down control signal and the mode control signal CTL. The over-discharge adjustment circuit 412 is connected to the delay circuit 42 and is used to output a first mode switching signal according to the pull-down signal. The shipping adjustment circuit 413 is connected to the over-discharge adjustment circuit 412 and the delay circuit 42 and is used to output a second mode switching signal according to the first mode switching signal. The charge / discharge adjustment circuit 414 is connected to the power supply terminal VDD, the mode control terminal CTL, and the delay circuit 42 and is used to output a third mode switching signal according to the mode control signal CTL.

[0067] The pull-down control signal is used to control the port pull-down circuit 411. For example, when the pull-down control signal is high, the port pull-down circuit 411 is turned on, and when the pull-down control signal is low, the port pull-down circuit 411 is turned off.

[0068] As an example, when the mode control terminal CTL outputs the mode control signal CTL, the pull-down effect of the port pull-down circuit 411 pulls the mode control signal CTL to the over-amplifier adjustment circuit 412 in the form of a pull-down signal. The over-amplifier adjustment circuit 412 determines whether the mode control signal CTL is a signal used to control the over-amplifier adjustment mode based on the pull-down signal. When it is determined that the mode control signal CTL is used to control the logic control circuit 43 to enter the over-amplifier adjustment mode, it outputs a first mode switching signal to the delay circuit 42. The delay circuit 42 performs delay processing on the first mode switching signal and then sends it to the logic control circuit 43, instructing the logic control circuit 43 to enter the over-amplifier adjustment mode.

[0069] As an example, the shipping adjustment circuit 413 receives the first mode switching signal output by the over-amplifier adjustment circuit 412, and determines whether the mode control signal CTL is a signal used to control the shipping mode based on the first mode switching signal. When it is determined that the mode control signal CTL is used to control the logic control circuit 43 to enter the shipping mode, the second mode switching signal is output to the delay circuit 42. The delay circuit 42 performs delay processing on the second mode switching signal and sends it to the logic control circuit 43, instructing the logic control circuit 43 to enter the shipping mode.

[0070] As an example, the charge / discharge adjustment circuit 414 receives the mode control signal CTL output by the mode control terminal CTL. Based on the voltage provided by the power supply terminal VDD, it determines whether the mode control signal CTL is a signal used to control the charge / discharge prohibition mode. When it is determined that the mode control signal CTL is used to control the logic control circuit 43 to enter the charge / discharge prohibition mode, it outputs a third mode switching signal to the delay circuit 42. The delay circuit 42 performs delay processing on the third mode switching signal and sends it to the logic control circuit 43, instructing the logic control circuit 43 to enter the charge / discharge prohibition mode.

[0071] In this embodiment, the mode control signal CTL is converted into a corresponding pull-down signal by the port pull-down circuit 411 and sent to the over-discharge adjustment circuit 412. The over-discharge adjustment circuit 412 outputs a first mode switching signal according to the pull-down signal, which is then output to the delay circuit 42 and the shipping adjustment circuit 413 respectively. The shipping adjustment circuit 413 outputs a second mode switching signal according to the first mode switching signal. The charge and discharge adjustment circuit 414 outputs a third mode switching signal according to the mode control signal CTL. Thus, the over-discharge adjustment circuit 412, the shipping adjustment circuit 413, and the charge and discharge adjustment circuit 414 respectively identify the mode control signal CTL, and the delay circuit 42 performs delay processing on the first mode switching signal, the second mode switching signal, and the third mode switching signal, instructing the logic control circuit 43 to enter the over-discharge adjustment mode, the shipping mode, or the charge and discharge prohibition mode.

[0072] In one embodiment, the port pull-down circuit 411 includes a first switching transistor and a first resistor circuit; the first terminal of the first switching transistor is connected to the mode control terminal CTL, the second terminal of the first switching transistor is connected to the ground terminal VSS through the first resistor circuit, and the third terminal of the first switching transistor is the pull-down control terminal CTL_GATE, which is used to turn on or off according to the pull-down control signal; the first resistor circuit is connected to the over-amplification adjustment circuit 412, which is used to output the pull-down signal corresponding to the mode control terminal CTL to the over-amplification adjustment circuit 412 when the first switching transistor is turned on.

[0073] For example, the first switching transistor is a MOSFET.

[0074] As an example, the drain of the first switching transistor is connected to the mode control terminal CTL, the source of the first switching transistor is connected to the ground terminal VSS through a first resistor circuit, and the gate of the first switching transistor is the pull-down control terminal CTL_GATE, used to receive the pull-down control signal. Optionally, this pull-down control signal can be output to the gate of the first switching transistor through the main control circuit 3. Exemplarily, except in shipping mode, the pull-down control signal is high at all other times, and the first switching transistor is turned on. When entering shipping mode, the pull-down control signal is low, and the first switching transistor and the mode control terminal CTL are floating.

[0075] As an example, the first resistor circuit includes resistors R1 and R2 connected in series, and the connection node between resistors R1 and R2 is connected to the over-discharge adjustment circuit 412. The resistance values ​​of resistors R1 and R2 can be set based on practical experience and are not limited here.

[0076] In this embodiment, when the first switch is turned on, the pull-down signal corresponding to the mode control terminal CTL is output to the over-discharge adjustment circuit 412 through the voltage division effect of the first resistor circuit, so that the over-discharge adjustment circuit 412 can perform mode recognition. At the same time, the first mode switching signal is output to the shipping adjustment circuit 413, so that the shipping adjustment circuit 413 can perform mode recognition according to the first mode switching signal.

[0077] In one embodiment, the over-discharge adjustment circuit 412 includes a first comparator CMP1; the first input terminal CTL_DIV of the first comparator CMP1 is connected to the first resistor circuit, the second input terminal of the first comparator CMP1 is used to connect to the VREF first reference circuit, and the output terminal FOD_DET of the first comparator CMP1 is connected to the delay circuit 42.

[0078] The first reference circuit provides a reference voltage to the first comparator CMP1. For example, the first reference circuit provides a first threshold voltage VH1 in the above embodiment. In this example, the first reference circuit can be a reference circuit known to those skilled in the art, and is not limited thereto.

[0079] In this embodiment, the first comparator CMP1 receives the pull-down signal from the first resistor circuit, compares the pull-down signal with the first threshold voltage VH1 provided by the first reference circuit, determines whether the mode control signal CTL is used to instruct the logic control circuit 43 to enter the over-discharge adjustment mode, and outputs the first mode switching signal to the delay circuit 42. When the logic control circuit 43 determines, according to the delay switching signal, that the CTL voltage of the mode control terminal CTL exceeds the first threshold voltage VH1 (e.g., 1.8V) and the duration exceeds the first preset time TH1 (e.g., 128ms), the logic control circuit 43 will enter the over-discharge adjustment mode.

[0080] In one embodiment, the shipping adjustment circuit 413 includes a first inverter Q1, a first transistor PM1, a second transistor NM1, a capacitor circuit, a Schmitt trigger Q2, a first D flip-flop Q3, a second D flip-flop Q4, a third D flip-flop Q5, a NAND gate circuit Q6, and a second inverter Q7. The input terminal of the first inverter Q1 is connected to the over-amplification adjustment circuit 412 (the output terminal FOD_DET of the first comparator CMP1), and the output terminal of the first inverter Q1 is used to output the inverted signal corresponding to the first mode switching signal. The first transistor PM1 and the second transistor NM1 are connected in series between the power supply terminal VDD and ground. The control terminals of the first transistor PM1 and the second transistor NM1 are connected to the output terminal of the first inverter Q1. The connection node between the first transistor PM1 and the second transistor NM1 is connected to the input terminal of the Schmitt trigger Q2. The first terminal of the capacitor circuit is connected to the connection node and the input terminal of the Schmitt trigger Q2, and the second terminal of the capacitor circuit is grounded. The output terminal of the Schmitt trigger Q2 is connected to the input terminal of the first D flip-flop Q3. The second output terminal Q7 of the first D flip-flop Q3 is connected to the input terminal of the first D flip-flop Q3. <0> The second output terminal Q of the second D flip-flop Q4 is connected to the input terminal of the second D flip-flop Q4. <1> The control terminals of the first D flip-flop Q3, the second D flip-flop Q4, and the third D flip-flop Q5 are all connected to the output terminal of the first inverter Q1; the input terminal of the NAND gate Q6 is connected to the second output terminal Q of the first D flip-flop Q3. <0> The first output terminal NQ of the second D flip-flop Q4 <0> and the second output terminal Q of the third D flip-flop Q5 <2> The output of the NAND gate Q6 is connected to the input of the second inverter Q7; the output of the second inverter Q7, SM_DET, is connected to the delay circuit 42.

[0081] Among them, the first transistor PM1 is a PMOS transistor, and the second transistor NM1 is an NMOS transistor.

[0082] As an example, the source of the first transistor PM1 is connected to the power supply terminal VDD through the current source I1, the drain of the first transistor PM1 is connected to the drain of the second transistor NM1, and the source of the second transistor NM1 is grounded.

[0083] As an example, the capacitor circuit includes capacitor C1, the value of which can be set based on practical experience and is not limited here.

[0084] In this example, during normal operation, the first mode switching signal is low, and after passing through the first inverter Q1, it outputs a high level. The second transistor NM1 is turned on, the first transistor PM1 is turned off, and the connection node between the first transistor PM1 and the second transistor NM1 is low. This outputs a low-level signal after passing through the Schmitt trigger Q2. At this time, the second output terminal Q of the first D flip-flop Q3... <0> The second output terminal Q of the second D flip-flop Q4 <1> and the second output terminal Q of the third D flip-flop Q5 <2> All are at low level. When the voltage of the mode control signal CTL exceeds the second output terminal VH1 of the second D flip-flop Q4 (i.e., the first mode switching signal is high level), it outputs a low level after passing through the first inverter Q1. The first transistor PM1 is turned on, and the second transistor NM1 is turned off. At this time, the current from the current source I1 charges the capacitor C1 in the capacitor circuit. Let the voltage at the connection node between the first transistor PM1 and the second transistor NM1 be VN1, the current from the current source I1 be I1, the charging time of capacitor C1 be t, and the capacitance of capacitor C1 be C1. Therefore, the voltage at the connection node between the first transistor PM1 and the second transistor NM1 rises linearly. When the voltage at the connection node between the first transistor PM1 and the second transistor NM1 is greater than the switching threshold voltage VTH and the holding time is greater than the preset switching time TS, the Schmitt trigger Q2 outputs a high-level signal. When the voltage at the connection node between the first transistor PM1 and the second transistor NM1 is greater than the switching threshold voltage VTH and the holding time is not greater than the preset switching time TS, the Schmitt trigger Q2 outputs a low-level signal. Therefore, when the voltage at the connection node between the first transistor PM1 and the second transistor NM1 is greater than the switching threshold voltage VTH and the holding time is less than the preset switching time TS, the Schmitt trigger Q2 is a low-level signal. When the mode control signal CTL is at the falling edge, the second output terminal Q of the first D flip-flop Q3... <0> The output is low. When the high-level time of the mode control signal CTL (i.e., the holding time when the voltage at the connection node between the first transistor PM1 and the second transistor NM1 is greater than the flip-flop threshold voltage VTH) is greater than the preset flip-flop time TS, the Schmitt trigger Q2 outputs a high-level signal. When the mode control signal CTL is at the falling edge, the second output terminal Q of the first D flip-flop Q3 is low. <0> It is a high level.

[0085] Therefore, as Figure 8 As shown, when the mode control signal CTL is three consecutive pulse signals, and the three pulse signals are a wide pulse, a narrow pulse, and a wide pulse, respectively. After the high level time of the first pulse signal of the mode control signal CTL exceeds the preset toggle time TS, when the falling edge of the first pulse signal arrives, the second output terminal Q of the first D flip-flop Q3... <0> When the voltage is high, the second output terminal Q of the second D flip-flop Q4 is high. <1> and the second output terminal Q of the third D flip-flop Q5 <2> The level is low; when the high-level time of the second pulse signal of the mode control signal CTL is less than the preset toggle time TS, and the falling edge of the second pulse signal arrives, the second output terminal Q of the first D flip-flop Q3 is low. <0> When the level is low, the second output terminal Q of the second D flip-flop Q4 is... <1> When the voltage level is high, the second output terminal Q of the third D flip-flop Q5 is... <2> The level is low; when the high-level time of the third pulse signal of the mode control signal CTL is greater than the preset toggle time TS, and the falling edge of the third pulse signal arrives, the second output terminal Q of the first D flip-flop Q3 is low. <0> When the voltage is high, the second output terminal Q of the second D flip-flop Q4 is high. <1> When the level is low, the second output terminal Q of the third D flip-flop Q5 is... <2> The signal is at a high level. After being processed by the NAND gate Q6 and the second inverter Q7, the second inverter Q7 outputs a high-level signal to the delay circuit 42. The delay circuit 42 delays the high-level signal and outputs it to the logic control circuit 43. The logic control circuit 43 controls the charge / discharge switch circuit 2 to disconnect through the discharge control terminal DO, so that the logic control circuit 43 enters the shipping mode.

[0086] In one embodiment, the charge / discharge adjustment circuit 414 includes a second comparator CMP2; the first input terminal of the second comparator CMP2 is connected to the mode control terminal CTL, the second input terminal of the second comparator CMP2 is connected to the power supply terminal VDD, and the output terminal Forbid_DET of the second comparator CMP2 is connected to the delay circuit 42.

[0087] In this embodiment, when the voltage of the mode control signal CTL is greater than the voltage of the power supply terminal VDD, the second comparator CMP2 outputs a high-level signal, namely the third mode switching signal, to the delay circuit 42. After the delay circuit 42 performs delay processing on the third mode switching signal, it outputs it to the logic control circuit 43 so that the logic control circuit 43 enters the charging and discharging prohibition mode.

[0088] This embodiment provides a charge / discharge control chip 4, including the charge / discharge control circuit described above. In this embodiment, by integrating the charge / discharge control circuit into the charge / discharge control chip 4, the integration level of the circuit is improved.

[0089] This embodiment provides a charging and discharging circuit, including a battery 1, a charging and discharging switch circuit 2, a main control circuit 3, and the aforementioned charging and discharging control chip 4. The positive terminal of the battery 1 is connected to the first load connection terminal P+, and the negative terminal of the battery 1 is connected to the second load connection terminal P-. The charging and discharging switch circuit 2 is connected in series between the negative terminal of the battery 1 and the second load connection terminal P-. The main control circuit 3 is connected to the battery 1 and the charging and discharging control chip 4, and is used to output a mode control signal CTL to the charging and discharging control chip 4. The charging and discharging control chip 4 is connected to the battery 1 and the charging and discharging switch circuit 2, and is used to acquire the mode control signal CTL, enter the working mode corresponding to the mode control signal CTL, and control the charging and discharging switch circuit 2 to work in the working mode. The working modes include over-discharge adjustment mode, shipping mode, and charging and discharging prohibition mode.

[0090] In this embodiment, by configuring the mode control signal CTL, the charge and discharge control chip 4 can recognize the mode control signal CTL and enter the over-discharge adjustment mode, the shipping mode, or the charge and discharge prohibition mode. Thus, by using the mode control signal CTL at the mode control terminal CTL, multiple mode switching between over-discharge adjustment mode, shipping mode, and charge and discharge prohibition mode can be realized, which is convenient for flexible use and has comprehensive functions.

[0091] Furthermore, the charge / discharge switch circuit 2 includes a discharge switch transistor M1 and a charge switch transistor M2. The discharge switch transistor M1, the charge switch transistor M2, and the current sensing resistor Rs are connected in series between the negative terminal of battery 1 and the second load connection terminal P-. The current detection terminal VINI of the charge / discharge control chip 4 is connected to the connection node between the current sensing resistor Rs and the discharge switch transistor M1. The discharge control terminal DO of the charge / discharge control chip 4 is connected to the control terminal of the discharge switch transistor M1, and the charge control terminal CO of the charge / discharge control chip 4 is connected to the control terminal of the charge switch transistor M2. Both the discharge switch transistor M1 and the charge switch transistor M2 are MOSFETs.

[0092] In one embodiment, the main control circuit 3 includes a first diode D1, a second diode D2, a second switch K2, and a second resistor circuit; the cathode of the first diode D1 is connected to the power supply terminal of the main control circuit 3, the anode of the first diode D1 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the ground terminal VSS of the main control circuit 3; the first terminal of the second switch K2 is connected to the power supply terminal, and the second terminal of the second switch K2 is connected to the connection node between the first diode D1 and the second diode D2 through the second resistor circuit; the connection node between the first diode D1 and the second diode D2 is connected to the charge / discharge control chip 4.

[0093] In this embodiment, when it is necessary to control the charge / discharge control chip 4 to enter the charge / discharge prohibition mode, the second switch K2 is turned on, so that the voltage of the mode control terminal CTL (i.e., the mode control signal CTL) of the second comparator CMP2 in the charge / discharge adjustment circuit 414 of the charge / discharge control chip 4 is greater than the voltage of the power supply terminal VDD, thereby controlling the charge / discharge control chip 4 to enter the charge / discharge prohibition mode.

[0094] In one embodiment, the charging and discharging circuit further includes a voltage regulator module LDO; the voltage regulator module LDO is disposed between the positive terminal of the battery 1 and the power supply terminal of the main control circuit 3, so as to provide a stable voltage of the mode control terminal CTL to the charging and discharging control chip 4.

[0095] The above-described embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model, and should all be included within the protection scope of this utility model.

Claims

1. A charging and discharging control circuit, characterized in that, Includes mode switching circuits, delay circuits, and logic control circuits; The mode switching circuit is connected to the mode control terminal, the delay circuit and the ground terminal, and is used to acquire the mode control signal of the mode control terminal and output the mode switching signal corresponding to the mode control signal to the delay circuit. The delay circuit is connected to the logic control circuit and is used to delay the mode switching signal and output a delayed switching signal to the logic control circuit. The logic control circuit is connected to the charge / discharge switch circuit and is used to enter the working mode corresponding to the delay switching signal according to the delay switching signal, and control the charge / discharge switch circuit to work in the working mode; the working modes include over-discharge adjustment mode, shipping mode and charge / discharge prohibition mode.

2. The charging and discharging control circuit as described in claim 1, characterized in that, The mode switching circuit includes a port pull-down circuit, an over-discharge adjustment circuit, a shipping adjustment circuit, and a charge / discharge adjustment circuit; The port pull-down circuit is connected in series between the mode control terminal and the ground terminal, and is connected to the pull-down control terminal and the first input terminal of the first comparator circuit. It is used to obtain the pull-down control signal of the pull-down control terminal, and output the pull-down signal corresponding to the mode control terminal to the over-amplification adjustment circuit according to the pull-down control signal and the mode control signal. The over-amplification adjustment circuit is connected to the delay circuit and is used to output a first mode switching signal according to the pull-down signal; The shipping adjustment circuit is connected to the over-discharge adjustment circuit and the delay circuit, and is used to output a second mode switching signal according to the first mode switching signal; The charge / discharge adjustment circuit is connected to the power supply terminal, the mode control terminal, and the delay circuit, and is used to output a third mode switching signal according to the mode control signal.

3. The charging and discharging control circuit as described in claim 2, characterized in that, The port pull-down circuit includes a first switching transistor and a first resistor circuit; The first terminal of the first switch is connected to the mode control terminal, the second terminal of the first switch is connected to the ground terminal through the first resistor circuit, and the third terminal of the first switch is the pull-down control terminal, which is used to turn on or off according to the pull-down control signal. The first resistor circuit is connected to the over-discharge adjustment circuit and is used to output the pull-down signal corresponding to the mode control terminal to the over-discharge adjustment circuit when the first switch is turned on.

4. The charge / discharge control circuit as described in claim 3, characterized in that, The over-discharge adjustment circuit includes a first comparator; The first input terminal of the first comparator is connected to the first resistor circuit, the second input terminal of the first comparator is used to connect to the first reference circuit, and the output terminal of the first comparator is connected to the delay circuit.

5. The charge / discharge control circuit as described in claim 2, characterized in that, The shipping adjustment circuit includes a first inverter, a first transistor, a second transistor, a capacitor circuit, a Schmitt trigger, a first D flip-flop, a second D flip-flop, a third D flip-flop, a NAND gate circuit, and a second inverter. The input terminal of the first inverter is connected to the over-amplifier adjustment circuit, and the output terminal of the first inverter is used to output the inverted signal corresponding to the first mode switching signal. The first transistor and the second transistor are connected in series between the power supply terminal and ground; the control terminals of the first transistor and the second transistor are connected to the output terminal of the first inverter; the connection node between the first transistor and the second transistor is connected to the input terminal of the Schmitt trigger. The first terminal of the capacitor circuit is connected to the connection node and the input terminal of the Schmitt trigger, and the second terminal of the capacitor circuit is grounded. The output of the Schmitt trigger is connected to the input of the first D trigger; The second output terminal of the first D flip-flop is connected to the input terminal of the second D flip-flop, the second output terminal of the second D flip-flop is connected to the input terminal of the third D flip-flop, and the control terminals of the first D flip-flop, the second D flip-flop, and the third D flip-flop are all connected to the output terminal of the first inverter. The input terminal of the NAND gate is connected to the second output terminal of the first D flip-flop, the first output terminal of the second D flip-flop, and the second output terminal of the third D flip-flop; the output terminal of the NAND gate is connected to the input terminal of the second inverter. The output of the second inverter is connected to the delay circuit.

6. The charge / discharge control circuit as described in claim 2, characterized in that, The charge / discharge adjustment circuit includes a second comparator; The first input terminal of the second comparator is connected to the mode control terminal, the second input terminal of the second comparator is connected to the power supply terminal, and the output terminal of the second comparator is connected to the delay circuit.

7. A charge / discharge control chip, characterized in that, Includes the charge / discharge control circuit as described in any one of claims 1 to 6.

8. A charging and discharging circuit, characterized in that, Includes a battery, a charge / discharge switch circuit, a main control circuit, and a charge / discharge control chip as described in claim 7; The positive terminal of the battery is used to connect to the first load connection terminal, and the negative terminal of the battery is used to connect to the second load connection terminal. The charge / discharge switch circuit is connected in series between the negative terminal of the battery and the second load connection terminal. The main control circuit is connected to the battery and the charge / discharge control chip, and is used to output a mode control signal to the charge / discharge control chip. The charge / discharge control chip is connected to the battery and the charge / discharge switch circuit, and is used to acquire the mode control signal, enter the working mode corresponding to the mode control signal, and control the charge / discharge switch circuit to work in the working mode; the working modes include over-discharge adjustment mode, shipping mode and charge / discharge prohibition mode.

9. The charging and discharging circuit as described in claim 8, characterized in that, The main control circuit includes a first diode, a second diode, a second switching transistor, and a second resistor circuit. The cathode of the first diode is connected to the power supply terminal of the main control circuit, the anode of the first diode is connected to the cathode of the second diode, and the anode of the second diode is connected to the ground terminal of the main control circuit. The first end of the second switching transistor is connected to the power supply terminal, and the second end of the second switching transistor is connected to the connection node between the first diode and the second diode through the second resistor circuit. The connection node between the first diode and the second diode is connected to the charge / discharge control chip.

10. The charging and discharging circuit as described in claim 9, characterized in that, The charging and discharging circuit also includes a voltage regulator module; The voltage regulator module is located between the positive terminal of the battery and the power supply terminal of the main control circuit.

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