Debugging serial port circuit

Abstract

The utility model relates to the technical field of electronic circuits, and provides a debugging serial port circuit which comprises a first switch, an analog switch chip, a microprocessor and a voltage stabilizer. The first end of the first switch is grounded, the second end of the first switch is connected with the Boot end of the microprocessor, the analog switch chip is provided with a first common end, a first normally-closed end and a first normally-open end which are matched with one another, the first common end is connected with a first capacitor, and the first normally-closed end is grounded. The second end of the first switch is connected with the first common end so as to control the first common end to be selectively connected with one of the first normally-closed end and the first normally-open end. The first normally open end is connected with the CE end of the voltage stabilizer, and the output end of the voltage stabilizer is electrically connected with the microprocessor. According to the debugging serial port circuit, the microprocessor can be controlled to be restarted from the working mode and enter the Boot mode only by operating on and off of the first switch, the operation process is simple, and the defects that in the prior art, when a conventional processor enters the Boot mode, the operation process is complex, and errors are prone to occurring are effectively overcome.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and in particular to a debugging serial port circuit. Background Technology

[0002] In related technologies, processors typically have two modes: operating mode and boot mode. In boot mode, the processor can be programmed and debugged. To control the switching between operating and boot modes, the processor usually has a boot pin. Upon power-up, the processor simultaneously detects the voltage level connected to the boot pin and determines whether to enter operating or boot mode based on this level. Generally, when the voltage level connected to the boot pin is pulled low, boot mode is entered.

[0003] In the control circuit of a conventional processor, there is usually a first switch to control the voltage level of the Boot pin, and a second switch to control the processor's power-on startup. When the processor enters Boot mode, the second switch must first be controlled to stop powering on the processor, then the first switch must be controlled to pull the voltage level of the Boot pin low. Next, the second switch must be controlled to power on the processor again. After the processor has completed its power-on startup and entered Boot mode, the first switch must be controlled to restore the voltage level of the Boot pin. The entire process requires operating two switches and carefully controlling the timing of these operations, making the procedure complex and prone to errors. Utility Model Content

[0004] This invention provides a debugging serial port circuit to solve the problem that the conventional processor's operation process for entering Boot mode is complex and prone to errors in the prior art.

[0005] This utility model provides a debugging serial port circuit, including: a first switch, an analog switch chip, a microprocessor, and a voltage regulator.

[0006] The first terminal of the first switch is grounded, and the second terminal of the first switch is connected to the Boot terminal of the microprocessor. The analog switch chip has a first common terminal, a first normally closed terminal, and a first normally open terminal that cooperate with each other. The first common terminal is connected to a first capacitor, and the first normally closed terminal is grounded. The second terminal of the first switch is connected to the first common terminal to control the selective connection of one of the first common terminal, the first normally closed terminal, and the first normally open terminal. The first normally open terminal is connected to the CE terminal of the voltage regulator, and the output terminal of the voltage regulator is electrically connected to the microprocessor.

[0007] According to the debugging serial port circuit of this utility model, a diode is installed on the connection line between the first switch and the Boot terminal of the microprocessor.

[0008] The debugging serial port circuit according to this utility model also includes a USB interface, and the microprocessor is connected to the USB interface through the analog switch chip.

[0009] According to the debugging serial port circuit of this utility model, the analog switch chip also has a second common terminal and a third common terminal. The RX port of the microprocessor is connected to the USB interface in a switchable manner through the second common terminal, and the TX port of the microprocessor is connected to the USB interface in a switchable manner through the third common terminal. The output terminal of the voltage regulator is connected to the second common terminal and the third common terminal respectively to control the connection and disconnection of the TX port and RX port of the microprocessor with the USB interface.

[0010] The debugging serial port circuit according to this utility model also includes a second switch, the first end of which is connected to the CE terminal of the voltage regulator, and the second end of which is grounded.

[0011] According to the debugging serial port circuit of this utility model, the microprocessor has a reset pin, and the first end of the second switch is connected to the reset pin.

[0012] The debugging serial port circuit according to this utility model further includes a first pull-up resistor, and the first end of the second switch is electrically connected to the first pull-up resistor.

[0013] The debugging serial port circuit according to this utility model also includes a second capacitor, the first end of the second capacitor is grounded, and the second end of the second capacitor is connected to the first end of the second switch.

[0014] According to the debugging serial port circuit of this utility model, the capacitance value of the second capacitor is less than the capacitance value of the first capacitor.

[0015] The debugging serial port circuit according to this utility model also includes a second pull-up resistor, and the second end of the first switch is electrically connected to the second pull-up resistor.

[0016] This invention relates to a debugging serial port circuit. By configuring a first switch, an analog switch chip, and a first capacitor in a coordinated manner, when the microprocessor is in operating mode, the first switch remains open, allowing the microprocessor's Boot terminal to connect to a high level, and controlling the analog switch chip to discharge the first capacitor. When it is necessary to switch the microprocessor to Boot mode, the user can turn on the first switch to connect the microprocessor's Boot terminal to a low level, and control the analog switch chip to connect the first capacitor to the CE terminal of the voltage regulator. This momentarily pulls down the CE terminal level, causing the voltage regulator to cut off power to the microprocessor. After a period of charging, the first capacitor restores the CE terminal level, allowing the voltage regulator to power on the microprocessor again. During the restart process, the microprocessor detects the low level at the Boot terminal and enters Boot mode.

[0017] As can be seen from the above, the debugging serial port circuit of this utility model can control the microprocessor to restart from the working mode and enter the boot mode simply by operating the first switch. The operation process is simple and effectively solves the defects of the conventional processor entering the boot mode in the prior art, which is complicated and prone to errors. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the debugging serial port circuit provided by this utility model.

[0020] Figure label:

[0021] 100. Debug the serial port circuit;

[0022] 111. First switch;

[0023] 112. Analog switch chip; 1121. First common terminal; 1122. First normally closed terminal; 1123. First normally open terminal; 1124. Second common terminal; 1125. Third common terminal;

[0024] 113. Microprocessor; 114. Voltage regulator; 115. First capacitor; 116. Diode; 117. USB interface; 118. Second switch; 119. First pull-up resistor; 120. Second capacitor; 121. Second pull-up resistor; 122. Third pull-up resistor. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0026] The following is combined with Figure 1 This invention describes the debugging serial port circuit.

[0027] like Figure 1As shown, this utility model provides a debugging serial port circuit 100, including: a first switch 111, an analog switch chip 112, a microprocessor 113, and a voltage regulator 114. The first terminal of the first switch 111 is grounded, and the second terminal of the first switch 111 is connected to the boot terminal of the microprocessor 113. The analog switch chip 112 has a first common terminal 1121, a first normally closed terminal 1122, and a first normally open terminal 1123 that cooperate with each other. A first capacitor 115 is connected to the first common terminal 1121, and the first normally closed terminal 1122 is grounded. The second terminal of the first switch 111 is connected to the first common terminal 1121 to control the selective connection of one of the first common terminal 1121, the first normally closed terminal 1122, and the first normally open terminal 1123. The first normally open terminal 1123 is connected to the CE terminal of the voltage regulator 114, and the output terminal of the voltage regulator 114 is electrically connected to the microprocessor 113.

[0028] Understandably, the voltage regulator 114 in this embodiment has an input terminal, an output terminal, a ground terminal, and a CE (Chip Enable) terminal. The input terminal is used to connect to an external power supply circuit, the output terminal is used to supply power to the microprocessor 113, and the ground terminal is used for grounding. The voltage regulator 114 can control its own operating state according to the voltage level connected to the CE terminal, and power supply or power off the microprocessor 113.

[0029] In this embodiment, the first terminal of the first switch 111 is grounded, and the second terminal is connected to both the Boot terminal of the microprocessor 113 and the first common terminal 1121 of the analog switch chip 112, so as to simultaneously control the access level of the Boot terminal of the microprocessor 113 and the connection state of the first common terminal 1121, thereby switching the microprocessor 113 from the working mode to the Boot mode.

[0030] Specifically, in the operating mode, the first switch 111 remains open, so that the input level of the Boot terminal is high. The first common terminal 1121 and the first normally closed terminal 1122 of the analog switch chip 112 are connected, thereby keeping the two ends of the first capacitor 115 grounded, and the voltage of the first capacitor 115 is zero. Furthermore, it is understood that the CE terminal of the voltage regulator 114 is connected to an external power supply circuit to maintain the input level of the CE terminal and to maintain the power supply of the voltage regulator 114 to the microprocessor 113.

[0031] When switching to Boot mode is required, the user can turn on the first switch 111. After the first switch 111 is turned on, the input level of the Boot terminal is pulled low. At the same time, the first common terminal 1121 of the analog switch chip 112 switches to be connected to the first normally open terminal 1123, thereby connecting one end of the first capacitor 115 to the CE terminal of the voltage regulator 114 through the first common terminal 1121 and the first normally open terminal 1123, momentarily pulling down the input level of the CE terminal, causing the voltage regulator 114 to cut off power to the microprocessor 113 and open the internal discharge circuit of the voltage regulator 114 to discharge the microprocessor 113. The external power supply circuit connected to the CE terminal can then gradually charge the first capacitor 115 until the voltage of the first capacitor 115 reaches the voltage of the CE terminal in the working mode. At this point, the voltage regulator 114 re-powers the microprocessor 113, thereby restarting the microprocessor 113. During the startup process, the microprocessor 113 detects that the input level of the Boot terminal is low, thus entering Boot mode. After the microprocessor 113 has finished starting up and entered Boot mode, the user can disconnect the first switch 111 again to reconnect the Boot terminal to a high level and re-ground the two ends of the first capacitor 115 to discharge the first capacitor 115.

[0032] The debugging serial port circuit 100 of this utility model, through the configuration of a first switch 111, an analog switch chip 112, and a first capacitor 115 working in concert, allows the first switch 111 to remain open when the microprocessor 113 is in working mode, ensuring that the boot terminal of the microprocessor 113 is connected to a high level, and controlling the analog switch chip 112 to discharge the first capacitor 115. When it is necessary to switch the microprocessor 113 to boot mode, the user can turn on the first switch 111 to ensure that the boot terminal of the microprocessor 113 is connected to a low level, and control the analog switch chip 112 to connect the first capacitor 115 to the CE terminal of the voltage regulator 114, momentarily pulling down the level of the CE terminal so that the voltage regulator 114 cuts off power to the microprocessor 113. After a period of charging, the first capacitor 115 can restore the level of the CE terminal, thereby allowing the voltage regulator 114 to resume powering on the microprocessor 113. During the restart process, the microprocessor 113 detects the low level of the boot terminal and enters boot mode.

[0033] As can be seen from the above, the debugging serial port circuit 100 of this utility model can control the microprocessor 113 to restart from the working mode and enter the boot mode simply by operating the first switch 111 to turn it on or off. The operation process is simple and effectively solves the defects of the conventional processor entering the boot mode in the prior art, which is complicated and prone to errors.

[0034] In some embodiments, such as Figure 1 As shown, a diode 116 is installed on the connection line between the first switch 111 and the Boot terminal of the microprocessor 113.

[0035] In this embodiment, diode 116 serves to isolate a high-level voltage between the first switch 111 and the Boot terminal. Specifically, when the first switch 111 is open, diode 116 is off, preventing the voltage across the first switch 111 from being applied to the Boot terminal and affecting the operation of the Boot terminal and the microprocessor 113. When the first switch 111 is on, the voltage across the first switch 111 is zero, and diode 116 is on, thereby pulling down the voltage level applied to the Boot terminal.

[0036] In some embodiments, such as Figure 1 As shown, the debugging serial port circuit 100 also includes a USB interface 117, and the microprocessor 113 is connected to the USB interface 117 through the analog switch chip 112.

[0037] In this embodiment, a USB interface 117 is provided to connect to the microprocessor 113. The USB interface 117 is used to connect to an external device with USB transmission function (such as a computer, USB memory, etc.) so that the user can use the external device to debug and program the microprocessor 113 through the USB interface 117.

[0038] In some embodiments, such as Figure 1 As shown, the analog switch chip 112 also has a second common terminal 1124 and a third common terminal 1125. The RX port of the microprocessor 113 is connected to the USB interface 117 in a switchable manner through the second common terminal 1124, and the TX port of the microprocessor 113 is connected to the USB interface 117 in a switchable manner through the third common terminal 1125. The output terminal of the voltage regulator 114 is connected to the second common terminal 1124 and the third common terminal 1125 respectively to control the switching of the TX port and RX port of the microprocessor 113 with the USB interface 117.

[0039] In this embodiment, the USB interface 117 is connected to the TX port of the microprocessor 113 via the second common terminal 1124, and to the RX port of the microprocessor 113 via the third common terminal 1125, to realize data transmission between the USB interface 117 and the microprocessor 113. Simultaneously, by connecting the output terminal of the voltage regulator 114 to both the second common terminal 1124 and the third common terminal 1125, the connection state between the microprocessor 113 and the USB interface 117 can be controlled by the operating state of the output terminal of the voltage regulator 114.

[0040] Specifically, when the output of the voltage regulator 114 is powered, the second common terminal 1124 and the TX port of the microprocessor 113, and the third common terminal 1125 and the RX port of the microprocessor 113 remain connected, enabling normal data transmission between the USB interface 117 and the microprocessor 113. When the output of the voltage regulator 114 is de-energized, the second common terminal 1124 and the TX port of the microprocessor 113 disconnect, and the third common terminal 1125 and the RX port of the microprocessor 113 disconnect, thereby disconnecting the USB interface 117 from the microprocessor 113. This prevents reverse leakage of current from the device connected to the USB interface 117 to the microprocessor 113 when the microprocessor 113 is de-energized, which would affect the power-on startup of the microprocessor 113.

[0041] In some embodiments, such as Figure 1 As shown, the debugging serial port circuit 100 also includes a second switch 118. The first end of the second switch 118 is connected to the CE terminal of the voltage regulator 114, and the second end of the second switch 118 is grounded.

[0042] In this embodiment, by setting a second switch 118, when the second switch 118 is turned on, it can pull down the CE terminal level of the voltage regulator 114, thus de-energizing the microprocessor 113; when the second switch 118 is turned off, the CE terminal of the voltage regulator 114 is connected to a high level, enabling the voltage regulator 114 to supply power to the microprocessor 113. The second switch 118 can control the power-off shutdown and power-on startup of the microprocessor 113 without switching the mode of the microprocessor 113.

[0043] In some embodiments, such as Figure 1 As shown, the microprocessor 113 has a reset pin (i.e., Figure 1 The first terminal of the second switch 118 is connected to the reset pin (the Reset pin in the middle).

[0044] It is understandable that when the reset pin of microprocessor 113 is connected to a low level, it can trigger the reset function of microprocessor 113, clear all registers and internal states of microprocessor 113, and restore microprocessor 113 to its initial state.

[0045] In this embodiment, by connecting the first terminal of the second switch 118 to the reset pin, when the second switch 118 is turned on to cut off the power supply to the microprocessor 113, the second switch 118 will also pull down the level of the reset pin, so that the microprocessor 113 returns to its initial state. After the second switch 118 is turned off, the reset pin is reconnected to a high level, which will not affect the operation of the microprocessor 113.

[0046] Specifically, in some embodiments, such as Figure 1As shown, the debugging serial port circuit 100 also includes a first pull-up resistor 119, and the first end of the second switch 118 is electrically connected to the first pull-up resistor 119.

[0047] In this embodiment, an external power supply circuit applies voltage to the first pull-up resistor 119 and the second switch 118. When the second switch 118 is open, its first terminal is maintained at a high voltage, connecting the CE terminal of the voltage regulator 114 and the reset pin of the microprocessor 113 to a high level, thereby enabling the microprocessor 113 to operate normally. When the second switch 118 is closed, the voltage at its first terminal is zero, thereby pulling down the levels of the CE terminal of the voltage regulator 114 and the reset pin of the microprocessor 113.

[0048] In some embodiments, such as Figure 1 As shown, the debugging serial port circuit 100 also includes a second capacitor 120. The first end of the second capacitor 120 is grounded, and the second end of the second capacitor 120 is connected to the first end of the second switch 118.

[0049] In this embodiment, by connecting a second capacitor 120 in parallel at the second switch 118, the second capacitor 120 can buffer and filter the signal when the second switch 118 switches between on and off states, reducing signal jitter and making the second switch 118 more stable when switching between on and off states.

[0050] Specifically, in some embodiments, the capacitance value of the second capacitor 120 is less than the capacitance value of the first capacitor 115.

[0051] Understandably, when the user turns on the first switch 111, the first capacitor 115 and the second capacitor 120 are connected in parallel, and both parallel terminals are connected to the CE terminal of the voltage regulator 114. In this embodiment, by designing the capacitance value of the second capacitor 120 to be smaller than that of the first capacitor 115, the voltage at the parallel terminal (i.e., the level at the CE terminal) is rapidly pulled down to a lower voltage value the instant the second capacitor 120 is connected in parallel with the first capacitor 115, thereby enabling the voltage regulator 114 to immediately stop supplying power to the microprocessor 113.

[0052] It is understood that in some embodiments, the first pull-up resistor 119 is also connected in parallel with the first capacitor 115 and the second capacitor 120. When the second switch 118 is open, the external power supply circuit can charge the first capacitor 115 and the second capacitor 120 through the first pull-up resistor 119. By reasonably designing the resistance value of the first pull-up resistor 119, the capacitance value of the first capacitor 115, and the capacitance value of the second capacitor 120, the charging time of the first capacitor 115 and the second capacitor 120 to allow the voltage regulator 114 to power on the microprocessor 113 can meet the usage requirements. Thus, the time from when the first switch 111 is turned on to when the microprocessor 113 is powered on and restarted meets the usage requirements.

[0053] Alternatively, in some embodiments, such as Figure 1 As shown, the debugging serial port circuit 100 also includes a third pull-up resistor 122, with the second terminal of the second capacitor 120 connected to the third pull-up resistor 122. In this embodiment, the third pull-up resistor 122 can be used to connect to an external power supply circuit to keep the second terminal of the second capacitor 120 at a high level, and to charge the second capacitor 120 and the first capacitor 115 when they are connected in parallel.

[0054] In some embodiments, such as Figure 1 As shown, the debugging serial port circuit 100 also includes a second pull-up resistor 121, and the second end of the first switch 111 is electrically connected to the second pull-up resistor 121.

[0055] In this embodiment, an external power supply circuit applies voltage to the second pull-up resistor 121 and the first switch 111. When the first switch 111 is open, the second terminal of the first switch 111 is maintained at a high voltage, making the access level of the boot terminal of the microprocessor 113 high, and connecting the first common terminal 1121 and the first normally closed terminal 1122 of the analog switch chip 112, so that the microprocessor 113 can operate normally. It is understood that in some embodiments, a diode 116 is provided between the boot terminal of the microprocessor 113 and the second terminal of the first switch 111 to isolate the high level, so that maintaining a high voltage at the second terminal of the first switch 111 will not affect the boot terminal of the microprocessor 113. When the first switch 111 is closed, the voltage at the second terminal of the first switch 111 is zero, so as to pull down the access level of the boot terminal of the microprocessor 113, and switch the first common terminal 1121 of the analog switch chip 112 to the first normally open terminal 1123, thereby powering on the microprocessor 113 and entering boot mode.

[0056] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A debugging serial port circuit, characterized in that, include: The components include a first switch, an analog switch chip, a microprocessor, and a voltage regulator. The first terminal of the first switch is grounded, and the second terminal of the first switch is connected to the Boot terminal of the microprocessor. The analog switch chip has a first common terminal, a first normally closed terminal, and a first normally open terminal that cooperate with each other. The first common terminal is connected to a first capacitor, and the first normally closed terminal is grounded. The second terminal of the first switch is connected to the first common terminal to control the selective connection of one of the first common terminal, the first normally closed terminal, and the first normally open terminal. The first normally open terminal is connected to the CE terminal of the voltage regulator, and the output terminal of the voltage regulator is electrically connected to the microprocessor.

2. The debugging serial port circuit according to claim 1, characterized in that, A diode is installed on the connection line between the first switch and the Boot terminal of the microprocessor.

3. The debugging serial port circuit according to claim 1, characterized in that, It also includes a USB interface, and the microprocessor is connected to the USB interface through the analog switch chip.

4. The debugging serial port circuit according to claim 3, characterized in that, The analog switch chip also has a second common terminal and a third common terminal. The RX port of the microprocessor is connected to the USB interface in a switchable manner through the second common terminal, and the TX port of the microprocessor is connected to the USB interface in a switchable manner through the third common terminal. The output terminal of the voltage regulator is connected to the second common terminal and the third common terminal respectively to control the connection and disconnection of the TX port and RX port of the microprocessor with the USB interface.

5. The debugging serial port circuit according to claim 1, characterized in that, It also includes a second switch, the first end of which is connected to the CE terminal of the voltage regulator, and the second end of which is grounded.

6. The debugging serial port circuit according to claim 5, characterized in that, The microprocessor has a reset pin, and the first end of the second switch is connected to the reset pin.

7. The debugging serial port circuit according to claim 5, characterized in that, It also includes a first pull-up resistor, and the first terminal of the second switch is electrically connected to the first pull-up resistor.

8. The debugging serial port circuit according to claim 1, characterized in that, It also includes a second capacitor, the first end of which is grounded, and the second end of which is connected to the first end of the second switch.

9. The debugging serial port circuit according to claim 8, characterized in that, The capacitance of the second capacitor is less than that of the first capacitor.

10. The debugging serial port circuit according to claim 1, characterized in that, It also includes a second pull-up resistor, and the second terminal of the first switch is electrically connected to the second pull-up resistor.

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