Adapter card for converting OCP interface to PCIE interface, mainboard and server
By designing an adapter card that converts the OCP interface to the PCIe interface, the problem of the OCP interface not being able to be tested directly is solved, and the conversion from the OCP interface to the standard PCIe interface is realized, meeting the specifications and standards for PCIe signal testing.
Patent Information
- Application Number
- CN202520594183.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2035-03-31
AI Technical Summary
In existing technologies, the OCP interface cannot be directly used for PCIe signal testing, and there is a lack of standardized conversion solutions.
Design an OCP interface to PCIe interface adapter card, which connects the OCP gold fingers and the signal pins with the same functional definition on the PCIe slot through the circuit on the circuit board to realize the conversion from OCP interface to standard PCIe interface.
It realizes the conversion from OCP interface to standard PCIe interface, and can use standard test fixtures in PCIe protocol to perform signal testing, meeting the specifications and standards of PCIe signal testing.
Smart Images
Figure CN223911243U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to interface switching technical field, especially interface switching card, mainboard and server of OCP interface switching PCIE interface. BACKGROUND
[0002] Open Compute Project (OCP) is a community of open-source hardware design initiated by Facebook in 2011, aiming to improve the efficiency of data centers, reduce energy consumption, and accelerate technological innovation by opening and sharing hardware designs. OCP interface is an important technology among them, which includes a series of hardware specifications and communication protocols to support efficient and reliable data exchange between hardware components. PCI-Express (peripheral component interconnect express) is a high-speed serial computer expansion bus standard, proposed by Intel in 2001. PCIE belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, and the connected devices allocate their own channel bandwidth without sharing bus bandwidth. It mainly supports active power management, error reporting, end-to-end reliable transmission, hot plug, and quality of service (QOS) functions.
[0003] In the prior art, OCP NIC 3.0 is the third generation standard of OCP. OCP NIC 3.0 specification clearly defines the size specifications of small size (SFF) network cards and large size (LFF) network cards, and borrows the "4C" and "4C+" two specifications defined in SFF-TA-1002 specification as the interface for connecting OCP NIC 3.0 and server mainboard, using PCIE protocol for data transmission.
[0004] However, the interface published by PCIE protocol does not include OCP interface, and PCIE signal testing of OCP interface does not belong to standard consistency testing. Therefore, it is urgent to design a switching card to convert OCP interface into standard PCIE interface to meet the specification standard of PCIE protocol, and then PCIE signal testing of OCP interface can be performed. Utility model content
[0005] The utility model embodiment provides a kind of switching card of OCP interface switching PCIE interface, mainboard and server, and OCP interface is switched into standard PCIE interface, meet the demand of PCIE signal testing of OCP interface.
[0006] In the first aspect, a switching card for converting OCP interface to PCIE interface is provided, and the switching card comprises:
[0007] circuit board body;
[0008] OCP gold finger, the OCP gold finger is arranged on the edge of the circuit board body, and is used for being matched with the slot of the OCP connector of the mainboard;
[0009] PCIE slot, the PCIE slot is arranged on the surface of the circuit board body, and is used for being matched with the gold finger plug of the standard PCIE test fixture;
[0010] Wherein, the signal pins with the same function definition on the OCP gold finger and the PCIE slot are connected through the circuit on the circuit board body.
[0011] In some embodiments, the circuit board body is provided with a plurality of test points, and the plurality of test points are used for testing clock signals.
[0012] In some embodiments, the OCP gold finger is a double-sided gold finger.
[0013] In some embodiments, the PCIE slot is a standard PCIE X16 SLOT slot.
[0014] In some embodiments, the PCIE slot is vertically arranged on the surface of the circuit board body relative to the OCP gold finger, and the PCIE slot is spaced apart from the OCP gold finger by a preset distance range close to the side edge of the OCP gold finger.
[0015] In some embodiments, the adapter card further comprises:
[0016] Power supply port, the power supply port is arranged on the surface of the circuit board body, and is used for external power supply.
[0017] In some embodiments, the surface of the circuit board body is provided with a plurality of cooling fins.
[0018] In some embodiments, a plurality of mounting holes are arranged on the circuit board body.
[0019] Secondly, an OCP interface to PCIE interface adapter card is provided.
[0020] Thirdly, a server is provided, comprising the mainboard.
[0021] The beneficial effects brought by the technical scheme of the utility model include:
[0022] The utility model embodiment provides a kind of OCP interface conversion PCIE interface's adapter card, mainboard and server, the adapter card includes circuit board body, the OCP gold finger of the side of the circuit board body is set and the PCIE slot of the surface of the circuit board body is set, and the signal pin of the same function definition on the OCP gold finger and on the PCIE slot is connected by the line on the circuit board body corresponding, without increasing new complex circuit, using the consistency of OCP interface signal pin definition and PCIE interface signal pin definition, it is realized to convert OCP interface into standard PCIE interface, and then standard test fixture in PCIE protocol can be used to carry out PCIE signal test. BRIEF DESCRIPTION OF DRAWINGS
[0023] In order to more clearly illustrate the technical scheme in the utility model embodiment, the drawings needed to be used in the embodiment description will be simply introduced below, and obviously, the drawings in the following description are only some embodiments of the utility model, and for those skilled in the art, other drawings can be obtained according to these drawings without creative labor.
[0024] Figure 1 A schematic diagram of the adapter card for converting OCP interface to PCIE interface is provided for the utility model embodiment.
[0025] Figure 2 A circuit connection schematic diagram of the OCP gold finger is provided for the utility model embodiment.
[0026] Figure 3 A circuit connection schematic diagram of the PCIE slot is provided for the utility model embodiment.
[0027] Figure 4 A circuit connection schematic diagram of the test point is provided for the utility model embodiment.
[0028] REFERENCE NUMERALS:
[0029] 1, circuit board body; 11, mounting hole;
[0030] 2, OCP gold finger;
[0031] 3, PCIE slot;
[0032] 4, test point;
[0033] 5, power supply port;
[0034] 6, cooling fin. DETAILED DESCRIPTION
[0035] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme of the embodiments of the utility model will be described clearly and completely in combination with the drawings in the embodiments of the utility model below. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor belong to the protection scope of the utility model.
[0036] The utility model embodiment provides a kind of OCP interface conversion PCIE interface's adapter card, it can be converted into standard PCIE interface OCP interface, meet the demand of OCP interface PCIE signal test.
[0037] Referring to Figure 1 The utility model embodiment provides a kind of OCP interface conversion PCIE interface's adapter card, including: circuit board body 1, OCP gold finger 2 and PCIE slot 3.
[0038] The circuit board body 1 can adopt multilayer PCB, the OCP gold finger 2 is arranged on the edge of the circuit board body 1, and the OCP gold finger 2 is used to cooperate with the slot of the OCP connector of mainboard. The PCIE slot 3 is arranged on the surface of the circuit board body 1, and the PCIE slot 3 is used to cooperate with the gold finger plug of standard PCIE test fixture.
[0039] Among them, the signal pin of same function definition on the OCP gold finger 2 and on the PCIE slot 3 is connected by the line on the circuit board body 1.
[0040] Specifically, referring to Figure 2 And Figure 3 The key signal pin of the OCP gold finger 2 is connected to the signal pin of the PCIE slot 3, Figure 2 XP1 indicates the OCP gold finger 2 in Figure 3 XS1 indicates the PCIE slot 3 in.
[0041] 1. Clock signal: CLK_100M_DP / N
[0042] REFCLKN0, EFCLKP0 on XP1, pin B14, B15;
[0043] REFCLK_N / P on XS1, pin A13, A14;
[0044] 2. Data signals: E_P5E_PE3_RX_DP<15:0>, E_P5E_PE3_RX_DN<15:0>, E_P5E_PE3_TX_DP<15:0>, E_P5E_PE3_TX_DN<15:0>
[0045] PERN[0:15], PERP[0:15] and PETN[0:15], PETP[0:15] on XP1
[0046] pins A17, A18, A20, A21, A23, A24, A26, A27, A30, A31, A33, A34, A36, A37, A39, A40, A44, A45, A47, A48, A50, A51, A53, A54, A56, A57, A59, A60, A62, A63, A65, A66, B10, B14, B15, B17, B18, B20, B21, B23, B24, B26, B27, B30, B31, B33, B34, B36, B37, B39, B40, B44, B45, B47, B48, B50, B51, B53, B54, B56, B57, B59, B60, B62, B63, B65, B66;
[0047] PERN[0:15], PERP[0:15] and PETN[0:15], PETP[0:15] on XS1
[0048] pins A[16:81], B[14:79].
[0049] 3. Presence signal: PCIE_PRSNT1_N
[0050] PRSNTA_N on XP1, pin A10;
[0051] PRSNT1_N on XS1, pin A1.
[0052] 4. Reset signal: PCEI_PRST_N
[0053] PERST0_N on XP1, pin B10;
[0054] PERST_N on XS1, pin A11.
[0055] 5. Power signals: P12V, P3V3
[0056] 12V_EDGE_[0:5] on XP1, pins B[1:6];
[0057] 3_3V_EDGE on XP1, pin B11;
[0058] XS1 on 12V_[1:5], pin B[1:3], A2, B3;
[0059] XS1 on 3V3 AUX, pin B[8:10], A10.
[0060] In addition, in addition to the corresponding pin connection, the power supply part increases the peripheral voltage stabilizing circuit, and ensures that the power voltage signal is stable.
[0061] The adapter card for converting the OCP interface into the PCIE interface in the embodiment of the utility model, it includes circuit board body, the OCP gold finger of setting in the side of the circuit board body and the PCIE slot of setting in the surface of the circuit board body, and the signal pin of the same function definition on the OCP gold finger and the PCIE slot is connected through the line on the circuit board body, under the condition of not increasing new complex circuit, utilize the consistency of OCP interface signal pin definition and PCIE interface signal pin definition, realize the conversion of OCP interface into standard PCIE interface, and then can use the standard test fixture in PCIE protocol to carry out PCIE signal test.
[0062] Referring to Figure 2 and Figure 4 The circuit board body 1 is also provided with a plurality of test points 4, and the plurality of test points 4 are used for testing clock signals. Referring to Figure 2 and Figure 3 The embodiment of the utility model is provided with six test points 4, and the test point TP6 and the test point TP1 are connected with the A14 pin and the A15 pin of the OCP gold finger 2 respectively; the test point TP2 and the test point TP3 are connected with the OB11 pin and the OB12 pin of the OCP gold finger 2 respectively; and the test point TP4 and the test point TP5 are connected with the OA11 pin and the OA12 pin of the OCP gold finger 2 respectively. The three groups of clock test points in the embodiment of the utility model are wired out separately, are connected with analog terminals on the test points 4, and then in combination with the one group of clock of the OCP gold finger 2, four group clock signal tests are realized, and the signal integrity test of the OCP interface can be carried out.
[0063] As an optional embodiment, in one embodiment of the utility model, the OCP gold finger 2 is a double-sided gold finger. The gold finger is composed of numerous golden conductive pads, the gold finger is actually covered with a layer of gold on the copper-clad plate through the electroplating process, the strong anti-oxidation property of gold can protect the internal circuit from corrosion, and the strong conductivity of gold also will not cause signal loss. At the same time, gold has very strong ductility, and under appropriate pressure, the contact area between the contacts can be larger, so that the contact resistance is reduced and the signal transmission efficiency is improved, and the double-sided gold finger can provide more connection pins.
[0064] As an optional implementation, in an utility model embodiment, the PCIE slot 3 is a standard PCIE X16 SLOT slot, and 16 PCIE signals can be tested synchronously through the standard PCIE X16 SLOT slot.
[0065] As an optional implementation, in an utility model embodiment, as shown in Figure 1 The PCIE slot 3 is arranged on the surface of the circuit board body 1 vertically relative to the OCP golden finger 2, and the side edge of the PCIE slot 3 close to the OCP golden finger 2 is spaced apart from the OCP golden finger 2 by a preset distance range. The preset distance range can be set to 10-15 mm, and in addition, the PCIE slot 3 can be set to be about 10 mm away from the edge of the circuit board body 1, so that the PCIE slot 3 can be ensured to be arranged at the middle position of the circuit board body 1, the subsequent standard PCIE test fixture can be ensured not to interfere with the OCP golden finger 2, and more space can be reserved for layout of high-speed lines and heat dissipation.
[0066] As an optional implementation, in an utility model embodiment, as shown in Figure 1 The OCP interface to PCIE interface adapter card further comprises a power supply port 5, the power supply port 5 is arranged on the surface of the circuit board body 1, and the power supply port 5 is used for external power supply and provides working power for the adapter card.
[0067] As an optional implementation, in an utility model embodiment, as shown in Figure 1 The surface of the circuit board body 1 is provided with a plurality of heat dissipation fins 6, and the plurality of heat dissipation fins 6 facilitate heat dissipation of the circuit board body 1, so that the circuit board body 1 can work normally.
[0068] As an optional implementation, in an utility model embodiment, as shown in Figure 1 The circuit board body 1 is provided with a plurality of mounting holes 11, and the plurality of mounting holes 11 facilitate mounting of the circuit board body 1 on a mainboard or a server case.
[0069] The utility model embodiment provides a kind of mainboard, including preceding OCP interface to PCIE interface adapter card, the OCP interface to PCIE interface adapter card includes: circuit board body 1, OCP golden finger 2 and PCIE slot 3.
[0070] The circuit board body 1 can adopt a multi-layer PCB board, the OCP gold finger 2 is arranged at the edge of the circuit board body 1, and the OCP gold finger 2 is used for being matched with the slot of the OCP connector of the mainboard. The PCIE slot 3 is arranged on the surface of the circuit board body 1, and the PCIE slot 3 is used for being matched with the gold finger plug of the standard PCIE test fixture.
[0071] The signal pins with the same function definition on the OCP gold finger 2 and the PCIE slot 3 are correspondingly connected through the circuit on the circuit board body 1.
[0072] Specifically, as shown in Figure 2 and Figure 3 , the key signal pins of the OCP gold finger 2 are connected to the signal pins of the PCIE slot 3, Figure 2 XP1 in the figure represents the OCP gold finger 2, Figure 3 XS1 in the figure represents the PCIE slot 3. In addition, in addition to the corresponding pin connection, a peripheral voltage stabilizing circuit is added to the power supply part to ensure that the power supply voltage signal is stable.
[0073] The mainboard in the embodiment of the utility model, the adapter card of the OCP interface to the PCIE interface includes a circuit board body, an OCP gold finger arranged at the side edge of the circuit board body and a PCIE slot arranged on the surface of the circuit board body, and the signal pins with the same function definition on the OCP gold finger and the PCIE slot are correspondingly connected through the circuit on the circuit board body, without increasing a new complex circuit, the consistency of the OCP interface signal pin definition and the PCIE interface signal pin definition is utilized to realize the conversion of the OCP interface into the standard PCIE interface, and then the standard test fixture in the PCIE protocol can be used for PCIE signal testing.
[0074] As shown in Figure 2 and Figure 4 , the circuit board body 1 is further provided with a plurality of test points 4, and the plurality of test points 4 are used for testing clock signals. As shown in Figure 2 and Figure 3 , the embodiment of the utility model is provided with six test points 4, and test point TP6 and test point TP1 are connected with A14 pin and A15 pin of the OCP gold finger 2 respectively; test point TP2 and test point TP3 are connected with OB11 pin and OB12 pin of the OCP gold finger 2 respectively; and test point TP4 and test point TP5 are connected with OA11 pin and OA12 pin of the OCP gold finger 2 respectively. The three groups of clock test wires of the embodiment of the utility model are separately laid out, the analog terminal is connected on the test point 4, and then in combination with the one group of clock of the OCP gold finger 2 itself, four group clock signal testing is realized, and the signal integrity testing of the OCP interface can be performed.
[0075] As an optional implementation, in an utility model embodiment, the OCP golden finger 2 is a double-sided golden finger. The golden finger is composed of many golden yellow conductive pads. The golden finger is actually a layer of gold plated on the copper-clad plate through the electroplating process. Gold has strong anti-oxidation property and can protect the internal circuit from corrosion. Moreover, gold has strong conductivity and will not cause signal loss. At the same time, gold has very strong ductility. Under appropriate pressure, the contact area between the contacts can be larger, thereby reducing the contact resistance and improving the signal transmission efficiency. The double-sided golden finger can provide more connection pins.
[0076] As an optional implementation, in an utility model embodiment, the PCIE slot 3 is a standard PCIE X16 SLOT slot. Through the standard PCIE X16 SLOT slot, 16 PCIE signals can be tested synchronously.
[0077] As an optional implementation, in an utility model embodiment, as shown in Figure 1 , the PCIE slot 3 is vertically arranged on the surface of the circuit board body 1 relative to the OCP golden finger 2, and the side edge of the PCIE slot 3 close to the OCP golden finger 2 is spaced apart from the OCP golden finger 2 by a preset distance range. The preset distance range can be set to 10-15 mm. In addition, the PCIE slot 3 can be set to be about 10 mm away from the edge of the circuit board body 1. In this way, the PCIE slot 3 can be ensured to be at the middle position of the circuit board body 1. Moreover, the subsequent standard PCIE test fixture can be ensured not to interfere with the structure of the OCP golden finger 2. In addition, more space can be left for the layout of high-speed lines and heat dissipation.
[0078] As an optional implementation, in an utility model embodiment, as shown in Figure 1 , the OCP interface to PCIE interface adapter card further comprises a power supply port 5. The power supply port 5 is arranged on the surface of the circuit board body 1. The power supply port 5 is used for external power supply and provides working power for the adapter card.
[0079] As an optional implementation, in an utility model embodiment, as shown in Figure 1 , the surface of the circuit board body 1 is provided with a plurality of heat dissipation fins 6. The plurality of heat dissipation fins 6 facilitate heat dissipation of the circuit board body 1 and ensure that the circuit board body 1 can work normally.
[0080] As an optional implementation, in an utility model embodiment, as shown in Figure 1 , the circuit board body 1 is provided with a plurality of mounting holes 11. The plurality of mounting holes 11 facilitate mounting of the circuit board body 1 on the mainboard or the case of the server.
[0081] The utility model embodiment further provides a kind of server, including the mainboard of preceding.
[0082] In the description of the utility model, it needs to be explained that, the orientation or position relationship indicated by terms "upper", "lower" etc. is based on the orientation or position relationship shown in the drawing, and is only for the convenience of describing the utility model and simplifying the description, and is not indicative or suggestive of the device or element indicated must have a particular orientation, be constructed and operated with a particular orientation, so it cannot be understood as a limitation to the utility model. Unless otherwise explicitly specified and limited, the terms "mount", "connect", "connection" should be understood broadly, for example, it can be fixed connection, can also be detachable connection, or integrally connected;It can be mechanical connection, or electrical connection;It can be directly connected, or indirectly connected through intermediate medium, it can be the communication inside two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to specific circumstances.
[0083] It needs to be explained that, in the utility model, relationship terms such as "first" and "second" etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or equipment. Without more limitation, the element defined by the sentence "including a …" does not exclude the existence of another identical element in the process, method, article or equipment including the element.
[0084] The above is only the specific embodiment of the utility model, so that those skilled in the art can understand or realize the utility model. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the utility model. Therefore, the utility model will not be limited to these embodiments shown in the present text, but will conform to the widest scope consistent with the principles and novel features of the present utility model.
Claims
1. An adapter card for converting an OCP interface to a PCIe interface, characterized in that, include: Circuit board body (1); OCP gold finger (2), the OCP gold finger (2) is disposed on the side edge of the circuit board body (1) and is used to cooperate with the slot of the OCP connector of the motherboard; PCIE slot (3), the PCIE slot (3) is disposed on the surface of the circuit board body (1) for mating with the gold finger plug of the standard PCIE test fixture; The signal pins on the OCP gold finger (2) and the PCIE slot (3) with the same functional definition are connected to each other through the lines on the circuit board (1).
2. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that: The circuit board body (1) is provided with multiple test points (4), which are used to test clock signals.
3. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that: The OCP gold finger (2) is a double-sided gold finger.
4. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that: The PCIE slot (3) is a standard PCIE x16 SLOT slot.
5. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that: The PCIE slot (3) is perpendicular to the OCP gold finger (2) on the surface of the circuit board body (1), and the side of the PCIE slot (3) near the OCP gold finger (2) is spaced at a preset distance from the OCP gold finger (2).
6. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that, The adapter card also includes: Power supply port (5) is disposed on the surface of the circuit board body (1) and is used to connect an external power supply.
7. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that: The surface of the circuit board body (1) is provided with several heat sinks (6).
8. The OCP interface to PCIe interface adapter card according to claim 1, characterized in that: The circuit board body (1) is provided with multiple mounting holes (11).
9. A motherboard, characterized in that, Including the OCP interface to PCIE interface adapter card as described in any one of claims 1-8.
10. A server, characterized in that, Includes the motherboard as described in claim 9.