System for burning and reading verification chip in parallel

Abstract

The utility model provides a system for burning and reading verification chips in parallel. The system comprises a software module and at least one hardware module. The hardware module comprises a plug connector, a burning port and a burner; the software module comprises an upper computer, and the upper computer is connected with the burner and an LIN pin of the male end of the plug connector; the upper computer comprises a burning program and a reading verification program, the burning program is used for burning the target module through the burner, and the reading verification program is used for checking data in real time through the LIN port to judge whether the target module is successfully burnt or not. According to the utility model, the chip is read and verified while program burning is carried out on the chip in the same time period, so that the production efficiency and the verification accuracy can be obviously improved.

Description

Technical Field

[0001] This utility model mainly relates to the technical field of chip programming and reading verification, specifically to a system for parallel programming and reading verification of chips. Background Technology

[0002] Programming, also known as firmware burning or programming, is the process of writing program code or data into a chip. This process typically involves programming the chip's internal memory cells to enable the chip to perform specific tasks or functions. Read verification is the process of reading the chip's contents after programming and comparing the read content with the source file to determine if the programmed content is correct. Programming and read verification are two indispensable steps in electronic design and development. By using correct programming methods and rigorous read verification procedures, it is ensured that the chip can correctly perform specific tasks or functions, thereby improving the performance and reliability of the entire electronic product.

[0003] However, the current burning and reading verification are two separate steps, which leads to a longer production cycle, increased equipment downtime, and increased production costs. Utility Model Content

[0004] This invention provides a system for parallel programming and reading of verification chips to solve the technical problems mentioned in the background.

[0005] The technical solution adopted by this utility model to solve the above-mentioned technical problems is as follows:

[0006] A system for parallel programming and reading of verification chips includes a software module and at least one hardware module, wherein,

[0007] The hardware module includes:

[0008] A connector having a female and a male terminal that interlock, wherein the female and male terminals each include a GND pin, a SWD pin, a CLK pin, a VBAT+ pin, a VBAT- pin, and a LIN pin;

[0009] A programming port is used to connect to the target module; the programming port is located around the terminals of the female connector.

[0010] The programmer includes a GND port, an SWD port, and a CLK port; the GND port, SWD port, and CLK port of the programmer are respectively connected to the GND pin, SWD pin, and CLK pin of the male terminal of the connector.

[0011] The software module includes a host computer, which is connected to the programmer and the LIN pin of the male terminal of the connector.

[0012] The host computer includes a programming program and a reading verification program. The programming program is used to program the target module through the programmer, and the reading verification program is used to view data in real time through the LIN port to determine whether the target module has been successfully programmed.

[0013] Furthermore, the system also includes an expansion dock, which is connected to the host computer.

[0014] Furthermore, the docking station includes at least one USB port.

[0015] Furthermore, at least one of the hardware modules includes at least two hardware modules; the system has at least two hardware modules connected to the host computer via the expansion dock.

[0016] Furthermore, both the VBAT+ pin and the VBAT- pin on the female end of the connector are connected to the target module;

[0017] The VBAT+ and VBAT- pins of the male connector are both connected to the host computer.

[0018] Furthermore, the VBAT+ pin, VBAT- pin, and LIN pin of the male connector are converted into VBAT+ port, VBAT- port, and LIN port respectively via a wiring harness; the host computer is connected to the VBAT+ port, VBAT- port, and LIN port of the male connector.

[0019] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0020] This invention combines hardware and software modules to simultaneously program and verify the chip, significantly improving production efficiency and verification accuracy. This simultaneous programming and verification process enhances efficiency and reduces costs for small-batch production projects, increases product yield in a shorter time, and ultimately improves customer satisfaction.

[0021] The present invention will be explained in detail below with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the system structure of the parallel programming and reading verification chip of this utility model.

[0023] In the diagram: 1. Female connector; 2. Male connector; 3. Programmer; 4. Programming port; 5. Target module; 6. Host computer. Detailed Implementation

[0024] To facilitate understanding of this utility model, a more comprehensive description of the utility model will be given below with reference to the accompanying drawings, which show several embodiments of the utility model. However, the utility model can be implemented in different forms and is not limited to the embodiments described in the text. On the contrary, these embodiments are provided to make the disclosure of the utility model more thorough and comprehensive.

[0025] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intermediate component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intermediate component at the same time.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0027] This application provides a system for parallel programming and reading of a verification chip, as illustrated in the schematic diagram below. Figure 1 As shown. The system includes a software module and at least one hardware module.

[0028] The hardware module includes a connector, a programming port 4, and a programmer 3.

[0029] The connector has a female connector 1 and a male connector 2 that interlock. Both the female connector 1 and the male connector 2 include a GND (ground) pin, a SWD (serial line debug interface) pin, a CLK (clock signal line) pin, a VBAT+ (battery positive) pin, a VBAT- (battery negative) pin, and a LIN (local area network bus) pin.

[0030] The programming port 4 is used to connect to the target module 5; the programming port 4 is located around the terminals of the female connector 1.

[0031] The programmer 3 includes a GND port, an SWD port, and a CLK port; the GND port, SWD port, and CLK port are respectively connected to the GND pin, SWD pin, and CLK pin of the male terminal 2 of the connector.

[0032] The software module includes a host computer 6, which is connected to the programmer 3 and the LIN pin of the connector male terminal 2. The host computer 6 includes a programming program and a reading and verification program. The programming program is used by the programmer 3 to program the target module 5, and the reading and verification program is used by the LIN port to view data in real time to determine whether the target module 5 has been successfully programmed.

[0033] In this embodiment, by providing a programming port 4 around the terminals of the female connector 1, the target module 5 can be connected to an external device via the connector. The female connector 1 and the male connector 2 are plugged into each other, enabling interaction between the target module 5 and the host computer 6. The host computer 6 imports the programming program into the programmer 3 and performs read / write verification on the target module 5.

[0034] The host computer 6 connects to the programmer 3 via USB. The host computer 6 contains the programming program, which can then be transmitted to the programmer 3. The programmer 3 then programs the target module 5. The host computer 6 connects to the LIN pin of the connector male terminal 2, sending corresponding LIN commands to read and verify the program. The returned data can then be viewed to determine if the programming was successful.

[0035] This application combines hardware and software modules to simultaneously program and verify the chip, significantly improving production efficiency and verification accuracy. This simultaneous programming and verification process enhances efficiency and reduces costs for small-batch production projects, increases product yield in a shorter time, and ultimately improves customer satisfaction.

[0036] Furthermore, the system also includes an expansion dock. The expansion dock connects to the host computer 6.

[0037] In this embodiment, by connecting the expansion dock to the host computer 6, the interface of the host computer 6 can be expanded, so that multiple hardware modules can perform program burning and reading verification at the same time.

[0038] Furthermore, the docking station includes at least one USB port.

[0039] In this embodiment, the docking station may include multiple USB ports to accommodate the connection needs of multiple hardware modules.

[0040] Furthermore, at least one hardware module includes at least two hardware modules; the system's at least two hardware modules are connected to the host computer 6 via an expansion dock.

[0041] Furthermore, the VBAT+ and VBAT- pins of the female connector 1 are both connected to the target module 5. The VBAT+ and VBAT- pins of the male connector 2 are both connected to the host computer 6.

[0042] In this embodiment, the VBAT+ and VBAT- pins of the female connector 1 are both connected to the target module 5, which can provide power to the target module 5.

[0043] Furthermore, the VBAT+ pin, VBAT- pin, and LIN pin of the male terminal 2 of the connector are converted into VBAT+ port, VBAT- port, and LIN port respectively through a wiring harness; the host computer 6 is connected to the VBAT+ port, VBAT- port, and LIN port of the male terminal 2 of the connector.

[0044] In this embodiment, the VBAT+ pin, VBAT- pin, and LIN pin of the male terminal 2 of the connector are converted into the VBAT+ port, VBAT- port, and LIN port of the male terminal 2 of the connector through a wiring harness, which are in the form of a USB interface.

[0045] In summary, the VBAT+, VBAT-, and LIN pins of the connector in this application can supply power to the target module 5. The GND, SWD, and CLK pins of the connector are connected to the programmer 3, enabling the programming of the target module 5. The LIN pin of the connector is used for reading and verifying the programmed program. Thus, by setting the connector, it is possible to program and verify the chip simultaneously, improving production efficiency and product accuracy.

[0046] The present invention has been described above by way of example in conjunction with the accompanying drawings. Obviously, the specific implementation of the present invention is not limited to the above-described manner. Any non-substantial improvement made by adopting the inventive concept and technical solution of the present invention, or the direct application of the inventive concept and technical solution of the present invention to other occasions without modification, shall be within the protection scope of the present invention.

Claims

1. A system for parallel burning and reading verification chips, characterized by, The system comprises a software module and at least one hardware module, wherein, the hardware module comprises: a connector having a female end and a male end, the female end and the male end each comprising a GND pin, a SWD pin, a CLK pin, a VBAT+ pin, a VBAT- pin, and a LIN pin; a burning port for connecting a target module, the burning port being arranged around the terminals of the female end of the connector; a burner comprising a GND port, a SWD port, and a CLK port, the GND port, the SWD port, and the CLK port of the burner being connected to the GND pin, the SWD pin, and the CLK pin of the male end of the connector, respectively; the software module comprises a host computer, the host computer being connected to the burner and the LIN pin of the male end of the connector; the host computer comprises a burning program and a reading verification program, the burning program being used for burning the target module through the burner, and the reading verification program being used for checking data in real time through the LIN port to determine whether the target module is successfully burned.

2. The system of claim 1, wherein, The system further comprises a docking station, the docking station being connected to the host computer.

3. The system of claim 2, wherein, The docking station comprises at least one USB interface.

4. The system of claim 2 or 3, wherein, At least one of the hardware modules comprises at least two hardware modules, and the system comprises at least two hardware modules connected to the host computer through the docking station.

5. The system of claim 1, wherein, The VBAT+ pin and the VBAT- pin of the female end of the connector are connected to the target module. The VBAT+ pin and the VBAT- pin of the male end of the connector are connected to the host computer.

6. The system of claim 1, wherein, The VBAT+ pin, the VBAT- pin, and the LIN pin of the male end of the connector are converted into a VBAT+ port, a VBAT- port, and a LIN port through a wire harness, respectively, and the host computer is connected to the VBAT+ port, the VBAT- port, and the LIN port of the male end of the connector.

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