Charging circuit for super capacitor

By combining an MCU controller and a field-effect transistor, the problem of traditional supercapacitor charging circuits being unable to charge when the battery is zero is solved, resulting in a highly efficient, reliable, and miniaturized charging circuit suitable for various application scenarios.

CN223942428UActive Publication Date: 2026-02-24QINGDAO TIMU TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202520695925.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-04-14
Publication Date
2026-02-24
Estimated Expiration
2035-04-14

AI Technical Summary

Technical Problem

Traditional supercapacitor charging circuits cannot charge when the battery is empty, and existing solutions using relays suffer from problems such as large size, spark generation, low efficiency, and poor reliability.

Method used

The system employs an MCU controller, a buck-boost circuit, a voltage sampling circuit, a load current sampling circuit, and a field-effect transistor (FET). By detecting and feeding back voltage and current, the switching state of the FET is controlled to achieve zero-charge charging, and current limiting is performed through the FET.

Benefits of technology

It achieves efficient, compact, and highly reliable zero-power charging, meeting the needs of supercapacitors in multiple scenarios, and at a low cost.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of new energy circuits, in particular to a charging circuit for a super capacitor, which comprises the super capacitor, an MCU (Microprogrammed Control Unit) controller, a buck-boost circuit, a voltage sampling circuit, a load current sampling circuit and a field effect transistor, the MCU controller detects a sampling voltage output by the load current sampling circuit and a feedback voltage output by the voltage sampling circuit to control the buck-boost circuit to provide a target output voltage for the voltage sampling circuit and provide a target load current for the load current sampling circuit; and meanwhile, the MCU controller realizes zero-electric-quantity charging of the super capacitor by adjusting the on-off state of the field-effect tube. According to the utility model, the field effect transistor is used for current limiting, the efficiency is high, the size is small, the reliability is high, and the cost is low. And the MCU controller can realize constant-current, constant-voltage and constant-power multi-mode charging by controlling the voltage and current output by the buck-boost circuit, so that the multi-scene use requirements of the super capacitor are met.
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Description

Technical Field

[0001] This utility model relates to the field of new energy circuit technology, specifically to a charging circuit for a supercapacitor. Background Technology

[0002] Traditional charging circuits typically use a buck / boost chip to charge supercapacitors. This chip controls the current and voltage in the charging circuit based on feedback signals (sampled voltage or sampled current) from the load circuit. However, traditional supercapacitor charging circuits are limited by a minimum voltage reference. When the supercapacitor is at zero charge (equivalent to a short circuit), the circuit triggers a protection mechanism and cannot output current. Furthermore, when charging a supercapacitor with zero charge, it acts as a short circuit to the charging circuit, causing it to enter a protection state with no voltage or current output, thus preventing charging.

[0003] The invention with application number 202022152556.6 discloses a non-contact power supply supercapacitor RGV charging protection circuit, and discloses that: the zero-charge automatic activation charging module is implemented by the relay KA1 coil and controlled by the supercapacitor RGV controller. When the supercapacitor is at zero or low charge and cannot start the RGV controller, the relay KA1 coil is de-energized, and the zero-charge automatic activation charging and protection circuit module connects the charging circuit and completes the zero-charge charging activation; the zero-charge automatic activation charging and protection module consists of a normally closed contact of a DC relay, a current-limiting resistor R0, and a temperature control switch S0 connected in series and connected in parallel with the first fast charging start / stop module to form an activation circuit. This solution uses the current-limiting resistor R0 and the DC relay as auxiliary circuits to charge the supercapacitor, which has the following drawbacks: 1. The relay is large in size, and many small devices or modules cannot use it. Moreover, the relay switch will generate sparks, and many electrical devices, especially some new energy applications (such as smart meters), cannot use relays. 2. The current-limiting resistor is prone to overheating during use, and has low efficiency and poor reliability. Utility Model Content

[0004] To address the issues of large size and low efficiency in existing supercapacitor charging circuits, this invention proposes a multi-mode charging circuit for supercapacitors that can be charged from zero charge.

[0005] The objective of this utility model can be achieved through the following technical solutions:

[0006] A charging circuit for a supercapacitor includes a supercapacitor, an MCU controller, a buck-boost circuit, a voltage sampling circuit, a load current sampling circuit, and a field-effect transistor (FET). The MCU controller detects the sampling voltage output by the load current sampling circuit and the feedback voltage output by the voltage sampling circuit, and controls the buck-boost circuit to provide a target output voltage to the voltage sampling circuit and a target load current to the load current sampling circuit. Simultaneously, the MCU controller adjusts the switching state of the FET to achieve zero-charge charging of the supercapacitor. Further, the voltage sampling circuit includes a first resistor and a second resistor connected in series. One end of the second resistor is grounded, and the other end is connected to the first input terminal of the MCU controller. The free end of the first resistor is connected to the power supply terminal of the FET, the output terminal of the FET is connected to the supercapacitor, and the control terminal of the FET is connected to the control terminal of the MCU controller.

[0007] Furthermore, the load current sampling circuit includes an operational amplifier and a sampling resistor. One end of the sampling resistor is connected to the output terminal of the buck-boost circuit and the non-inverting input terminal of the operational amplifier. The other end of the sampling resistor is connected to the power supply terminal of the field-effect transistor and the inverting input terminal of the operational amplifier. The output terminal of the operational amplifier is connected to the second input terminal of the MCU controller.

[0008] Furthermore, the buck-boost circuit includes a buck-boost chip and an inductor. The voltage feedback terminal of the buck-boost chip is connected to the first output terminal of the MCU controller. One end of the inductor is connected to the inductor connection terminal of the buck-boost chip, and the other end is connected to the sampling resistor.

[0009] Furthermore, the resistance of the sampling resistor is 10 milliohms to 100 milliohms.

[0010] The beneficial effects of this invention are as follows: This invention uses a field-effect transistor for current limiting, resulting in high efficiency, small size, high reliability, and low cost. The MCU controller, by controlling the voltage and current output of the buck-boost circuit, can achieve multi-mode charging of constant current, constant voltage, and constant power, meeting the diverse application needs of supercapacitors. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the charging circuit principle of the supercapacitor provided in this embodiment of the utility model. Detailed Implementation

[0012] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0013] refer to Figure 1 This embodiment proposes a charging circuit for a supercapacitor, including supercapacitors C1N, C12, and C11, an MCU controller, a buck-boost circuit, a voltage sampling circuit, a load current sampling circuit, and a field-effect transistor. The MCU controller detects the sampling voltage output by the load current sampling circuit and the feedback voltage output by the voltage sampling circuit. On the one hand, it controls the buck-boost circuit to provide the required output voltage to the voltage sampling circuit and the required load current to the load current sampling circuit. On the other hand, it controls the switching of the field-effect transistor to achieve zero-charge charging of the supercapacitor.

[0014] The voltage sampling circuit includes a first resistor R1 and a second resistor R2 connected in series. One end of the second resistor R2 is grounded, and the other end is connected to the first input terminal VFB of the MCU controller. One end of the first resistor R1 is connected to the second resistor R2, and the other end is connected to the power supply terminal 3 of the field-effect transistor (FET). The output terminal of the FET is connected to a supercapacitor, and the control terminal of the FET is connected to the control terminal of the MCU controller. The output voltage VOUT and the sampling voltage VFB are calculated according to the following formula: VFB = R2 / (R1+R2)*VOUT. In this embodiment, the MCT controller uses an STM32FO30F4P, and the figure shows a schematic diagram of the chip.

[0015] The load current sampling circuit includes an operational amplifier and a sampling resistor RS. One end of the sampling resistor RS is connected to the output of the buck-boost circuit and the non-inverting input VIN+ of the operational amplifier AMP. The other end of the sampling resistor RS is connected to the power supply terminal 3 of the field-effect transistor and the inverting input VIN- of the operational amplifier AMP. The output VOUT of the operational amplifier AMP is connected to the second input VIRS of the MCU controller. The resistor Rs is a small resistor connected in series in the load circuit. When the load current flows through the resistor RS, a voltage is generated across the resistor. This voltage is proportional to the current flowing through the load. Because the resistance of RS is very small, typically only a few milliohms to hundreds of milliohms, and in this embodiment, it is 10-100 milliohms, the voltage across the resistor is also very small. To improve the sampling accuracy, the operational amplifier AMP and resistors R3, R4, R5, and R6 form an operational amplifier circuit to convert the voltage signal across RS into the required voltage signal VIRS. This completes the sampling of the load current and converts it into a voltage signal VIRS that follows the change of the current. The MCU uses this signal to determine the magnitude of the current flowing through the load, and then completes subsequent control.

[0016] The buck-boost circuit includes a buck chip (BUCK-BOST) and an inductor. The voltage feedback terminal (FB) of the buck chip is connected to the first output terminal (VFB-OUT) of the MCU controller. One end of the inductor is connected to the inductor connection terminal (LX) of the buck chip, and the other end is connected to the sampling resistor (RS). After the buck chip is powered on, the internal switching circuit controls the frequency of the internal switching circuit according to the voltage at the FB terminal, converting electrical energy and magnetic energy in the external inductor to control the output voltage and current, i.e., the voltage and current supplied to the supercapacitor. In this embodiment, the buck chip SCT2401 is selected. When a boost is required, the boost chip SCT1270 can be used.

[0017] In this embodiment, the MOSFET is connected in series in the load circuit. When the supercapacitor has zero charge, the voltage across its terminals is also 0V. At this time, the MCU controls the MOSFET to turn off, allowing the load current to flow through the body diode of the MOSFET. The body diode will have a voltage drop of approximately 0.7V. This voltage drop is equivalent to the minimum output voltage of the BUCK-BOST circuit being 0.7V. At this point, the BUCK-BOST circuit will not trigger its protection due to the low output voltage, so the circuit normally outputs voltage and current to charge the supercapacitor, avoiding triggering the low-voltage protection of the BUCK-BOST circuit. After charging, the voltage across the capacitor will rise. When the voltage across the capacitor rises to 0.7V, the MCU detects this through VFB and controls the MOSFET to turn on through the MOSFET-EN terminal. At this time, the voltage drop across the MOSFET is only a few mV to tens of mV, greatly reducing losses. The MCU calculates using the VFB and VIRS signals and then controls the FB terminal of the BUCK-BOST chip through VFB-OUT, thereby controlling the switching frequency inside the chip to control the output voltage and current. In the initial stage of supercapacitor charging, the charging current can be kept constant to achieve constant current charging. When the capacitor reaches a set voltage value, the charging power can be kept constant by calculation based on the two data VFB and VIRS to achieve constant current charging. When the supercapacitor is fully charged, the output voltage of the BUCK-BOST circuit is kept constant to achieve constant voltage charging.

[0018] The above description provides a detailed account of one embodiment of the present invention. However, this description is merely a preferred embodiment and should not be construed as limiting the scope of the present invention. All equivalent variations and improvements made within the scope of the present invention should still fall within the patent coverage of the present invention.

Claims

1. A charging circuit for a supercapacitor, comprising a supercapacitor, characterized in that, Also includes: The system includes an MCU controller, a buck-boost circuit, a voltage sampling circuit, a load current sampling circuit, and a field-effect transistor (FET). The MCU controller detects the sampling voltage output by the load current sampling circuit and the feedback voltage output by the voltage sampling circuit. It then controls the buck-boost circuit to provide a target output voltage for the voltage sampling circuit and a target load current for the load current sampling circuit. Simultaneously, the MCU controller controls the switching state of the MOSFET to achieve initial charging using the body diode voltage drop in the FET when the supercapacitor is at zero charge. After the capacitor voltage rises to a threshold, the FET is turned on to reduce losses.

2. The charging circuit for a supercapacitor according to claim 1, characterized in that: The voltage sampling circuit includes a first resistor and a second resistor connected in series. One end of the second resistor is grounded, and the other end is connected to the first input terminal of the MCU controller. The free end of the first resistor is connected to the power supply terminal of the field-effect transistor, the output terminal of the field-effect transistor is connected to the supercapacitor, and the control terminal of the field-effect transistor is connected to the control terminal of the MCU controller.

3. The charging circuit for a supercapacitor according to claim 1 or 2, characterized in that: The load current sampling circuit includes an operational amplifier and a sampling resistor. One end of the sampling resistor is connected to the output terminal of the buck-boost circuit and the non-inverting input terminal of the operational amplifier. The other end of the sampling resistor is connected to the power supply terminal of the field-effect transistor and the inverting input terminal of the operational amplifier. The output terminal of the operational amplifier is connected to the second input terminal of the MCU controller.

4. The charging circuit for a supercapacitor according to claim 3, characterized in that: The buck-boost circuit includes a buck-boost chip and an inductor. The voltage feedback terminal of the buck-boost chip is connected to the first output terminal of the MCU controller. One end of the inductor is connected to the inductor connection terminal of the buck-boost chip, and the other end is connected to the sampling resistor.

5. The charging circuit for a supercapacitor according to claim 3, characterized in that: The resistance of the sampling resistor is 10 milliohms to 100 milliohms.

6. The charging circuit for a supercapacitor according to claim 4, characterized in that: The buck-boost chip is either the buck chip SCT2401 or the boost chip SCT1270.

7. The charging circuit for a supercapacitor according to claim 1, characterized in that: The MCU controller is an STM32F030F4P.

Citation Information

Patent Citations

  • Non-contact power supply super capacitor RGV charging protection circuit

    CN213305022U