Image sensor and electronic device

Abstract

The utility model provides an image sensor and an electronic device, the image sensor comprises a semiconductor substrate, the semiconductor substrate comprises a pixel area, a peripheral circuit area and an annular isolation area arranged between the pixel area and the peripheral circuit area, the isolation area is provided with a groove isolation structure, and the groove isolation structure is provided with a groove. And the groove isolation structure is arranged around the circumferential direction of the pixel region. According to the image sensor provided by the invention, the pixel region is not influenced by photoelectrons, and the brightness uniformity of a pixel picture in a dark field can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to an image sensor and electronic equipment. BACKGROUND

[0002] In the existing image sensor structure, back deep trench isolation (BDTI) is widely applied to the back-illuminated pixel structure design. The deep trench isolation technology is usually located between the pixels of the pixel array, and the optical and electrical crosstalk is realized by forming a physical structure. However, since the back deep trench isolation is an etching process, it will obviously increase the dark current of the pixel, and the pixel is sensitive to the dark current, which leads to poor high-temperature image performance. In the BSI structure, the pixel and the analog device are adjacent. In the absence of light, the pixel will generate a light signal due to the photoelectron generated by the analog device, thereby causing shading (pixel brightness unevenness in dark field). In particular, the structure without BDTI cannot solve the shading caused by the circuit in the absence of light, and adding BDTI on the pixel structure will cause the dark field performance of the pixel to deteriorate. CONTENT OF THE UTILITY MODEL

[0003] The purpose of the present application is to provide an image sensor and electronic equipment, which can make the pixel area not affected by photoelectrons and further improve the brightness uniformity of the pixel picture in dark field.

[0004] To solve the above technical problems, the present application provides an image sensor, comprising a semiconductor substrate, the semiconductor substrate comprising a pixel area, a peripheral circuit area and an annular isolation area arranged between the pixel area and the peripheral circuit area, the isolation area being formed with a trench isolation structure, and the trench isolation structure being arranged around the circumference of the pixel area.

[0005] Optionally, the trench isolation structure comprises a plurality of isolation rings, and the plurality of isolation rings are arranged at intervals from the pixel area towards the direction close to the peripheral circuit area.

[0006] Optionally, the plurality of isolation rings comprises at least one buffer isolation ring, and the plurality of isolation rings comprises at least one compensation isolation ring corresponding to the buffer isolation ring, the buffer isolation ring has a spacing portion, and the compensation isolation ring has a compensation portion corresponding to the spacing portion.

[0007] Optionally, the plurality of isolation rings comprises at least two buffer isolation rings, the buffer isolation rings have spacing portions, and the spacing portions of adjacent buffer isolation rings are staggered.

[0008] Optionally, the buffer isolation ring has a first diagonal and a second diagonal, and the first diagonal is perpendicular to the second diagonal, and the spacing part of two adjacent buffer isolation rings is arranged at the first diagonal and the second diagonal, respectively.

[0009] Optionally, the density of the plurality of isolation rings gradually increases from the pixel region to the peripheral circuit region; or the trench isolation structure comprises a plurality of isolation ring groups with a first pitch, each of the isolation ring groups comprises at least two isolation rings with a second pitch, and the first pitch is greater than the second pitch.

[0010] Optionally, a plurality of isolation walls are connected between at least two adjacent isolation rings, and the plurality of isolation walls are arranged at intervals.

[0011] Optionally, the isolation wall is vertically connected to two adjacent isolation rings, and the two adjacent isolation walls and the two isolation rings form a rectangular region; and / or,

[0012] Optionally, the isolation wall is arranged obliquely relative to the isolation ring, and the two adjacent isolation walls and the two isolation rings form a parallelogram region or a trapezoid; and / or,

[0013] Each of the isolation walls has at least one bending region, and the two adjacent isolation walls and the two isolation rings form a rhombus or a polygon region.

[0014] Optionally, the area of the region formed by the two adjacent isolation walls and the two isolation rings gradually increases from the pixel region to the peripheral circuit region; and / or, the width of the isolation wall gradually increases from the pixel region to the peripheral circuit region; and / or, the isolation walls have a staggered arrangement from the pixel region to the peripheral circuit region.

[0015] Optionally, the isolation ring adjacent to the peripheral circuit region comprises a plurality of reflection portions, and each of the reflection portions comprises a V-shaped reflection region.

[0016] Optionally, the photosensitive pixel unit comprises at least one photosensitive element, a transfer transistor, a floating diffusion region and a source follower transistor, the photosensitive element is configured to convert a light signal containing image information into an electrical signal during exposure; the transfer transistor is connected to the photosensitive element and the floating diffusion region, and is configured to transfer the electrical signal of the photosensitive element to the floating diffusion region; the source follower transistor is electrically connected to the floating diffusion region through an electrical connection structure, and is configured to output the electrical signal of the floating diffusion region; the photosensitive pixel unit further comprises a reset transistor, which is electrically connected to the floating diffusion region and is configured to reset the voltage of at least the floating diffusion region and the photosensitive element; and / or,

[0017] The photosensitive pixel unit comprises four photosensitive elements, four transfer transistors corresponding to the four photosensitive elements, each of the transfer transistors is arranged oppositely to form a central opening region, the source follower transistor is located in the central opening region, the floating diffusion region is connected between two adjacent transfer transistors and located on both sides of the source follower transistor, and the pixel isolation part is located between adjacent photosensitive pixel units.

[0018] Optionally, the semiconductor substrate comprises a first surface and a second surface arranged oppositely, the isolation region is formed with a patterned groove, the groove is recessed from the second surface to the first surface, and the groove is filled with an isolation material to form the trench isolation structure.

[0019] Optionally, the pixel region is formed from the first surface, and the pixel region comprises a plurality of photosensitive pixel units arranged in a matrix and a pixel isolation part formed between each photosensitive pixel unit, wherein the pixel isolation part is formed in the semiconductor substrate based on ion implantation.

[0020] Optionally, the pixel isolation part overlaps with the trench isolation structure of the isolation region.

[0021] Optionally, the trench isolation structure of the isolation region has a shielding part and a stress release part located between the shielding parts, the stress release part corresponds to the end of the pixel isolation part, so as to form a ring-shaped isolation region based on the shielding part and the corresponding pixel isolation part.

[0022] The present application also relates to an electronic device comprising the image sensor described above.

[0023] The isolation region of the image sensor of the present application can effectively alleviate the influence of the peripheral circuit region on the pixel region, in addition, the trench isolation structure in the image sensor of the present application is arranged in the isolation region outside the pixel region, the trench isolation structure does not increase the dark current of the pixel region, the trench isolation structure is used for blocking the radiation photoelectrons generated by the analog device under the condition of no light, so that the pixel region is not affected by the photoelectrons, and the brightness uniformity of the pixel picture under dark field is improved.

[0024] The above description is only a summary of the technical solutions of the present application, in order to more clearly understand the technical means of the present application, the content of the specification can be implemented, and in order to make the above and other purposes, characteristics and advantages of the present application more obvious and easy to understand, the following preferred embodiments are described in detail below, and the accompanying drawings are described as follows. BRIEF DESCRIPTION OF DRAWINGS

[0025] The drawings incorporated into the specification and forming part of the specification show embodiments consistent with the present application and, together with the specification, serve to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0026] Figure 1 is a top view schematic diagram of the image sensor of the first embodiment of the present application;

[0027] Figure 2 is Figure 1 is a partial sectional view schematic diagram of the image sensor shown in the figure;

[0028] Figure 3 is a pixel circuit structure schematic diagram of the image sensor of the present application;

[0029] Figure 4 is a structure schematic diagram of the photosensitive pixel unit of the present application;

[0030] Figure 5 is a top view schematic diagram of the image sensor of the second embodiment of the present application;

[0031] Figure 6 is a top view schematic diagram of the image sensor of the third embodiment of the present application;

[0032] Figure 7 is a top view schematic diagram of the image sensor of the fourth embodiment of the present application;

[0033] Figure 8 is a top view schematic diagram of the image sensor of the fifth embodiment of the present application;

[0034] Figure 9is a top view schematic diagram of an image sensor of a sixth embodiment of the present application;

[0035] Figure 10 is a partial top view schematic diagram of an image sensor of a seventh embodiment of the present application.

[0036] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments in conjunction with the drawings. The above-described drawings have shown the specific embodiments of the present application, and more detailed descriptions will be given hereinafter. These drawings and the written description are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application for those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0037] The implementation of the present application will be described below by specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in the present description.

[0038] In the following description, reference is made to the accompanying drawings, which illustrate several embodiments of the present application. It is to be understood that other embodiments can be used and that mechanical, structural, electrical, and operational changes can be made without departing from the spirit and scope of the present application. The following detailed description is not intended to be taken in a limiting sense, and the terms used herein are for the purpose of description, not limitation.

[0039] Although the terms first, second, etc. are used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

[0040] Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises", "comprising", "includes" and / or "including" used herein, specify the presence of stated features, steps, operations, elements, components, items, and / or groups but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, items, and / or groups thereof. As used herein, the term "or" and "and / or" are to be interpreted as inclusive, i.e., as meaning one or more of the stated items is present. Therefore, "A, B, or C" or "A, B, and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B, and C". An exception to this definition will occur only when a combination of elements, functions, steps or acts are in some way inherently mutually exclusive.

[0041] First Embodiment

[0042] Figure 1 is a top view schematic diagram of an image sensor of a sixth embodiment of the present application,Figure 2 is Figure 1 a partial sectional view of an image sensor, as Figure 1 and Figure 2 shown, the image sensor includes a semiconductor substrate 10, the semiconductor substrate 10 includes a pixel region 12, a peripheral circuit region 13, and an annular isolation region 14 disposed between the pixel region 12 and the peripheral circuit region 13, the isolation region 14 is formed with a trench isolation structure 14a, the trench isolation structure 14a is disposed around the circumference of the pixel region 12, wherein the around here can be understood as the shape around.

[0043] The isolation region 14 of the image sensor of the present application can effectively alleviate the influence of the peripheral circuit region 13 on the pixel region 12, in addition, the trench isolation structure 14a in the image sensor of the present application can be disposed in the isolation region 14 outside the pixel region 12, the trench isolation structure 14a will not increase the dark current of the pixel region 12, the trench isolation structure 14a can block the radiation photoelectrons generated by the analog device, so that the pixel region 12 is not affected by the photoelectron, and the pixel picture brightness uniformity is improved; using the design of the present application, the non-uniformity of the pixel brightness under the dark field of the image sensor can be effectively improved, under the BSI structure, the pixel region 12 and the peripheral circuit region 13 are adjacent, under no light, the pixel region 12 will generate photoelectrons due to the radiation of the analog device of the peripheral circuit region 13, and the corresponding light signal will be generated for the pixel row / column of the pixel array close to the peripheral circuit region 13, thereby generating the non-uniformity of the pixel brightness under the dark field, based on the design of the isolation region 14 of the present application, the above problems can be effectively alleviated.

[0044] Optionally, as Figure 1 shown, the trench isolation structure 14a includes a plurality of isolation rings 141, the plurality of isolation rings 141 are arranged at intervals from the pixel region 12 to the direction close to the peripheral circuit region 13.

[0045] In a preferred embodiment, the density of the plurality of isolation rings 141 gradually increases from the pixel region 12 to the direction close to the peripheral circuit region 13. In a preferred embodiment, the trench isolation structure 14a includes a plurality of isolation ring groups with a first pitch, each isolation ring group includes at least two isolation rings 141 with a second pitch, and the first pitch is greater than the second pitch.

[0046] Based on the above-mentioned embodiment, the pixel brightness non-uniformity improvement can be improved while optimizing the stress of the image sensor, and the influence of the stress of the isolation region 14 on the pixel region 12 is alleviated.

[0047] Optionally, as Figure 2As shown, the semiconductor substrate 10 includes a first surface 101 and a second surface 102 oppositely arranged, the isolation region 14 is formed with a patterned groove, the groove is formed recessed from the second surface 102 toward the first surface 101, and the groove is filled with an isolation material to form a trench isolation structure 14a. The filling material of the trench isolation structure 14a includes but is not limited to silicon oxide. In addition, the depth of the trench isolation structure 14a can penetrate the semiconductor substrate, of course, it can also be designed according to actual needs, as long as it does not affect the realization of the function in the present application.

[0048] Optionally, the pixel region 12 is formed from the first surface 101, and the pixel region 12 includes a plurality of light sensing pixel units 121 arranged in a matrix and pixel isolation portions 122 formed between the light sensing pixel units 121, the pixel isolation portions 122 are formed in the semiconductor substrate 10 based on ion implantation.

[0049] In an optional example, for the N-type doped light sensing pixel unit 121, the pixel isolation portion 122 is a P-type doped isolation structure, and the pixel isolation is realized based on a barrier mode.

[0050] In the present embodiment, the isolation in the pixel region 12 adopts a doped isolation mode, which can optimize the dark current of the pixel region 12 compared to the back deep trench isolation mode. The position of the deep trench isolation is usually between the pixels of the pixel array, and the optical and electrical cross talk is realized by forming a physical structure. However, since there is one etching process when forming the back deep trench isolation, the dark current of the pixel is obviously increased, the pixel is sensitive to the dark current, and the high-temperature image performance is poor. In the present embodiment, the influence of the radiation photoelectrons of the analog devices and the like in the peripheral circuit region 13 on the pixel region 12 is improved without increasing the dark current of the pixel region 12. Of course, in the specific implementation mode, the pixel region 12 can also include a shallow trench isolation structure STI formed on the front side, which does not affect the effect that the ion doped isolation can realize in the present implementation mode.

[0051] In an optional example, the pixel isolation portion 122 and the trench isolation structure 14a of the isolation region 14 have an overlap, that is, the lower region of the pixel isolation portion 122 formed by the front ion doping and the lower region of the trench isolation structure 14a formed on the back side overlap, which can effectively optimize the performance in the pixel region 12 region, and the size of the overlap can be designed according to actual needs.

[0052] Optionally, Figure 3 is a schematic diagram of a pixel circuit structure of an image sensor of the present application, as Figure 1 and Figure 3As shown, the photosensitive pixel unit 121 comprises at least one photosensitive element PD, a transfer transistor TX, a floating diffusion region FD, and a source follower transistor SF, the photosensitive element PD is used to convert a light signal containing image information into an electrical signal during exposure; the transfer transistor TX is connected between the photosensitive element PD and the floating diffusion region FD, and is used to transfer the electrical signal of the photosensitive element PD to the floating diffusion region FD; the source follower transistor SF is electrically connected to the floating diffusion region FD through an electrical connection structure, and is used to output the electrical signal of the floating diffusion region FD, and the photosensitive pixel unit 121 further comprises a reset transistor RST, which is electrically connected to the floating diffusion region FD, and is used to reset the voltage of at least the floating diffusion region FD and the photosensitive element PD.

[0053] Optionally, the pixel circuit can further comprise a gain control transistor DCG, which can be but is not limited to disposed between the floating diffusion region FD and the reset transistor RST.

[0054] Optionally, the photosensitive pixel unit 121 further comprises a selection transistor RS, which is used to output the electrical signal output by the source follower transistor SF to a column line (Pixel out).

[0055] Optionally, Figure 4 is a structural schematic diagram of the photosensitive pixel unit of the present application, as Figure 4 shown, the photosensitive pixel unit 121 comprises four photosensitive elements PD, four transfer transistors TX corresponding to the four photosensitive elements PD, each transfer transistor TX is oppositely disposed to form a central opening region, the source follower transistor SF is located in the central opening region, the floating diffusion region FD comprises two floating diffusion nodes FD1 and FD2, which are respectively connected between adjacent two transfer transistors TX and located on both sides of the source follower transistor SF, wherein the pixel isolation part 122 is at least located between adjacent photosensitive pixel units 121, further, the pixel isolation part 122 is also disposed between adjacent photosensitive elements PD, and the specific position can be designed according to actual needs.

[0056] Optionally, as Figure 3 and Figure 4 shown, the semiconductor substrate 10 is subjected to a doping treatment, for example, an ion implantation process, so as to form the source and drain of the photosensitive element PD, the floating diffusion region FD, and the transfer transistor TX, the source follower transistor SF, the reset transistor RST, the gain control transistor DCG, and the selection transistor RS in the semiconductor substrate 10.

[0057] Optionally, the semiconductor substrate 10 as the base of the image sensor can be a structure of a single layer of material, including but not limited to a silicon substrate, and the material can be monocrystalline silicon, monocrystalline germanium, polycrystalline silicon, amorphous silicon, and can also be a silicon germanium compound, silicon-on-insulator (SOI), etc. It can also be a multi-layer structure, such as including a semiconductor substrate 10 (such as a Si substrate) and an epitaxial layer (such as a P-type epitaxial layer p-epi) formed on the surface of the semiconductor substrate 10. At this time, the epitaxial layer serves as a device functional layer to realize the preparation of the device of the image sensor. The semiconductor substrate 10 can also have N or P type doped regions to meet actual needs.

[0058] Optionally, the image sensor further includes a filter layer (not shown in the figure), and the filter layer is arranged on the second surface 102 of the semiconductor substrate 10 to obtain a back-illuminated image sensor. In the embodiment, the filter layer includes a plurality of filter units arranged in correspondence with the respective light sensing elements PD.

[0059] Optionally, the image sensor further includes a lens array (not shown in the figure), and the lens array is arranged on the filter layer. The lens array includes a plurality of lens units, each of which is arranged in one-to-one correspondence with each filter unit of the filter layer. Of course, other arrangement modes can also be used.

[0060] Optionally, as shown in Figure 1 , the image sensor further includes an interconnection layer (not shown in the figure). For example, in a back-illuminated image sensor, the interconnection layer is arranged on the side of the semiconductor substrate 10 away from the lens array, and the interconnection layer is provided with an interconnection structure and a dielectric layer electrically connected to each light sensing pixel unit 121. In the embodiment, the interconnection layer can undergo multiple photolithography, etching, deposition and planarization operations. Of course, the position of the interconnection layer can also be arranged according to actual needs, and can be arranged to form a back-illuminated image sensor BSI as shown in Figure 1 , and in other implementation modes, can be arranged to form a front-illuminated image sensor FSI.

[0061] Optionally, the material of the interconnection structure is titanium, tungsten, aluminum or copper, but is not limited thereto.

[0062] The utility model also provides an electronic equipment, including the image sensor of any one of the above-mentioned scheme. The electronic equipment can be a security monitoring, vehicle-mounted electronic, mobile phone camera, machine vision and the like, and the image sensor based on the utility model can obtain high-quality image information and can be used in infrared utilization equipment.

[0063] Second embodiment

[0064] Figure 5 is a top view schematic diagram of the image sensor of the second embodiment of the application, and as shown in Figure 5As shown, the image sensor of the embodiment is substantially the same as the image sensor of the first embodiment in structure, and the difference lies in the structure of the isolation ring 141. In the embodiment, the plurality of isolation rings 141 has at least one buffer isolation ring 1411, and the plurality of isolation rings 141 has at least one compensation isolation ring 1412 corresponding to the buffer isolation ring 1411, the buffer isolation ring 1411 has a spacing portion 1411a, and the compensation isolation ring 1412 has a compensation portion 1412a corresponding to the spacing portion 1411a. The present implementation adopts the design of the combined isolation ring 141, wherein the spacing portion 1411a can relieve the stress of the isolation region 14, and the setting of the compensation portion 1412a can prevent the possibility that the radiation of the peripheral circuit region 13 penetrates the isolation region 14 to affect the pixel region 12 due to the existence of the spacing portion 1411a, and prevent the problem of deteriorated image quality caused thereby.

[0065] Third embodiment

[0066] Figure 6 is a top view schematic diagram of an image sensor of the third embodiment of the present application, as Figure 6 As shown, the image sensor of the embodiment is substantially the same as the image sensor of the first embodiment in structure, and the difference lies in the structure of the isolation ring 141. In the embodiment, the plurality of isolation rings 141 has at least one buffer isolation ring 1411, and the plurality of isolation rings 141 has at least one compensation isolation ring 1412 corresponding to the buffer isolation ring 1411, the buffer isolation ring 1411 has a spacing portion 1411a, and the compensation isolation ring 1412 has a compensation portion 1412a corresponding to the spacing portion 1411a. The present implementation adopts the design of the combined isolation ring 141, wherein the spacing portion 1411a can relieve the stress of the isolation region 14, and the setting of the compensation portion 1412a can prevent the possibility that the radiation of the peripheral circuit region 13 penetrates the isolation region 14 to affect the pixel region 12 due to the existence of the spacing portion 1411a, and prevent the problem of deteriorated image quality caused thereby.

[0067] Fourth embodiment

[0068] Figure 7 is a top view schematic diagram of an image sensor of the fourth embodiment of the present application, as Figure 7 As shown, the image sensor of the embodiment is substantially the same as the image sensor of the third embodiment in structure, and the difference lies in the structure of the isolation ring 141. In the embodiment, the buffer isolation ring 1411 has a first diagonal and a second diagonal, and the direction of the first diagonal and the direction of the second diagonal intersect, wherein the spacing portions 1411a of the adjacent two buffer isolation rings 1411 are respectively arranged at the first diagonal and the second diagonal.

[0069] Optionally, the buffer isolation ring 1411 is rectangular.

[0070] Specifically, referring to Figure 7As shown, the interval part 1411a of the present embodiment is formed at the corner of the isolation ring 141, and the interval part 1411a at the corner of each isolation ring 141 does not form a communication between the pixel region 12 and the peripheral circuit region 13. In a further design, the interval part 1411a is arranged in a manner of interval between the first diagonal and the second diagonal, which can uniformly optimize the performance of the isolation region 14 and further improve the imaging quality.

[0071] Fifth Embodiment

[0072] Figure 8 is a top view of an image sensor of the fifth embodiment of the present application, and Figure 8 As shown, the image sensor of the present embodiment is substantially the same as the image sensor of the above-mentioned embodiments in structure, and the difference lies in the structure of the isolation region 14. In the present embodiment, the isolation region 14 includes the isolation ring 141 and the isolation wall 142, and a plurality of isolation walls 142 are connected between at least two adjacent isolation rings 141, and the plurality of isolation walls 142 are arranged at intervals.

[0073] Optionally, the isolation wall 142 is vertically connected to the two adjacent isolation rings 141, and the two adjacent isolation walls 142 and the two isolation rings 141 form a rectangular region.

[0074] Optionally, the isolation wall 142 is arranged obliquely relative to the isolation ring 141, and the two adjacent isolation walls 142 and the two isolation rings 141 form a parallelogram region or a trapezoid.

[0075] In a preferred embodiment, each isolation wall 142 has at least one bending region, and the two adjacent isolation walls 142 and the two isolation rings 141 form a rhombus or a polygon region.

[0076] Among them, the shape of the interval region enclosed by the adjacent isolation ring 141 and the isolation wall 142 can be selected according to actual needs, and one image sensor chip can form an enclosed region of one shape, or a combination of enclosed regions of multiple different shapes.

[0077] In a preferred embodiment, the area of the region enclosed by the two adjacent isolation walls 142 and the two isolation rings 141 gradually increases from the pixel region 12 to the direction close to the peripheral circuit region 13.

[0078] In a preferred embodiment, the width of the isolation wall 142 gradually increases from the pixel region 12 to the direction close to the peripheral circuit region 13.

[0079] Based on the above-mentioned embodiments, the pixel brightness non-uniformity can be improved while the stress of the image sensor is optimized, and the influence of the stress of the isolation region 14 on the pixel region 12 is alleviated.

[0080] In a preferred embodiment, the isolation walls 142 are misaligned in the direction from the pixel region 12 toward the peripheral circuit region 13. This is beneficial for improving device stability based on the isolation regions 14.

[0081] Sixth Embodiment

[0082] Figure 9 This is a top view schematic diagram of the image sensor according to the sixth embodiment of this application, as shown below. Figure 9 As shown, the image sensor in this embodiment has a structure that is largely the same as the image sensor in the above embodiments, except that the structure of the isolation region 14 is different. In this embodiment, the isolation region 14 includes at least one isolation ring 141 with a reflective area. The isolation ring 141 adjacent to the peripheral circuit region 13 includes multiple reflective portions 143, each of which includes a V-shaped reflective area. The V-shaped reflective area can reflect the radiation from the peripheral circuit region 13, thereby enhancing the blocking effect of the isolation region 14 on the peripheral circuit region 13. On the other hand, it facilitates flexible design within the isolation region 14.

[0083] Seventh Embodiment

[0084] Figure 10 This is a partial top view schematic diagram of the image sensor according to the seventh embodiment of this application, as shown below. Figure 10 As shown, the image sensor in this embodiment has a structure that is largely the same as the image sensor in the above embodiments, except that the structure of the isolation region 14 is different. In this embodiment, the trench isolation structure 14a of the isolation region 14 has a blocking portion 144 and a stress relief portion 145 located between the blocking portions 144. The stress relief portion 145 corresponds to the end of the pixel spacing portion 122, so as to form an annular isolation region 14 based on the blocking portion 144 and the corresponding pixel spacing portion 122.

[0085] In this embodiment, the pixel spacing portion 122 of the pixel region 12 is formed by ion implantation, that is, the pixel region 12 adopts the isolation method of doped region. In this embodiment, the end of the isolation ring 141 corresponding to the strip doped region isolation is designed as the stress relief portion 145 of the trench isolation structure 14a. At the same time, the position of the parallel isolation ring 141 of the pixel region 12 is designed as the shielding portion 144, so that the isolation effect of the isolation region 14 formed by doping can be enhanced while the stress relief of the isolation region 14 can be achieved.

[0086] Optionally, the pixel interval portion 122 comprises a plurality of first interval strips 1221 and a plurality of second interval strips 1222, the plurality of first interval strips 1221 are arranged at intervals along a first direction, the plurality of second interval strips 1222 are arranged at intervals along a second direction, the plurality of first interval strips 1221 and the plurality of second interval strips 1222 are cross-connected, and the end of at least one interval strip in each first interval strip 1221 and each second interval strip 1222 is arranged corresponding to the stress release portion 145. In the embodiment, the end of each interval strip is arranged corresponding to the stress release portion 145. In the embodiment, the first direction and the second direction are perpendicular to each other, but are not limited thereto.

[0087] The above embodiments are only illustrative of the principles and effects of the present application, and are not intended to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present application should be covered by the claims of the present application.

Claims

1. An image sensor, characterized in that, The device includes a semiconductor substrate, the semiconductor substrate including a pixel region, a peripheral circuit region, and an annular isolation region disposed between the pixel region and the peripheral circuit region, the isolation region having a trench isolation structure disposed around the circumference of the pixel region; the pixel region including a plurality of photosensitive pixel units arranged in a matrix and pixel isolation portions formed between each photosensitive pixel unit, wherein the pixel isolation portions are formed on the semiconductor substrate based on ion implantation.

2. The image sensor as described in claim 1, characterized in that, The trench isolation structure includes multiple isolation rings, which are arranged at intervals from the pixel area toward the peripheral circuit area.

3. The image sensor as described in claim 2, characterized in that, The plurality of isolation rings includes at least one buffer isolation ring, and the plurality of isolation rings includes at least one compensation isolation ring corresponding to the buffer isolation ring. The buffer isolation ring has a gap portion, and the compensation isolation ring has a compensation portion corresponding to the gap portion.

4. The image sensor as described in claim 2, characterized in that, The plurality of isolation rings includes at least two buffer isolation rings, the buffer isolation rings having a spacer portion, and the spacers of adjacent buffer isolation rings being staggered from each other.

5. The image sensor as described in claim 4, characterized in that, The buffer isolation ring has a first diagonal and a second diagonal, and the direction of the first diagonal intersects the direction of the second diagonal. The interval portion of two adjacent buffer isolation rings is respectively located at the first diagonal and the second diagonal.

6. The image sensor as described in claim 2, characterized in that, The density of the plurality of isolation rings gradually increases from the pixel area toward the peripheral circuit area; or, the trench isolation structure includes a plurality of isolation ring groups with a first spacing, each isolation ring group including at least two isolation rings with a second spacing, the first spacing being greater than the second spacing.

7. The image sensor as described in claim 2, characterized in that, At least two adjacent isolation rings are connected by multiple isolation walls, and the multiple isolation walls are arranged at intervals.

8. The image sensor as claimed in claim 7, characterized in that, The isolation wall is vertically connected to two adjacent isolation rings, and the two adjacent isolation walls and the two isolation rings enclose a rectangular area; and / or, the isolation wall is inclined relative to the isolation rings, and the two adjacent isolation walls and the two isolation rings enclose a parallelogram area or a trapezoid; and / or, each isolation wall has at least one bending area, and the two adjacent isolation walls and the two isolation rings enclose a rhombus or polygon area.

9. The image sensor as claimed in claim 7, characterized in that, The area of ​​the region formed by the two adjacent isolation walls and the two isolation rings gradually increases from the pixel area toward the peripheral circuit area; and / or, the width of the isolation wall gradually increases from the pixel area toward the peripheral circuit area; and / or, the isolation walls are misaligned from the pixel area toward the peripheral circuit area.

10. The image sensor as claimed in claim 2, characterized in that, The isolation ring adjacent to the peripheral circuit area includes multiple reflective portions, each of which includes a V-shaped reflective region.

11. The image sensor as claimed in claim 1, characterized in that, The pixel region includes multiple photosensitive pixel units arranged in a matrix. Each photosensitive pixel unit includes at least one photosensitive element, a transfer transistor, a floating diffusion region, and a source follower transistor. The photosensitive element is used to convert light signals containing image information into electrical signals during exposure. The transfer transistor connects the photosensitive element and the floating diffusion region and is used to transfer the electrical signals of the photosensitive element to the floating diffusion region. The source follower transistor is electrically connected to the floating diffusion region through an electrical connection structure and is used to output the electrical signals of the floating diffusion region. The photosensitive pixel unit also includes a reset transistor, which is electrically connected to the floating diffusion region and is used to reset the voltage of at least the floating diffusion region and the photosensitive element. Alternatively, the photosensitive pixel unit includes four photosensitive elements and four transfer transistors corresponding to the four photosensitive elements. Each transfer transistor is arranged facing each other to form a central opening region. The source follower transistor is located in the central opening region, and the floating diffusion region is connected between two adjacent transfer transistors and located on both sides of the source follower transistor.

12. The image sensor according to any one of claims 1 to 11, characterized in that, The semiconductor substrate includes a first surface and a second surface disposed opposite to each other. The isolation region is formed with patterned grooves that are recessed from the second surface toward the first surface. The grooves are filled with an isolation material to form the trench isolation structure.

13. The image sensor as claimed in claim 12, characterized in that, The pixel isolation portion overlaps with the trench isolation structure of the isolation region.

14. The image sensor as claimed in claim 12, characterized in that, The trench isolation structure of the isolation area has a shielding portion and a stress relief portion located between the shielding portions. The stress relief portion corresponds to the end of the pixel isolation portion to form an annular isolation area based on the shielding portion and the corresponding pixel isolation portion.

15. An electronic device, characterized in that, Including the image sensor as described in any one of claims 1-14.

Images