Integrated circuit chip packaging structure
By using a snap-fit structure and silicone sealing gaskets to block dust, combined with copper heat-conducting plates and heat sinks for cooling, the problems of dust adhesion and excessive temperature are solved, improving the reliability and performance of chip packaging.
Patent Information
- Application Number
- CN202423300914.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2034-12-31
AI Technical Summary
Traditional chip packaging methods allow dust to adhere to the chip surface through gaps, affecting signal transmission delay and errors, and excessive chip temperature may cause damage.
The design employs a snap-fit structure between the upper and lower chip housings, a silicone sealing gasket, and a copper heat-conducting plate to create a sealed environment that prevents dust from entering and reduces chip temperature through the heat-conducting plate and heat sink.
It effectively prevents dust adhesion, improves signal transmission efficiency, reduces chip temperature, avoids damage, and enhances the reliability and performance of the packaging structure.
Smart Images
Figure CN223957973U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to chip packaging technical field especially relates to an integrated circuit chip packaging structure. BACKGROUND
[0002] With the continuous progress of integrated circuit technology, chip packaging structure also faces higher performance demand and size limit, traditional chip packaging mode, through the chip is installed in the mounting seat inside, and through the upper chip shell and the lower chip shell are connected, make the completion to the chip packaging, the chip is installed in the mounting seat inside, and through the upper chip shell and the lower chip shell are connected, make the completion to the chip packaging,
[0003] But the traditional chip packaging is completed, the dust in the air can be contacted with the chip after packaging through the gap between the upper chip shell and the lower chip shell, so that the dust will adhere to the surface of the chip, affect the performance of the chip, cause the signal transmission of the chip to delay and error. SUMMARY
[0004] The utility model discloses in the prior art, the dust in the air can be contacted with the chip after packaging through the gap between the upper chip shell and the lower chip shell, so that the dust will adhere to the surface of the chip, affect the performance of the chip, cause the signal transmission of the chip to delay and error, and propose the following technical scheme:
[0005] An integrated circuit chip packaging structure, including: the upper chip shell, the lower chip shell is connected with the lower chip shell bottom end joint, the upper chip shell and the lower chip shell inside are provided with mounting seat, the mounting seat is connected between the upper chip shell and the lower chip shell and is connected with joint, the outer surface of mounting seat is fixedly connected with a plurality of pins, the bottom end of the upper chip shell and the top end edge position of the lower chip shell are all fixedly connected with the joint block, the bottom end of the upper chip shell is fixedly connected with the block, the block is located in the middle position of the joint block, the inside of the lower chip shell is provided with the slot, and the upper chip shell and the lower chip shell are connected through the joint of the block and the slot, and the edge position of the top end and the bottom end of the mounting seat is all fixedly connected with the baffle.
[0006] As the preferred technical scheme, the inside of the mounting seat is provided with the positioning slot, and the joint block is slidably connected in the positioning slot.
[0007] As the preferred technical scheme, the inside of the mounting seat is provided with the positioning slot, and the joint block is slidably connected in the positioning slot.
[0008] As the preferred technical scheme, the shape of the baffle is set as a back-to-back shape, and the end face opposite to the mounting seat of the baffle is set as an inclined surface.
[0009] As the preferred technical scheme, the lower chip shell is internally fixed with several heat-conducting plates, the bottom end of the heat-conducting plate is attached with a heat-dissipating fin, and the heat-dissipating fin is embeddedly installed at the bottom end of the lower chip shell.
[0010] As the preferred technical scheme, the heat-conducting plate is made of copper material.
[0011] The utility model discloses a beneficial effect is:
[0012] (1) through the upper chip shell and the lower chip shell installation, make the upper chip shell and the lower chip shell inside form sealed environment, effectively block the dust in the air into the upper chip shell and the lower chip shell inside and the chip contact, avoid the dust adhered on the chip surface, lead to the influence chip's work efficiency;
[0013] (2) through the heat-conducting plate absorbs the temperature on the chip surface, and is transferred to the surface of the heat-dissipating fin, and then the heat-dissipating fin is transferred to the surface of the circuit board, effectively reduces the temperature generated when the chip is used, avoids the problem that the chip is damaged due to the temperature of the chip is too high. BRIEF DESCRIPTION OF DRAWINGS
[0014] Figure 1 The structure diagram of the integrated circuit chip packaging structure in embodiment 1 is shown.
[0015] Figure 2 The sectional view of the integrated circuit chip packaging structure in embodiment 1 is shown.
[0016] Figure 3 The structure diagram of the A area in the integrated circuit chip packaging structure in embodiment 1 is shown. Figure 2
[0017] Figure 4 The explosion diagram of the integrated circuit chip packaging structure in embodiment 1 is shown.
[0018] Figure 5 The bottom explosion diagram of the integrated circuit chip packaging structure in embodiment 1 is shown.
[0019] In the drawing: 1, upper chip shell;2, lower chip shell;3, mounting seat;4, pin;5, clamping block;6, clamping block;7, baffle;8, silica gel sealing gasket;9, heat-conducting plate;10, heat-dissipating fin. DETAILED DESCRIPTION
[0020] In order to make the purpose, technical scheme and advantage of the utility model embodiment more clear, the utility model technical scheme will be clearly and completely described below in combination with the embodiment.
[0021] Embodiment 1
[0022] The utility model provides a kind of integrated circuit chip packaging structure, as shown in Figures 1 to 5 It includes, upper chip shell 1 is connected with lower chip shell 2 at bottom end, installation seat 3 is arranged in upper chip shell 1 and lower chip shell 2, installation seat 3 is connected between upper chip shell 1 and lower chip shell 2, the outer surface of installation seat 3 is fixedly connected with several pins 4, the edge position of bottom end of upper chip shell 1 and top end of lower chip shell 2 is fixedly connected with clamping block 5, the bottom end of upper chip shell 1 is fixedly connected with clamping block 6, clamping block 6 is located in the middle position of clamping block 5, clamping groove is set in lower chip shell 2, and upper chip shell 1 and lower chip shell 2 are connected by clamping block 6 and clamping groove, the edge position of top end and bottom end of installation seat 3 is fixedly connected with baffle 7.
[0023] As shown in Figure 4 And Figure 5 Positioning groove is set in installation seat 3, and clamping block 5 is slidably connected in the positioning groove, so that installation seat 3, upper chip shell 1 and lower chip shell 2 can be positioned, thereby simplifying the positioning process between installation seat 3, upper chip shell 1 and lower chip shell 2, and improving the installation efficiency between upper chip shell 1, lower chip shell 2 and installation seat 3.
[0024] As shown in Figures 2 to 5 Groove is set in upper chip shell 1 and lower chip shell 2, and baffle 7 is slidably connected in the groove, and silica gel gasket 8 is attached to one end surface of baffle 7, when upper chip shell 1 and lower chip shell 2 are installed with installation seat 3, baffle 7 on the surface of installation seat 3 is installed in upper chip shell 1 and lower chip shell 2, and the gap between upper chip shell 1 and lower chip shell 2 is blocked by baffle 7, so that dust in the air contacts the chip through the gap between upper chip shell 1 and lower chip shell 2, avoiding the problem that the chip is short-circuited when used due to dust adhered to the surface of the chip.
[0025] As shown in Figures 2 to 5 Baffle 7 is set as a shape of a back-shaped character, and the end surface of baffle 7 opposite to installation seat 3 is set as an inclined surface, so that baffle 7 is more easily installed in upper chip shell 1 and lower chip shell 2, avoiding the process of installation failure due to deviation when baffle 7 is installed in upper chip shell 1 and lower chip shell 2, thereby improving the efficiency of installing baffle 7 in upper chip shell 1 and lower chip shell 2.
[0026] As shown in Figures 2 to 5As shown, the lower chip housing 2 is internally fixed with several heat-conducting plates 9, and the bottom end of the heat-conducting plate 9 is attached with a cooling fin 10, and the heat-conducting plate 9 and the cooling fin 10 are both made of copper material after electroplating chromium, and the cooling fin 10 is embedded and installed at the bottom end of the lower chip housing 2, and the chip will generate heat during use, and the heat is absorbed by the heat-conducting plate 9 and transmitted to the surface of the cooling fin 10, and then transmitted to the surface of the circuit board through the cooling fin 10, so that the temperature generated during the use of the chip is effectively reduced, and the problem of chip damage caused by the temperature of the chip being too high is avoided.
[0027] As shown in the drawings, Figures 2 to 5 The heat-conducting plate 9 is made of copper material, which can more effectively absorb the temperature on the surface of the chip and transmit it, avoiding the problem of chip damage caused by the temperature generated during the use of the chip being too high.
[0028] Working principle: during installation, the worker places the chip inside the mounting seat 3, and installs the mounting seat 3 on the surface of the lower chip housing 2, and then aligns the bottom end of the upper chip housing 1 with the top end of the lower chip housing 2, and positions the upper chip housing 1, the lower chip housing 2 and the mounting seat 3 through the clamping block 5, and after positioning, the upper chip housing 1 and the lower chip housing 2 are clamped through the clamping block 5 and the clamping groove, at this time the baffle 7 on the surface of the mounting seat 3 will slide inside the upper chip housing 1 and the lower chip housing 2, and through the extrusion between the upper chip housing 1, the lower chip housing 2 and the silica gel sealing gasket 8, a sealed environment is formed inside the upper chip housing 1 and the lower chip housing 2, effectively blocking the dust in the air, and the chip is in contact with the gap between the upper chip housing 1 and the lower chip housing 2, avoiding the dust adhering to the surface of the chip, which affects the working efficiency of the chip.
[0029] During use, the chip will generate heat, which is absorbed by the heat-conducting plate 9 and transmitted to the surface of the cooling fin 10, and then transmitted to the surface of the circuit board through the cooling fin 10, effectively reducing the temperature generated during the use of the chip, and avoiding the problem of chip damage caused by the temperature of the chip being too high.
[0030] The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them.
Claims
1. An integrated circuit chip package structure, comprising: Include: The upper chip shell (1), the lower chip shell (2) is connected at the bottom end, the upper chip shell (1) and lower chip shell (2) are provided with mounting seat (3), the mounting seat (3) is connected between the upper chip shell (1) and lower chip shell (2), the outer surface of mounting seat (3) is fixedly connected with several pins (4), the bottom end of upper chip shell (1) and the top edge position of lower chip shell (2) are fixedly connected with clamping block (5), the bottom end of upper chip shell (1) is fixedly connected with clamping block (6), the clamping block (6) is located at the middle position of clamping block (5), the inside of lower chip shell (2) is provided with clamping groove, the upper chip shell (1) and lower chip shell (2) are connected through clamping block (6) and clamping groove, the top edge position of mounting seat (3) is fixedly connected with baffle (7).
2. The integrated circuit chip package structure of claim 1, wherein, The inside of mounting seat (3) is provided with positioning groove, the clamping block (5) is connected in the inside of positioning groove.
3. The integrated circuit chip package structure of claim 1, wherein, The inside of upper chip shell (1) and lower chip shell (2) is provided with recess, the baffle (7) is connected in the inside of recess, the end face of baffle (7) is pasted with silica gel gasket (8).
4. The integrated circuit chip package structure of claim 1, wherein The shape of baffle (7) is set as back-to-back, the end face of baffle (7) opposite to mounting seat (3) is set as inclined plane.
5. The integrated circuit chip package structure of claim 1, wherein The inside of lower chip shell (2) is fixedly connected with several heat conduction plates (9), the bottom end of heat conduction plate (9) is pasted with fin (10), the fin (10) is embedded and installed in the bottom end of lower chip shell (2).
6. The integrated circuit chip package structure of claim 5, wherein, The material of heat conduction plate (9) is set as copper material.