Isolated circuit board
By separating isolation areas within the electrical layers of the circuit board and removing copper foil, combined with irregularly shaped isolation devices and highly insulating materials, the problems of circuit board design complexity and dielectric strength are solved, achieving simplified design and reliable electrical isolation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-16
- Publication Date
- 2026-03-03
AI Technical Summary
In order to ensure the isolation effect, existing technology usually requires slotting under the components when designing circuit boards, which increases the complexity of circuit board design and makes it difficult to meet the requirements of dielectric strength.
Design an isolated circuit board by separating an isolation area in the inner power layer and removing the copper foil in the isolation area, using an irregularly shaped isolation device, and combining it with a substrate of high insulating material to ensure electrical isolation between the isolation device and the inner power layer, and by setting peripheral parts and functional ground parts in the conductive area to prevent leakage paths.
It simplifies design and reduces costs while ensuring electrical isolation, avoiding short-circuit risks and noise coupling, and meeting EMC and dielectric strength requirements.
Smart Images
Figure CN223968022U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of circuit board technology, and in particular to an isolated circuit board. Background Technology
[0002] Printed Circuit Boards (PCBs) are an indispensable part of electronic devices. They not only provide physical support for electronic components but also connect these components through conductive paths, allowing current to flow between them. PCB design and manufacturing technologies have continuously advanced with the development of the electronics industry and have now become a key component in almost all electronic products. PCBs have several qualification indicators. Among them, dielectric strength is an important indicator for assessing electrical insulation, ensuring good insulation of the circuit to ground even when high-voltage external current intrudes. EMC refers to the ability of a device or system to operate within its electromagnetic environment without causing intolerable electromagnetic interference to any other equipment in that environment. Medical devices come into direct or indirect contact with the human body. To ensure stable and reliable operation and prevent malfunctions or interference with patient monitoring, other medical devices, or wireless communication systems caused by the operation of other equipment, medical devices generally need to meet EMC requirements. Furthermore, to prevent the risk of electric shock to patients during use, medical devices must meet specified dielectric strength requirements.
[0003] To meet the above requirements, it is generally necessary to select devices with sufficient dielectric strength for isolation. However, to ensure the reliability of isolation, slotting is usually performed under the components. But this setup increases the complexity of the circuit board design; complex circuitry can actually make it easier for the dielectric strength to fail to meet the requirements. Utility Model Content
[0004] The purpose of this invention is to provide an isolated circuit board that is low in cost, simple in design, and has a reliable isolation effect.
[0005] To achieve this objective, the present invention adopts the following technical solution:
[0006] An isolated circuit board includes a bottom layer, an inner power layer, and a top layer stacked sequentially. The inner power layer is covered with copper foil and is divided into a conductive region and an isolation region. The copper foil on the surface of the isolation region is removed, and the isolation region has an irregular shape. An isolation device is mounted on the bottom layer and / or the top layer, and the projection of the isolation device is located in the isolation region.
[0007] Preferably, the copper foil in the isolation zone is removed by etching.
[0008] Preferably, the conductive area includes a peripheral portion and a functional ground portion, the functional ground portion being spaced apart from the peripheral portion, and the copper foil in the gap between the peripheral portion and the functional ground portion is removed.
[0009] Preferably, the gap between the peripheral device and the functional grounding device is greater than 3.5 mm.
[0010] Preferably, the conductive area includes a plurality of peripheral units, which are spaced apart, and the copper foil between two adjacent peripheral units is removed.
[0011] Preferably, the gap between two adjacent peripheral devices is greater than 3.5 mm.
[0012] Preferably, several of the peripheral devices are disposed in the edge region of the inner electrical layer.
[0013] Preferably, the inner electrical layer includes a substrate, the copper foil is laid on the substrate, and the substrate is made of a high insulating material.
[0014] Preferably, the inner power layer includes a ground layer and a power layer stacked together, with the ground layer disposed near the bottom layer and the power layer disposed near the top layer.
[0015] Preferably, the copper foil includes a first copper layer and a second copper layer, wherein the first copper layer is formed by sputtering, and the second copper layer is formed by electroplating on the side of the first copper layer away from the substrate.
[0016] The beneficial effects of this utility model are:
[0017] This invention provides an isolated circuit board, comprising a bottom layer, an inner power layer, and a top layer stacked sequentially. The inner power layer is covered with copper foil, and an isolation area is separated within the inner power layer of the circuit board. The copper foil used for conduction in the isolation area is removed. At least one of the bottom or top layers is equipped with an isolation device. At the same time, the isolation area is set to an irregular shape according to the shape of the isolation device. The projection of the isolation device is located in the isolation area. The design is simple, prevents current from being conducted through the isolation area, thereby achieving electrical isolation, ensuring sufficient electrical isolation between the isolation device and the inner power layer, avoiding potential short circuit risks, and reducing noise coupling caused by proximity effect. Attached Figure Description
[0018] Figure 1 This is a front view of an isolated circuit board provided in an embodiment of this utility model;
[0019] Figure 2 This is a schematic diagram of the internal electrical layer provided in an embodiment of the present invention.
[0020] In the picture:
[0021] 10. Circuit board; 1. Bottom layer; 2. Internal power layer; 21. Ground layer; 22. Power layer; 3. Top layer; 101. Peripheral section; 1011. First peripheral section; 1012. Second peripheral section; 1013. Third peripheral section; 102. Functional grounding section; 20. Isolation area. Detailed Implementation
[0022] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, not the entire structure.
[0023] In the description of this utility model, unless otherwise explicitly specified and limited, the terms "connected," "linked," and "fixed" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0024] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0025] In the description of this embodiment, the terms "upper," "lower," "right," etc., refer to the orientation or positional relationship shown in the accompanying drawings. They are used only for ease of description and simplification of operation, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. In addition, the terms "first" and "second" are only used for distinction in description and have no special meaning.
[0026] Medical devices come into direct or indirect contact with the human body. To ensure stable and reliable operation and prevent malfunctions or interference with patient monitoring, other medical devices, or wireless communication systems caused by the operation of other equipment, medical devices generally need to meet EMC requirements. Furthermore, to prevent the risk of electric shock to patients during use, medical devices must meet specified dielectric strength requirements. To meet these requirements, devices with sufficient dielectric strength are typically selected for isolation. However, to ensure reliable isolation, slotting is often performed under the device. But slotting increases the complexity of the circuit board design, making the wiring more intricate and potentially causing the dielectric strength to fail to meet the requirements.
[0027] Therefore, this embodiment provides an isolated circuit board that is low in cost, simple in design, and has a reliable isolation effect.
[0028] Please see Figures 1-2 The isolated circuit board provided in this embodiment separates an isolation region 20 in the inner electrical layer 2 of the circuit board 10, removes the copper foil used for conduction on the isolation region 20, and sets the isolation region 20 into an irregular shape according to the shape of the isolation device, so that the projection of the isolation device is located in the isolation region 20. The design is simple and prevents current from being conducted through the isolation region 20, thereby achieving electrical isolation, ensuring sufficient electrical isolation between the isolation device and the inner electrical layer 2, avoiding potential short circuit risks, and reducing noise coupling caused by proximity effect.
[0029] Specifically, the circuit board 10 includes a bottom layer 1, an internal electrical layer 2, and a top layer 3 stacked sequentially. The top layer 3 is used to mount electronic devices, such as integrated circuits, resistors, and capacitors. An electrical network is arranged on the bottom layer 1, and isolation devices are installed on at least one layer of the bottom layer 1 and the top layer 3.
[0030] For example, the inner power layer 2 includes a ground layer 21 and a power layer 22 stacked together. The ground layer 21 is located near the bottom layer 1 to provide a low-impedance ground loop, which helps to reduce noise and improve signal integrity. The power layer 22 is located near the top layer 3 to provide a stable voltage supply for the circuit. The power layer 22 is tightly coupled to the ground layer 21 to form a low-impedance power distribution network.
[0031] The surface of the inner power layer 2 is covered with copper foil for conductivity. The inner power layer 2 is divided into a conductive region and an isolation region 20. The copper foil on the surface of the isolation region 20 is removed. For example, the entire surface of the inner power layer 2 is covered with copper foil. According to the circuit design of the isolation device, the inner power layer 2 is divided into a conductive region and an isolation region 20. The copper foil in the isolation region 20 is removed by etching.
[0032] Optionally, the isolation region 20 is irregularly shaped to fit the shape of the isolation device, so that the projection of the isolation device is located in the isolation region 20. This design is simple and can prevent current from being conducted through the isolation region 20, ensuring reliable electrical isolation between the isolation device and the inner electrical layer 2.
[0033] The inner electrical layer 2 includes a substrate on which copper foil is laid. The substrate is made of a high-insulation material, for example, ceramic or polyimide materials, to ensure that the isolation area 20 where the copper foil is removed has high insulation, thus ensuring reliable electrical isolation between the isolation device and the inner electrical layer 2.
[0034] Furthermore, the copper foil on the substrate includes a first copper layer and a second copper layer. For example, the first copper layer is formed on the substrate by sputtering. Sputtering utilizes the principle of physical vapor deposition, employing low-pressure, high-current arc discharge technology under vacuum conditions. Through gas discharge, copper atoms in the copper target are bombarded by the plasma and ejected from the target. The acceleration of electrons causes the sputtered copper atoms to deposit on the substrate. Because the sputtered copper atoms have good diffraction capabilities, a thin layer of copper can be deposited evenly on the irregular surface of the substrate. For example, the second copper layer is formed on the side of the first copper layer away from the substrate by electroplating. Electroplating utilizes the principle of electrolysis to add a layer of copper on top of the first copper layer, thereby increasing the overall thickness of the copper foil. This configuration improves the reliability of the copper foil.
[0035] The conductive area includes a peripheral part 101 and a functional ground part 102 spaced apart from each other. The functional ground part 102 is spaced apart from the peripheral part 101. The peripheral part 101 is used to connect an external interface or connector, and the functional ground part 102 is used to provide a common zero-volt reference point.
[0036] Furthermore, the copper foil between the peripheral unit 101 and the functional grounding unit 102 is removed to prevent leakage paths from forming between the peripheral unit 101 and the functional grounding unit 102, which would affect the dielectric strength test.
[0037] It should be noted that in this embodiment, the gap between the functional grounding part 102 and the peripheral part 101 is greater than 3.5mm, thereby achieving an insulation level with a withstand voltage of 4000V.
[0038] The conductive area includes several peripheral units 101 for connecting to several external interfaces or connectors. The peripheral units 101 are spaced apart, with a gap greater than 3.5mm between any two peripheral units 101, thus achieving an insulation class with a withstand voltage of 4000V. Furthermore, the copper foil between adjacent peripheral units 101 is removed to prevent leakage paths between adjacent peripheral units 101. The specific number of peripheral units 101 is determined based on actual needs and is not specifically limited here.
[0039] For example, this embodiment has three peripheral units 101, which are sequentially designated as a first peripheral unit 1011, a second peripheral unit 1012, and a third peripheral unit 1013. The first peripheral unit 1011, the second peripheral unit 1012, and the third peripheral unit 1013 are arranged at intervals. In this embodiment, the gap between any two of the first peripheral unit 1011, the second peripheral unit 1012, and the third peripheral unit 1013 is greater than 3.5mm, thereby achieving an insulation level of 4000V withstand voltage.
[0040] Remove the copper foil between any two of the first peripheral unit 1011, the second peripheral unit 1012, and the third peripheral unit 1013 to prevent leakage paths between two adjacent peripheral units 101 from affecting the dielectric strength test.
[0041] Preferably, the first peripheral unit 1011, the second peripheral unit 1012 and the third peripheral unit 1013 are spaced apart in the edge region of the inner power layer 2, so that the first peripheral unit 1011, the second peripheral unit 1012 and the third peripheral unit 1013 are close to the external interface or connector, shortening the signal path and reducing the possibility of noise introduction, so as to facilitate connection with external devices.
[0042] The manufacturing steps of an isolated circuit board provided in this embodiment include designing the number of layers of the circuit board 10 using drawing software. In this embodiment, the circuit board 10 is designed as a four-layer board, namely a bottom layer 1, a ground layer 21, a power layer 22, and a top layer 3; copper foil is laid on the entire surface of the inner power layer 2; according to the circuit design of the isolation device, the inner power layer 2 is divided into a conductive area and an isolation area 20, so that the projection of the isolation device is located in the isolation area; the copper foil of the isolation area 20 is etched away; the peripheral part 101 and the functional ground part 102 are separated; and the copper foil between the peripheral part 101 and the functional ground part 102 is removed.
[0043] The isolated circuit board provided in this embodiment has the following beneficial effects:
[0044] 1. By separating an isolation region 20 in the inner electrical layer 2 of the circuit board 10 and removing the copper foil used for conduction in the isolation region 20, the projection of the isolation device is located in the isolation region 20, preventing current from being conducted through the isolation region 20, ensuring sufficient electrical isolation between the isolation device and the inner electrical layer 2, the design is simple and the isolation cost is reduced.
[0045] 2. Based on the shape of the isolation device, the isolation area 20 is set to an irregular shape to achieve reliable electrical isolation;
[0046] 3. Two adjacent peripheral units 101 and the functional grounding unit 102 are spaced apart from each other, and the copper foil between the two adjacent peripheral units 101 and the copper foil between the functional grounding unit 102 and any peripheral unit 101 is removed to avoid the generation of leakage paths.
[0047] 4. The gap between two adjacent peripheral parts 101 and the gap between the functional grounding part 102 and any peripheral part 101 are both greater than 3.5mm, thereby achieving an insulation level with a withstand voltage of 4000V.
[0048] Obviously, the above embodiments of this utility model are merely examples for clearly illustrating the present utility model, and are not intended to limit the implementation of the present utility model. Those skilled in the art can make various obvious changes, readjustments, and substitutions without departing from the protection scope of this utility model. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the protection scope of the claims of this utility model.
Claims
1. An isolated circuit board, characterized in that, The circuit board (10) includes a bottom layer (1), an inner power layer (2) and a top layer (3) stacked in sequence. The inner power layer (2) is covered with copper foil and is divided into a conductive area and an isolation area (20). The copper foil on the surface of the isolation area (20) is removed, and the isolation area (20) has an irregular shape. The bottom layer (1) and / or the top layer (3) are equipped with isolation devices, and the projection of the isolation devices is located in the isolation area (20).
2. The isolated circuit board according to claim 1, characterized in that, The copper foil in the isolation zone (20) is removed by etching.
3. An isolated circuit board according to claim 1, characterized in that, The conductive area includes a peripheral part (101) and a functional ground part (102), the functional ground part (102) being spaced apart from the peripheral part (101), and the copper foil in the gap between the peripheral part (101) and the functional ground part (102) being removed.
4. An isolated circuit board according to claim 3, characterized in that, The gap between the peripheral part (101) and the functional grounding part (102) is greater than 3.5 mm.
5. An isolated circuit board according to claim 3, characterized in that, The conductive area includes a plurality of peripheral units (101), which are spaced apart, and the copper foil between two adjacent peripheral units (101) is removed.
6. An isolated circuit board according to claim 5, characterized in that, The gap between any two adjacent peripheral units (101) is greater than 3.5 mm.
7. An isolated circuit board according to claim 6, characterized in that, Several of the peripheral units (101) are disposed in the edge region of the inner electrical layer (2).
8. An isolated circuit board according to claim 1, characterized in that, The inner electrical layer (2) includes a substrate, the copper foil is laid on the substrate, and the substrate is made of a high insulating material.
9. An isolated circuit board according to claim 1, characterized in that, The inner power layer (2) includes a ground layer (21) and a power layer (22) stacked together. The ground layer (21) is disposed close to the bottom layer (1), and the power layer (22) is disposed close to the top layer (3).
10. An isolated circuit board according to claim 8, characterized in that, The copper foil includes a first copper layer and a second copper layer. The first copper layer is formed by sputtering, and the second copper layer is formed by electroplating on the side of the first copper layer away from the substrate.