Multi-chip module packaging structure

Abstract

The utility model relates to the technical field of chip packaging, and discloses a multi-chip assembly packaging structure, comprising a substrate having a first surface and a second surface; the first chip is arranged on the first surface of the substrate, and the first chip is electrically connected with the substrate; the second chip is arranged on the surface, far away from the substrate, of the first chip, and the second chip is electrically connected with the substrate; the plurality of LED chips are arranged on the first surface of the substrate, the plurality of LED chips are distributed on the two sides of the first chip, and the LED chips are electrically connected with the second chip; the LED packaging structure is reasonable in layout, welding quality and stability are improved, assembly errors are reduced, space is saved, production efficiency and accuracy are improved, and qualified mechanical strength and neat appearance of a packaging device are guaranteed.

Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, and in particular to a multi-chip component packaging structure. Background Technology

[0002] Packaging refers to the assembly of chips and other components placed on a substrate into a complete package structure or electronic product using precision machining techniques such as bonding, soldering, and molding. The packaging structure is crucial for electronic packaging products. A qualified packaging structure provides sealing and protection, reducing the impact of external environmental factors such as dust, moisture, and impact loads on the internal electronic components. It also alleviates stress caused by external environments or the chip and its leads, allowing the components to maintain stable normal operation under various external conditions. Furthermore, the packaging structure establishes electrical connections between the chip and the external world. The chip's input / output terminals and other electronic components are connected to the substrate via leads, while the substrate is connected to external pins of the package via internal leads, achieving the connection and complete functionality of the internal and external circuits. Therefore, the packaging structure is essential for electronic device packaging.

[0003] The connection between multiple chips and substrates requires multiple leads, especially for chips with many input / output ports. This results in a large number of leads and a high density of leads. The existing multi-chip packaging structure is locally compact, which can easily lead to damage to components during the packaging process. In addition, the existing multi-chip packaging structure usually uses black resin encapsulation, and the internal medium of the package is black, which cannot form an effective light propagation path. Therefore, there is an urgent need for a reasonable multi-chip component packaging structure. Utility Model Content

[0004] The purpose of this invention is to provide a multi-chip component packaging structure, which aims to solve or improve at least one of the above-mentioned technical problems.

[0005] To achieve the above objectives, this utility model provides the following solution: This utility model provides a multi-chip component packaging structure, comprising:

[0006] A substrate having a first surface and a second surface;

[0007] A first chip is disposed on a first surface of the substrate, and the first chip is electrically connected to the substrate;

[0008] The second chip is disposed on the surface of the first chip away from the substrate, and the second chip is electrically connected to the substrate;

[0009] Multiple LED chips are disposed on the first surface of the substrate, and the multiple LED chips are distributed on both sides of the first chip. The LED chips are electrically connected to the second chip.

[0010] A protective layer covers the surfaces of the first chip, the second chip, and the plurality of LED chips.

[0011] Optional, also includes:

[0012] Multiple pins are disposed on the second surface of the substrate, and the pins are electrically connected to the substrate.

[0013] Optionally, the protective layer includes:

[0014] A dam is constructed on the first surface of the substrate, and the dam covers the first chip, the second chip, and a plurality of LED chips.

[0015] Crystal-coated adhesive is used to fill the dam.

[0016] Optionally, a molding compound may also be included to cover the surface of the protective layer.

[0017] Optionally, a pair of pull-up resistors are also included, located on both sides of the first chip, and the pull-up resistors are disposed on the first surface of the substrate through a pair of resistor pads.

[0018] Optionally, the first surface of the substrate is provided with a plurality of substrate pads, distributed on both sides of the first chip.

[0019] Optionally, multiple chip pads are distributed on the first chip and the second chip, located on both sides of the first chip and the second chip, and the chip pads are connected to the substrate pads via leads.

[0020] Optionally, the LED chip has a P-pin and an N-pin at its upper left and lower right corners, respectively, and the P-pin and the N-pin are connected to the chip pads on the second chip via leads.

[0021] Optionally, the substrate integrates circuitry.

[0022] The present invention discloses the following technical effects:

[0023] By stacking and integrating the substrate, the first chip, and the second chip together, and placing multiple LED chips on both sides of the first chip, and then applying a protective layer to the surface of the first chip, the second chip, and the multiple LED chips, the arrangement of multiple chips is reasonable, which improves the welding quality and stability when the multiple chips and the substrate are electrically connected to each other, reduces assembly errors, saves space, improves production efficiency and accuracy, and ensures the qualified mechanical strength and neat appearance of the packaged device.

[0024] By applying a flip-chip adhesive to the first chip, the second chip, and multiple LED chips, transparency between the multiple chips and the upper surface of the packaging structure can be achieved. Attached Figure Description

[0025] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0026] Figure 1 This is a schematic diagram of the overall structure of this utility model;

[0027] Figure 2 This is a top view of the dam before construction of this utility model;

[0028] Figure 3 This is a bottom view of the substrate of this utility model;

[0029] Figure 4 This is a top view of the pre-encapsulation structure for coating with crystal glue according to this utility model;

[0030] Figure 5 This is a perspective view of the pre-encapsulation structure of the encapsulation material for the crystal coating of this utility model;

[0031] Figure 6 This is a three-dimensional view of the encapsulation structure after coating with crystal glue according to this utility model.

[0032] In the diagram: 1. Substrate; 2. Pin; 3. First chip; 4. Second chip; 5. Lead wire; 6. LED chip; 7. Pull-up resistor; 8. Dam; 9. Chip-on adhesive; 10. Molding compound; 11. Chip pad; 12. Substrate pad; 13. P-type pin; 14. N-type pin; 15. Resistor pad. Detailed Implementation

[0033] In semiconductor manufacturing, packaging refers to the process of fixing a chip onto a substrate, connecting it to external circuitry via wire bonding or other methods, and finally sealing it with protective materials. Common semiconductor packaging structures typically include:

[0034] • Die: The core component of a semiconductor device, typically made of materials such as silicon or gallium arsenide. • Substrate: The platform used to hold the die and support wire bonding; common substrate materials include ceramics, plastics, and metals.

[0035] • Lead Frame: A metal frame used to connect chips to external circuitry.

[0036] • Wire bonding: Connecting the pads on the chip to the lead frame using fine gold or copper wires.

[0037] Molding compound: A protective material used to seal chips and lead frames, typically made of epoxy resin.

[0038] • Package: The overall structure after encapsulation, which usually has one or more pins for connecting to external circuitry.

[0039] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0040] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0041] Reference Figures 1-6 This utility model provides a multi-chip component packaging structure, including:

[0042] Substrate 1 has a first surface and a second surface;

[0043] The first chip 3 is disposed on the first surface of the substrate 1 and is electrically connected to the substrate 1.

[0044] The second chip 4 is disposed on the surface of the first chip 3 away from the substrate 1, and the second chip 4 is electrically connected to the substrate 1.

[0045] Multiple LED chips 6 are disposed on the first surface of the substrate 1, and the multiple LED chips 6 are distributed on both sides of the first chip 3. The LED chips 6 are electrically connected to the second chip 4.

[0046] A protective layer covers the surfaces of the first chip 3, the second chip 4, and multiple LED chips 6.

[0047] By stacking and integrating the substrate 1, the first chip 3, and the second chip 4 together, and placing multiple LED chips 6 on both sides of the first chip 3, and then applying a protective layer to the surface of the first chip 3, the second chip 4, and the multiple LED chips 6, the multiple chips are arranged in a reasonable manner, which improves the welding quality and stability when the multiple chips and the substrate 1 are electrically connected to each other, reduces assembly errors, saves space, and improves production efficiency and accuracy.

[0048] Furthermore, the first chip 3 is located at the center of the first surface of the substrate 1, and the second chip 4 is located at the center of the upper surface of the first chip 3. Both the first chip 3 and the second chip 4 are flat cuboids, which saves space and makes the packaging structure more compact.

[0049] In one embodiment of this utility model, it further includes:

[0050] Multiple pins 2 are disposed on the second surface of substrate 1, and the pins 2 are electrically connected to substrate 1.

[0051] Pin 2 is also in the form of a flat cuboid, with a total of eight pins divided into two groups, located at the upper and lower positions on the second surface of substrate 1, respectively, arranged in an equidistant array. Pin 2 achieves electrical connection with the first chip 3 and the second chip 4 through the internal circuit and leads of substrate 1. Pin 2 provides electrical connection between the chip and external circuits, becoming a window of the overall package structure, ensuring the coordinated operation of the chip and other systems.

[0052] The material of pin 2 can be selected as follows:

[0053] Brass: Brass is one of the most commonly used materials for making plug-in resistor leads. It has good machinability and corrosion resistance, and is relatively inexpensive.

[0054] Phosphor bronze: Phosphor bronze possesses good mechanical strength and high-temperature oxidation resistance, and is also highly corrosion-resistant. These properties make phosphor bronze leads highly favored in demanding electronic products, ensuring device stability and durability.

[0055] Gold plating: Gold-plated pins have a better texture and aesthetic appeal. The gold plating layer can effectively prevent oxidation, thereby improving the corrosion resistance and service life of the pins.

[0056] Copper: Copper is one of the main materials for the pins of electronic components. Depending on the specific product requirements, copper may undergo processes such as tin plating or nickel plating.

[0057] Iron: In some cases, the pins of electronic components are also made of iron and are nickel-plated.

[0058] Furthermore, because existing packaging structures use opaque packaging materials, the light source of some LED chips inside the packaging structure cannot propagate out, which poses a significant challenge for some chips that perform light sensing within the package. This is particularly true for electronic packaging products that require uniform illumination of the LED chips. Therefore, in one embodiment of this invention, the protective layer includes:

[0059] Dam 8 is disposed on the first surface of the substrate, and dam 8 covers the first chip 3, the second chip 4 and multiple LED chips 6;

[0060] Crystal-coated adhesive 9 is filled into the dam 8.

[0061] The dam 8 is fixed to the first surface of the substrate 1 by applying adhesive and forming a wall, located around the first chip 3, the second chip 4, the lead 5, the LED chip 6, and the rectangular substrate pad 12. The dam 8 has a "convex" shaped structure. Its beneficial effect is to prepare for the subsequent encapsulation of the die-casting adhesive 9 by defining the precise encapsulation area. The dam 8 will cover part of the pull-up resistor 7 and part of the resistor pad 15. However, since the dam 8 is made of adhesive material, and the adhesive application and wall forming process is after the welding of the pull-up resistor 7, the dam 8 will not affect the structure of the pull-up resistor 7 and the resistor pad 15. Part of the pull-up resistor 7 and part of the resistor pad 15 will exist inside the dam 8.

[0062] The flip-chip adhesive 9 is located inside the dam 8, surrounded and fixed by the dam 8, covering and encapsulating the first chip 3, the second chip 4, the lead 5, the LED chip 6, the pull-up resistor 7, the chip pad 11, the substrate pad 12, the P-pin 13, the N-pin 14, and the resistor pad 15, in a transparent adhesive form. Because the flip-chip adhesive 9 is a gel-like fluid during potting, it does not affect the shape and structure of the aforementioned components. Therefore, after the flip-chip adhesive 9 is baked and cured, the internal structure of the flip-chip adhesive 9 retains the shape and structure of the aforementioned components. The flip-chip adhesive 9 covers and encapsulates the lead 5; in a densely packed lead package structure, its beneficial effects are buffering and protection, while also maintaining transparency between the multiple chips and the upper surface of the package structure.

[0063] Crystal-coated adhesive 9 has a low coefficient of thermal expansion, high bond strength, good flowability, fast curing, and heat and chemical resistance.

[0064] In one embodiment of this utility model, a molding compound 10 is also included, which covers the surface of the protective layer.

[0065] The molding compound 10 covers and encapsulates the substrate 1, the dam 8, and the flip-chip adhesive 9, and is located on top of the substrate 1, the dam 8, and the flip-chip adhesive 9 to form an integrated encapsulation structure. Similarly, the molding compound 10 encapsulates and covers the substrate 1, the dam 8, and the flip-chip adhesive 9 by injection molding epoxy resin, without affecting the structural shape of the substrate 1, the dam 8, and the flip-chip adhesive 9. As the outer shell of the integrated encapsulation structure, the molding compound 10's beneficial effect is to protect the encapsulation structure.

[0066] In one embodiment of the present invention, a pair of pull-up resistors 7 are also included, which are rectangular parallelepiped located on both sides of the first chip 3. The pull-up resistors 7 are disposed on the first surface of the substrate 1 through a pair of resistor pads 15, which are flat rectangular parallelepipeds.

[0067] The function of pull-up resistor 7 is to "weakly" pull the input voltage signal high on the wire connected to it if the external component is not enabled. When the external component is not connected, it "appears" to be a high impedance to the input terminal. In this case, pull-up resistor 7 can pull the voltage at the input port to a high level. If the external component is enabled, it will cancel the high level set by pull-up resistor 7. In this way, pull-up resistor 7 allows pin 2 to maintain a defined logic level even when no external component is connected.

[0068] In one embodiment of the present invention, a plurality of substrate pads 12 are provided on the first surface of the substrate 1, which are distributed on both sides of the first chip 3.

[0069] In one embodiment of the present invention, a plurality of chip pads 11 are distributed on the first chip 3 and the second chip 4, located on both sides of the first chip 3 and the second chip 4, and the chip pads 11 are connected to the substrate pads 12 by leads 5.

[0070] Multiple leads 5 are bonded to achieve wire connections between the substrate 1 and the first chip 3 and the second chip 4. This enables electrical connections between the first chip 3, the second chip 4 and the substrate 1, and further enables electrical connections between the first chip 3, the second chip 4 and the pins 2 and external circuits, thus facilitating the realization of the functions of the first chip 3 and the second chip 4.

[0071] In one embodiment of this utility model, the upper left corner and the lower right corner of the LED chip 6 are respectively provided with a P-pin 13 and an N-pin 14, and the P-pin 13 and the N-pin 14 are connected to the chip pad 11 on the second chip 4 through a lead 5.

[0072] Specifically, there are two LED chips 6, which are cuboid in shape. The P-pin 13 and N-pin 14 are both flat cuboids. The P-pin 13 and N-pin 14 are connected to the chip pad 11 on the second chip 4 through multiple bonding wires 5, which provides an electrical connection between the LED chip 6 and the second chip 4 and helps to realize the function of the LED chip 6.

[0073] In one embodiment of this utility model, a circuit is integrated within the substrate 1.

[0074] Furthermore, the second chip 4 serves as a light receiving sensor, functioning to receive light sources. When the light intensity reaches a certain level, it will begin to operate. The LED chip 6 serves as a light emitter, with light propagating between the LED chip 6 and the second chip 4 via diffuse reflection. The protective structure formed by the dam 8, the flip-chip adhesive 9, and the molding compound 10 protects the second chip 4 and the LED chip 6. During light propagation, the light emitted by the LED chip 6 first passes through the flip-chip adhesive 9 and is emitted to the top interface of the flip-chip adhesive 9, i.e., the bottom interface of the molding compound 10. After being reflected, it propagates again through the flip-chip adhesive 9 to the surface of the second chip 4 and is received. In this application, the transparent flip-chip adhesive 9 forms the light propagation path, while the outside is composed of the black molding compound 10, thus forming a reflective interface.

[0075] This utility model also provides a multi-chip component packaging method, including the following steps:

[0076] The first chip 3 is disposed on the first surface of the substrate 1, preferably by means of adhesive bonding.

[0077] The second chip 4 is disposed on the surface of the first chip 3 away from the substrate 1, preferably by means of adhesive bonding.

[0078] Multiple LED chips 6 are disposed on the first surface of the substrate 1 and located on both sides of the first chip 3;

[0079] The first chip 3 is electrically connected to the substrate 1, the second chip 4 is electrically connected to the substrate 1, and the LED chip 6 is electrically connected to the second chip 4.

[0080] The pull-up resistor 7 is fixed to the resistor pad 1 by welding, and the resistor pad 1 is fixedly connected to the substrate 1.

[0081] A protective layer is applied to the first chip 3, the second chip 4, and multiple LED chips 6. Specifically, the dam 8 is fixed to the first surface of the substrate 1 by applying adhesive to form a wall, defining the exact area for potting. Then, flip-chip adhesive 9 is applied to the dam 8, so that the dam 8 and flip-chip adhesive 9 cover the first chip 3, the second chip 4, the lead wire 5, the LED chip 6, the pull-up resistor 7, the chip pad 11, the substrate pad 12, the P-pin 13, the N-pin 14, and the resistor pad 15.

[0082] The molding compound 10 is wrapped around the substrate 1, the dam 8, and the flip-chip adhesive 9 by injection molding epoxy resin to form an overall encapsulation structure.

[0083] In the description of this utility model, it should be understood that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0084] The embodiments described above are merely preferred embodiments of the present utility model and are not intended to limit the scope of the present utility model. Various modifications and improvements made to the technical solutions of the present utility model by those skilled in the art without departing from the spirit of the present utility model should fall within the protection scope defined by the claims of the present utility model.

Claims

1. A multi-chip component packaging structure, characterized in that, include: The substrate (1) has a first surface and a second surface; A first chip (3) is disposed on a first surface of the substrate (1), and the first chip (3) is electrically connected to the substrate (1); The second chip (4) is disposed on the surface of the first chip (3) away from the substrate (1), and the second chip (4) is electrically connected to the substrate (1); Multiple LED chips (6) are disposed on the first surface of the substrate (1), and the multiple LED chips (6) are distributed on both sides of the first chip (3). The LED chips (6) are electrically connected to the second chip (4). A protective layer covers the surfaces of the first chip (3), the second chip (4), and the plurality of LED chips (6).

2. The multi-chip component packaging structure according to claim 1, characterized in that, Also includes: Multiple pins (2) are disposed on the second surface of the substrate (1), and the pins (2) are electrically connected to the substrate (1).

3. The multi-chip component packaging structure according to claim 1, characterized in that, The protective layer includes: A dam (8) is disposed on the first surface of the substrate, and the dam (8) covers the first chip (3), the second chip (4) and a plurality of LED chips (6); The flip-chip adhesive (9) is filled into the dam (8).

4. The multi-chip component packaging structure according to claim 1, characterized in that, It also includes molding compound (10) covering the surface of the protective layer.

5. The multi-chip component packaging structure according to claim 1, characterized in that, It also includes a pair of pull-up resistors (7), which are located on both sides of the first chip (3). The pull-up resistors (7) are disposed on the first surface of the substrate (1) through a pair of resistor pads (15).

6. The multi-chip component packaging structure according to claim 1, characterized in that, The first surface of the substrate (1) is provided with a plurality of substrate pads (12), which are distributed on both sides of the first chip (3).

7. A multi-chip component packaging structure according to claim 6, characterized in that, Multiple chip pads (11) are distributed on the first chip (3) and the second chip (4) on both sides of the first chip (3) and the second chip (4). The chip pads (11) are connected to the substrate pads (12) by leads (5).

8. A multi-chip component packaging structure according to claim 7, characterized in that, The LED chip (6) has a P-pin (13) and an N-pin (14) at its upper left and lower right corners, respectively. The P-pin (13) and the N-pin (14) are connected to the chip pad (11) on the second chip (4) via leads (5).

9. A multi-chip component packaging structure according to claim 1, characterized in that, The substrate (1) has integrated circuitry.

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