Current control circuit and automobile
By combining a voltage conversion chip, a comparator circuit, and a latching circuit, the SOC current is monitored in real time, solving the problem of damage caused by abnormal SOC current and achieving protection and safe power supply for the SOC.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-24
- Publication Date
- 2026-03-06
AI Technical Summary
In existing technologies, the operating current of a system-on-a-chip (SOC) cannot be effectively controlled, which may lead to damage in case of malfunctions.
The system employs a combination of voltage conversion chip, comparator circuit, and latch circuit. The comparator circuit monitors the current in real time to ensure it is within a preset range, while the latch circuit controls the voltage conversion chip to turn on or off based on the comparison result, preventing abnormal current from damaging the SOC.
It enables real-time monitoring and protection of the SOC current, preventing damage to the SOC under overcurrent or undercurrent conditions and ensuring the safe operation of the SOC.
Smart Images
Figure CN223977514U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic circuit technology, and in particular to a current control circuit and an automobile. Background Technology
[0002] When a system-on-chip (SOC) is working, its power consumption varies with its computing power, so the operating current of an SOC is not fixed.
[0003] In existing technologies, a voltage conversion chip can be set for the SOC, and a sampling resistor can be connected in series at the output of the voltage conversion chip to set the maximum output current of the SOC, thereby controlling the operating current of the SOC. However, this method can only limit the maximum output current, and if there are other abnormalities in the operating current, it may still cause damage to the SOC. Utility Model Content
[0004] To address the aforementioned issues, this application provides a current control circuit and an automobile to identify and resolve abnormal current problems during SOC operation, thereby preventing SOC damage.
[0005] This application discloses a current control circuit, including: a voltage conversion chip, a comparator circuit, and a latch circuit;
[0006] The output terminal of the voltage conversion chip is connected to the input terminal of the comparator circuit and the system-on-a-chip (SOC) respectively. The output terminal of the comparator circuit is connected to the input terminal of the latch circuit, and the output terminal of the latch circuit is connected to the input terminal of the voltage conversion chip.
[0007] The voltage conversion chip is used to output current to the comparator circuit and to power the SOC;
[0008] The comparison circuit is used to compare the magnitude of the current with a preset current and output the comparison result.
[0009] The latch circuit is used to output a control signal based on the comparison result to control the voltage conversion chip to turn on or off.
[0010] Optionally, the preset current includes a preset maximum current and a preset minimum current, and the comparison circuit is specifically used for:
[0011] When the current is between the preset maximum current and the preset minimum current, a first comparison result is output;
[0012] If the current is not between the preset maximum current and the preset minimum current, a second comparison result is output.
[0013] Optionally, the comparison circuit specifically includes: a first comparator and a second comparator;
[0014] The positive input terminal of the first comparator is connected to the preset maximum current, and the negative input terminal of the first comparator is connected to the current. The negative input terminal of the second comparator is connected to the preset minimum current, and the positive input terminal of the second comparator is connected to the current. The output terminals of the first comparator and the second comparator are connected in parallel and then connected to the input terminal of the latch circuit to output the comparison result to the latch circuit.
[0015] The first comparator is configured to output a high-level signal when the current is less than the preset maximum current, and to output a low-level signal when the current is greater than or equal to the preset maximum current.
[0016] The second comparator is used to output a high-level signal when the current is greater than the preset minimum current, and to output a low-level signal when the current is less than or equal to the preset minimum current;
[0017] Wherein, the first comparison result is used to indicate that both the first comparator and the second comparator output a high-level signal, and the second comparison result is used to indicate that the first comparator and / or the second comparator output a low-level signal.
[0018] Optionally, the control signal includes a first control signal and a second control signal; the latch circuit is specifically used for:
[0019] If the comparison result is the first comparison result, the first control signal is output; the first control signal is used to control the voltage conversion chip to turn on.
[0020] If the comparison result is the second comparison result, the second control signal is output; the second control signal is used to control the voltage conversion chip to turn off.
[0021] Optionally, the latching circuit specifically includes: a third comparator connected in series between the comparison circuit and the voltage conversion chip;
[0022] The positive input terminal of the third comparator is the input terminal of the latch circuit, the negative input terminal of the third comparator is connected to the power supply voltage, and the output terminal of the third comparator is the output terminal of the latch circuit.
[0023] Optionally, when the voltage conversion chip is off, the third comparator is further configured to:
[0024] When the voltage processing result is applied to the positive input terminal of the third comparator, the output terminal of the third comparator outputs the first control signal; the voltage processing result is obtained by pulling up the comparison result based on the enable signal.
[0025] Optionally, it also includes a transistor, wherein the base of the transistor is connected to the turn-on signal, the emitter is connected to the power supply voltage, and the collector is connected to the positive input terminal of the third comparator;
[0026] The transistor is used to pull up the comparison result to the same voltage value as the power supply voltage to obtain the voltage processing result.
[0027] Optionally, it may also include a first voltage divider resistor, a second voltage divider resistor, and a third voltage divider resistor;
[0028] The output terminal of the comparator circuit is connected to the first terminal of the first voltage divider resistor and the first terminal of the second voltage divider resistor, respectively.
[0029] The second end of the first voltage divider resistor and the second end of the second voltage divider resistor are connected in parallel and then connected to the first end of the third voltage divider resistor and the input terminal of the latch circuit, respectively. The second end of the third voltage divider resistor is connected to an external status monitor.
[0030] Optionally, a Hall current sensor may also be included;
[0031] The Hall current sensor is connected in series between the SOC and the voltage conversion chip, and the Hall current sensor is used to convert the current into an equivalent voltage signal;
[0032] The comparison circuit is specifically used for:
[0033] Based on the equivalent voltage signal, the magnitude relationship between the current and the preset current is compared, and the comparison result is output.
[0034] Based on the current control circuit disclosed in the above embodiments, this application also discloses a corresponding automobile, including: the above-described current control circuit and a system-on-a-chip (SOC), wherein the current control circuit and the SOC are connected.
[0035] This application discloses a current control circuit and an automobile, including a voltage conversion chip, a comparator circuit, and a latch circuit connected in series. The voltage conversion chip provides current to the system-on-a-chip (SOC). The comparator circuit presets a safe operating range for the current and identifies whether the current meets the requirements to monitor abnormal current conditions, such as undercurrent or overcurrent. The latch circuit controls the state of the voltage conversion chip based on the output of the comparator circuit. For example, after comparing the current with the safe current range, the comparator circuit identifies that the current is too high and outputs the comparison result to the latch circuit. The latch circuit can control the voltage conversion chip to shut down by sending a control signal to prevent current flowing to the SOC from damaging it. After the abnormal situation is resolved, the latch circuit can also restart the voltage conversion chip via a control signal, thus ensuring that it continues to supply power to the SOC. Attached Figure Description
[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0037] Figure 1 This is a schematic diagram of the structure of a current control circuit disclosed in an embodiment of this application;
[0038] Figure 2 This is a schematic diagram of another current control circuit disclosed in an embodiment of this application;
[0039] Figure 3 This is a waveform diagram illustrating the operation of the current control circuit disclosed in the embodiments of this application. Detailed Implementation
[0040] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0041] Example 1: This application discloses a current control circuit.
[0042] For details, please refer to Figure 1 The current control circuit disclosed in this embodiment includes a voltage conversion chip 101, a comparator circuit 102, and a latch circuit 103.
[0043] In the current control circuit of this embodiment, the output terminal of the voltage conversion chip 101 is connected to both the input terminal of the comparator circuit 102 and the system-on-a-chip (SOC). The voltage conversion chip 101 provides operating current to the SOC, meaning it can control whether current flows through the SOC. Simultaneously, the voltage conversion chip 101 also outputs this operating current to the comparator circuit 102, enabling the current control circuit disclosed in this embodiment to monitor the current state for abnormalities, promptly detect any anomalies, and take measures to prevent damage to the SOC.
[0044] In the current control circuit of this embodiment, the output terminal of the comparator circuit 102 is connected to the input terminal of the latch circuit 103. The comparator circuit 102 is used to compare the current from the voltage conversion chip 101 with a preset current and output the comparison result. For example, the comparator circuit 102 can compare it with a preset threshold range to obtain a comparison result signal "0" or "1", and send it to the latch circuit 103. The comparison result signal can be used to indicate abnormal current conditions; "0" indicates abnormal current, and "1" indicates normal current. That is, the comparator circuit 102 can monitor the current in real time, and once an abnormal current is detected, it immediately sends a signal to the latch circuit 103 so that the latch circuit 103 can take further measures to protect the SOC. This embodiment is only an example for ease of understanding. In actual work, the specific content and form of the comparison result signal are not limited, as long as it can represent the current condition.
[0045] As an optional solution, the preset current includes a preset maximum current and a preset minimum current. The comparator circuit 102 is specifically used to: output a first comparison result when the current is between the preset maximum current and the preset minimum current; and output a second comparison result when the current is not between the preset maximum current and the preset minimum current. The first comparison result indicates that the current is normal, and the second comparison result indicates that the current is abnormal. The comparator circuit 102 can detect whether the current is too large or too small within the preset current range, thereby identifying whether the current will cause SOC overload or undercurrent.
[0046] In the current control circuit of this embodiment, the output terminal of the latch circuit 103 is connected to the input terminal of the voltage conversion chip 101. The latch circuit 103 is used to output a control signal based on the comparison result to control the voltage conversion chip 101 to turn on or off. Specifically, the control signal may include a first control signal and a second control signal. The latch circuit 103 outputs the first control signal when the comparison result is the first comparison result, and outputs the second control signal when the comparison result is the second comparison result. The first control signal is used to control the voltage conversion chip to turn on, and the second control signal is used to control the voltage conversion chip to turn off. For example, if the comparison result signal output by the comparison circuit is "0", the latch circuit will output a signal to control the voltage conversion chip to turn off. That is, the latch circuit 103 can quickly shut off the power supply to the SOC when the current is too high or too low, thereby preventing damage to the SOC.
[0047] The current control circuit in this embodiment supports setting the SOC current threshold, continuously monitoring undercurrent and overcurrent conditions, and, in the event of a problem, quickly responding through hardware circuitry and automatically shutting off the power supply to the SOC for protection.
[0048] Example 2: This example discloses another current control circuit. Please refer to the following for details. Figure 2 :
[0049] The current control circuit in this embodiment also includes a Hall current sensor 208, which is connected in series between the SOC and the voltage conversion chip (which can be considered as the internal operating voltage VDD). The Hall current sensor 208 is used to convert the current into an equivalent voltage signal, so that the comparison circuit can compare the magnitude of the current with a preset current based on the equivalent voltage signal and output the comparison result. For example, the Hall current sensor 208 is 25mV / A. When the current is 0A to 200A, the Hall current sensor 208 outputs 0 to 5V.
[0050] In the current control circuit of this embodiment, the comparison circuit may specifically include a first comparator 201 and a second comparator 202. The positive input terminal of the first comparator 201 is connected to a preset maximum current (i.e., the equivalent voltage signal Vmax of the upper current limit; for example, Vmax = 3V indicates a preset maximum current of 3 / 0.025 = 120A), and the negative input terminal is connected to the equivalent voltage signal (i.e., the current) from the Hall current sensor 208. The negative input terminal of the second comparator 202 is connected to a preset minimum current (i.e., the equivalent voltage signal Vmin of the lower current limit; for example, Vmin = 1V indicates a preset minimum current of 1 / 0.025 = 40A), and the positive input terminal is connected to the equivalent voltage signal (i.e., the current) from the Hall current sensor 208. The output terminals of the first comparator 201 and the second comparator 202 are connected in parallel to the input terminal of the latch circuit, outputting the comparison result to the latch circuit.
[0051] The first comparator 201 outputs a high-level signal when the current is less than a preset maximum current (i.e., the positive input terminal Vmax is greater than the current). Correspondingly, it outputs a low-level signal when the current is greater than or equal to the preset maximum current. Similarly, the second comparator 202 outputs a high-level signal when the current is greater than a preset minimum current (i.e., the negative input terminal Vmin is less than the current). Correspondingly, it outputs a low-level signal when the current is less than or equal to the preset minimum current.
[0052] In this circuit, the outputs of the first comparator 201 and the second comparator 202 are logically ANDed; that is, if either comparator outputs a low level, the outputs of both comparators are low. Therefore, the first comparison result indicates that both comparator 201 and the second comparator 202 output a high-level signal, while the second comparison result indicates that either comparator 201 or the second comparator 202 outputs a low-level signal. This allows the comparator circuit to monitor undercurrent and overcurrent conditions, more comprehensively identifying abnormal current conditions. It can also output a signal promptly when one of several abnormalities occurs, indicating the appropriate actions to take.
[0053] In the current control circuit of this embodiment, the latch circuit specifically includes a third comparator 203 connected in series between the comparator circuit and the voltage conversion chip. Specifically, the positive input terminal of the third comparator 203 is the input terminal of the latch circuit, the negative input terminal is connected to the power supply voltage, and the output terminal is the output terminal of the latch circuit.
[0054] As an optional solution, the base of transistor 204 is connected to the start signal, the emitter is connected to the power supply voltage, and the collector is connected to the positive input terminal of the third comparator 203. Transistor 204 is used to pull up the comparison result to the same voltage value as the power supply voltage based on the start signal, thus obtaining the voltage processing result. When the voltage processing result is connected to the positive input terminal of the third comparator 203, the output terminal outputs the first control signal.
[0055] For example, in the initial state of the current control circuit in this embodiment, that is, before the voltage conversion chip is controlled, both the first comparator 201 and the second comparator 202 output high-level signals. The input terminal of the third comparator 203 is equipped with a voltage divider resistor. Since the third comparator 203 is an internal transistor, its output terminal is grounded in the initial state. The high-level signal from the comparator circuit is divided by the voltage divider resistor, and the resulting voltage signal is less than the power supply voltage after voltage division at the negative input terminal, so a low-level signal is output to turn off the voltage conversion chip. When the base of the transistor 204 is connected to the turn-on signal, its voltage is less than the power supply voltage of the emitter voltage, and the transistor 204 conducts, pulling the voltage signal at the positive input terminal of the third comparator 203 to a level greater than the power supply voltage after voltage division at the negative input terminal, so that the third comparator 203 outputs a high-level signal to turn on the voltage conversion chip.
[0056] Specifically, the output of the comparator circuit can be connected to the first terminals of the first voltage divider resistor 205 and the second voltage divider resistor 206, respectively. The second terminals of the first voltage divider resistor 205 and the second terminals of the second voltage divider resistor 206 are connected in parallel and then connected to the first terminal of the third voltage divider resistor 207 and the positive input terminal of the third comparator 203, respectively. The second terminal of the third voltage divider resistor 207 is connected to an external state monitor. Furthermore, voltage divider resistors R8 and R9 are also connected to the negative input terminal of the third comparator 203 to divide the power supply voltage.
[0057] Specifically, it can be as follows: Figure 2 As shown, the high-level signal 5V output from the comparator circuit is divided by the first voltage divider resistor 205, the second voltage divider resistor 206, and the third voltage divider resistor 207 to obtain 0.9V (5x2.15 / (4.7+5.1+2.15)=0.9). The negative input terminal of the third comparator 203 is connected to the power supply voltage of 2.5V after being divided by R8 and R9. At this time, the third comparator 203 outputs a low-level signal. After the base of the transistor 204 is connected to the turn-on signal, the voltage signal at the positive input terminal of the third comparator 203 is pulled up to 5V, which is greater than the 2.5V at the negative input terminal of the third comparator 203. At this time, the third comparator 203 outputs a high-level signal.
[0058] In the current control circuit of this embodiment, when the comparator circuit outputs a low-level signal of 0V, which is less than 2.5V at the negative input terminal of the third comparator 203, the third comparator 203 outputs a low-level signal. When the voltage conversion chip is off, and the comparator circuit outputs a high-level signal, this high-level signal is divided into 0.9V, which is less than 2.5V at the negative input terminal of the third comparator 203. At this time, the third comparator 203 still outputs a low-level signal, which serves as a fault latch until an enable signal is received, causing the voltage at the positive input terminal of the third comparator 203 to be pulled up to 5V, at which point the latch is released.
[0059] In other words, the enable signal is used to release the fault latch. If the comparator circuit outputs a fault state "0" first and then a normal state "1", the latch circuit will remain in the "0" state, shutting down the voltage conversion chip. Only when the enable signal is received will the latch circuit clear the fault state, re-output the normal state "1", and enable the voltage conversion chip.
[0060] In the current control circuit of this embodiment, the enable signal can be sent by the microcontroller (MCU). A short-term current fault can be latched until the MCU determines that the power supply to the SOC can be restored. Only then will the enable signal be sent to unlock the SOC and continue to supply power to the SOC, preventing problems caused by the rapid power-on and power-off of the SOC.
[0061] Figure 3 This is a waveform diagram illustrating the operation of the current control circuit disclosed in the embodiments of this application. Figure 3 As shown, the horizontal axis represents time, and the vertical axis represents signal voltage. The current state signal reflects the state of the monitored current (i.e., the current connected to the comparator circuit).
[0062] Assuming overcurrent occurs in the current state signal during time periods t2-t3 and t4-t5, the MCU reset signal is initially high, then pulled low at times t1 and t6 (i.e., an enable signal is sent), activating the voltage conversion chip to allow the SOC to start and continue operating. The positive input of the third comparator is initially a low level of 0.9V (resistive voltage divider). At time t1, after the MCU pulls it low, it is strongly pulled up to a high level of 5V. When an overcurrent signal is generated at time t2, it becomes a low level of 0V. When the overcurrent signal disappears at t3, it returns to a low level of 0.9V to maintain fault latch. When another overcurrent signal is generated at t4, it becomes a low level of 0V. At time t5, after the overcurrent signal disappears, it returns to a low level of 0.9V to maintain fault latch until time t6, when the MCU pulls it low, it is strongly pulled up to a high level of 5V to clear the fault latch. In the initial state, the voltage at the positive input terminal of the third comparator is less than the voltage at the negative input terminal (2.5V), so the output is low (0V) to turn off the voltage conversion chip. During t1 to t2 and t6 to t7, the voltage at the positive input terminal of U4 (5V) is greater than the voltage at the negative input terminal (2.5V), so the output is high (5V) to clear the fault latch and turn on the voltage conversion chip.
[0063] Based on the current control circuit disclosed in the above embodiments, this application also discloses a corresponding automobile, including: the above-mentioned current control circuit and a system-on-a-chip (SOC), wherein the current control circuit and the SOC are connected.
[0064] The embodiments in this specification are described in a progressive manner. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant details can be found in the method section.
[0065] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0066] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0067] The features described in the embodiments of this specification can be substituted for or combined with each other, so that those skilled in the art can implement or use this application.
[0068] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A current control circuit, characterized by, The application relates to a voltage conversion chip, a comparison circuit and a latch circuit. An output end of the voltage conversion chip is connected with an input end of the comparison circuit and a system on chip (SOC), an output end of the comparison circuit is connected with an input end of the latch circuit, and an output end of the latch circuit is connected with an input end of the voltage conversion chip. The voltage conversion chip is used for outputting a current to the comparison circuit and supplying power for the SOC. The comparison circuit is used for comparing the current with a preset current, and outputting a comparison result. The latch circuit is used for outputting a control signal based on the comparison result, so as to control the opening or closing of the voltage conversion chip. The preset current comprises a preset maximum current and a preset minimum current, and the comparison circuit is specifically used for:
2. The current control circuit of claim 1, wherein, outputting a first comparison result when the current is between the preset maximum current and the preset minimum current; and outputting a second comparison result when the current is not between the preset maximum current and the preset minimum current. The comparison circuit specifically comprises a first comparator and a second comparator. A positive input end of the first comparator is connected with the preset maximum current, a negative input end of the first comparator is connected with the current, a negative input end of the second comparator is connected with the preset minimum current, a positive input end of the second comparator is connected with the current, and output ends of the first comparator and the second comparator are connected with an input end of the latch circuit in parallel, so as to output the comparison result to the latch circuit.
3. The current control circuit of claim 2, wherein, The first comparator is used for outputting a high-level signal when the current is less than the preset maximum current, and outputting a low-level signal when the current is greater than or equal to the preset maximum current. The second comparator is used for outputting a high-level signal when the current is greater than the preset minimum current, and outputting a low-level signal when the current is less than or equal to the preset minimum current. The first comparison result is used for indicating that the first comparator and the second comparator both output high-level signals, and the second comparison result is used for indicating that the first comparator and / or the second comparator output low-level signals. The control signal comprises a first control signal and a second control signal, and the latch circuit is specifically used for: outputting the first control signal when the comparison result is the first comparison result, and the first control signal is used for controlling the opening of the voltage conversion chip; and outputting the second control signal when the comparison result is the second comparison result, and the second control signal is used for controlling the closing of the voltage conversion chip.
4. The current control circuit of claim 2, wherein, The latch circuit specifically comprises a third comparator connected in series between the comparison circuit and the voltage conversion chip. A positive input end of the third comparator is an input end of the latch circuit, a negative input end of the third comparator is connected with a power supply voltage, and an output end of the third comparator is an output end of the latch circuit. When the voltage conversion chip is closed, the third comparator is further used for:
5. The current control circuit of claim 4, wherein, 6. The current control circuit of claim 5, wherein, The output end of the third comparator outputs the first control signal in the case that the positive input end of the third comparator is connected with a voltage processing result, and the voltage processing result is obtained by pulling up the comparison result based on an enable signal.
7. The current control circuit of claim 6, wherein, The transistor has a base connected with the enable signal, an emitter connected with the power voltage, and a collector connected with the positive input end of the third comparator. The transistor is used to pull up the comparison result to the same voltage value as the power voltage, so as to obtain the voltage processing result.
8. The current control circuit of claim 1, wherein, The current control circuit further comprises a first voltage dividing resistor, a second voltage dividing resistor and a third voltage dividing resistor. The output end of the comparison circuit is connected with the first end of the first voltage dividing resistor and the first end of the second voltage dividing resistor respectively. The second end of the first voltage dividing resistor and the second end of the second voltage dividing resistor are connected with the first end of the third voltage dividing resistor and the input end of the latch circuit respectively in parallel, and the second end of the third voltage dividing resistor is connected with an external state monitor.
9. The current control circuit of claim 1, wherein, The current control circuit further comprises a Hall current sensor. The Hall current sensor is connected in series between the SOC and the voltage conversion chip, and is used to convert the current into an equivalent voltage signal. The comparison circuit is specifically used for: comparing the current with a preset current based on the equivalent voltage signal, and outputting the comparison result.
10. An automobile characterized by comprising: The current control circuit and the SOC are connected.