485 / 232 switching circuit based on intelligent terminal operation and maintenance

Abstract

The utility model provides a 485 / 232 switching circuit based on intelligent terminal operation and maintenance. The 485 / 232 switching circuit comprises an RS-485 interface circuit, an RS-232 interface circuit, an analog switch and a logic circuit, the analog switch selects one of received signals of the RS-232 interface circuit and the RS-485 interface circuit, and the logic circuit selects one of the RS-232 interface circuit and the RS-485 interface circuit as output; and the analog switch and the logic circuit are connected with a control pin of the same CPU. By applying the technical scheme, the RS-232 and RS-485 function switching can be realized, the cost is reduced, new materials are avoided, and the production management cost is reduced.

Description

Technical Field

[0001] This utility model relates to the field of serial data interface technology, and in particular to a 485 / 232 switching circuit based on smart terminal operation and maintenance. Background Technology

[0002] RS-232 and RS-485 are both serial data interface standards. RS-232 is the most widely used serial interface in PCs and the communications industry. RS-232 is defined as a single-ended standard that increases communication distance in low-speed serial communication. RS-232 uses unbalanced transmission, also known as single-ended communication. RS-232 is designed for point-to-point (i.e., using only one pair of transmitting and receiving devices) communication and is suitable for communication between local devices. RS-485 differs from RS-232; it uses differential transmission, also known as balanced transmission. It uses a pair of twisted-pair cables, enabling true multi-point bidirectional communication with a maximum transmission distance of up to 1 km.

[0003] In the field maintenance of smart terminals, the types of downstream device interfaces are diverse. Integrated circuits that simultaneously possess RS-232 and RS-485 functionality are relatively scarce and expensive, and their cost is difficult to reduce due to limited application scenarios. RS-232 and RS-485 interfaces have wide applications in industrial control, communication equipment, and other fields. Many equipment specifications require serial communication to have RS-232 / RS-485 switching capabilities, rather than being limited to only one type. However, currently, integrated circuits that simultaneously possess RS-232 and RS-485 functionality are scarce and expensive. Utility Model Content

[0004] In view of this, the purpose of this utility model is to provide a 485 / 232 switching circuit based on intelligent terminal operation and maintenance, so as to realize the switching between RS-232 and RS-485 functions.

[0005] To achieve the above objectives, this utility model adopts the following technical solution: a 485 / 232 switching circuit based on intelligent terminal operation and maintenance, including an RS-485 interface circuit, an RS-232 interface circuit, an analog switch, and a logic circuit; the analog switch selects one of the received signals from the RS-232 interface circuit and the RS-485 interface circuit, and the logic circuit selects one of the RS-232 interface circuit and the RS-485 interface circuit as its output; the analog switch and the logic circuit are connected to the same CPU control pin.

[0006] In a preferred embodiment, the RS-485 interface circuit includes the chip UM3085EESA.

[0007] In a preferred embodiment, the RS-232 interface circuit includes the chip SP3232EEN.

[0008] In a preferred embodiment, the analog switch uses the 74LVC1497GV chip.

[0009] In a preferred embodiment, the logic circuit uses the SGM3002 chip.

[0010] In a preferred embodiment, the RO pin of the UM3085EESA chip is connected to the A pin of the 74LVC1497GV chip; the 9th pin of the SP3232EEN chip is connected to the B pin of the 74LVC1497GV chip; the COM1 pin of the SGM3002 chip is connected to one end of the first resistor R215, the other end of the first resistor R215 is connected to the B pin of the UM3085EESA chip; the COM2 pin of the SGM3002 chip is connected to one end of the second resistor R216, the other end of the second resistor R216 is connected to the A pin of the UM3085EESA chip.

[0011] In a preferred embodiment, the NC1 pin of chip SGM3002 is connected to pin 8 of chip SP3232EEN, and the NC2 pin of chip SGM3002 is connected to pin 7 of chip SP3232EEN.

[0012] In a preferred embodiment, the IN1 pin and IN2 pin of the SGM3002 chip and the 74LVC1497GV chip... All pins are connected to the same CPU control pin.

[0013] In a preferred embodiment, the chip 74LVC1497GV's The pin is connected to a pull-up resistor R233.

[0014] In a preferred embodiment, a third resistor R257 is connected between the IN1 pin and the IN2 pin of the SGM3002 chip and the control pin of the CPU.

[0015] Compared with the prior art, the present invention has the following advantages: the present invention uses only common devices to realize the switching between RS-232 and RS-485 functions, which reduces costs, avoids the need for additional materials, and reduces production management costs. Attached Figure Description

[0016] Figure 1 The circuit diagram of the RS-485 interface circuit and logic circuit of the preferred embodiment of this utility model is shown below.

[0017] Figure 2 This is a wiring diagram of the analog switch principle of a preferred embodiment of the present invention;

[0018] Figure 3This is a schematic diagram of the RS-232 interface circuit of a preferred embodiment of the present invention.

[0019] Figure 4 This is a schematic diagram of the analog switch logic principle of a preferred embodiment of the present invention;

[0020] Figure 5 This is a schematic diagram of the logic circuit principle of a preferred embodiment of the present invention. Detailed Implementation

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0022] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0023] It should be noted that the terminology used herein is for the purpose of describing particular implementations only and is not intended to limit the exemplary implementations according to this application; as used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise; furthermore, it should be understood that when the terms “comprising” and / or “including” are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0024] A 485 / 232 switching circuit based on intelligent terminal operation and maintenance, reference Figure 1-5 It includes an RS-485 interface circuit, an RS-232 interface circuit, an analog switch, and a logic circuit; the analog switch selects one of the received signals from the RS-232 interface circuit and the RS-485 interface circuit, and the logic circuit selects one of the RS-232 interface circuit and the RS-485 interface circuit as its output; the analog switch and the logic circuit are connected to the same CPU control pin.

[0025] In this embodiment, the RS-485 interface circuit includes the chip UM3085EESA.

[0026] In this embodiment, the RS-232 interface circuit includes the chip SP3232EEN.

[0027] In this embodiment, the analog switch uses the 74LVC1497GV chip.

[0028] In this embodiment, the logic circuit uses the SGM3002 chip.

[0029] In this embodiment, the RO pin of chip UM3085EESA is connected to the A pin of chip 74LVC1497GV; the 9th pin of chip SP3232EEN is connected to the B pin of chip 74LVC1497GV; the COM1 pin of chip SGM3002 is connected to one end of the first resistor R215, the other end of the first resistor R215 is connected to the B pin of chip UM3085EESA; the COM2 pin of chip SGM3002 is connected to one end of the second resistor R216, the other end of the second resistor R216 is connected to the A pin of chip UM3085EESA.

[0030] In this embodiment, the NC1 pin of chip SGM3002 is connected to the 8th pin of chip SP3232EEN, and the NC2 pin of chip SGM3002 is connected to the 7th pin of chip SP3232EEN.

[0031] In this embodiment, the IN1 pin and IN2 pin of the SGM3002 chip, and the 74LVC1497GV chip... All pins are connected to the same CPU control pin.

[0032] In this embodiment, the chip 74LVC1497GV's The pin is connected to a pull-up resistor R233.

[0033] In this embodiment, a third resistor R257 is connected between the IN1 pin and the IN2 pin of the SGM3002 chip and the control pin of the CPU.

[0034] In this embodiment, see Figure 4 Chip 74LVC1G97GV, logic device strobe:

[0035] When C=0, Y=B;

[0036] When C=1, Y=A;

[0037] Pin 6 is connected to a pull-up resistor, which is set to 1 by default, meaning that Y is the default signal for receiving a 485 signal.

[0038] When pin 6 is set to 0, Y is the received signal of 232.

[0039] The SGM3002 chip is an analog switch, a single-pole double-throw switch. COM is the switch's common terminal.

[0040] When IN=0, the switch does not operate and is switched to the NC terminal;

[0041] When IN=1, the switch is activated and switched to the NO terminal.

[0042] See Figure 5The IN1 and IN2 pins of the SGM3002 chip are connected to the same CPU control pin as the 6 pin of the 74LVC1G97GV chip. The default value is 1, which means the switch is on the NO terminal and the RS-485 bus output is selected. When the control pin is set to 0, the switch is on the NC terminal and the RS-232 bus output is selected.

Claims

1. A 485 / 232 switching circuit based on intelligent terminal operation and maintenance, characterized in that, The RS-485 interface circuit, the RS-232 interface circuit, an analog switch and a logic circuit are included; the analog switch selects one of the RS-232 interface circuit and the RS-485 interface circuit as the output; the analog switch and the logic circuit are connected with the control pin of the same CPU; the RS-485 interface circuit includes a chip UM3085EESA; the RS-232 interface circuit includes a chip SP3232EEN; the analog switch uses a chip 74LVC1497GV; and the logic circuit uses a chip SGM3002.

2. The 485 / 232 switching circuit based on intelligent terminal operation and maintenance according to claim 1, characterized in that, The RO pin of the chip UM3085EESA is connected with the A pin of the chip 74LVC1497GV; the 9th pin of the chip SP3232EEN is connected with the B pin of the chip 74LVC1497GV; the COM1 pin of the chip SGM3002 is connected with one end of the first resistor R215, the other end of the first resistor R215 is connected with the B pin of the chip UM3085EESA, the COM2 pin of the chip SGM3002 is connected with one end of the second resistor R216, and the other end of the second resistor R216 is connected with the A pin of the chip UM3085EESA.

3. The 485 / 232 switching circuit based on intelligent terminal operation and maintenance according to claim 2, characterized in that, The NC1 pin of the chip SGM3002 is connected with the 8th pin of the chip SP3232EEN, and the NC2 pin of the chip SGM3002 is connected with the 7th pin of the chip SP3232EEN.

4. The 485 / 232 switching circuit based on intelligent terminal operation and maintenance according to claim 3, characterized in that, The IN1 pin of the chip SGM3002 and the IN2 pin of the chip SGM3002 and the pins are all connected to the control pins of the same CPU.

5. The 485 / 232 switching circuit based on intelligent terminal operation and maintenance according to claim 4, characterized in that, Chip 74LVC1497GV Pin connection pull-up resistor R233.

6. The 485 / 232 switching circuit based on intelligent terminal operation and maintenance according to claim 5, characterized in that, The IN1 pin of the chip SGM3002 and the IN2 pin of the chip SGM3002 are connected with the control pin of the CPU through the third resistor R257.

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