Solar cell and photovoltaic module

Abstract

The utility model discloses a solar cell and a photovoltaic assembly, and the solar cell comprises a silicon wafer which is provided with a light receiving surface and a backlight surface which are oppositely arranged; the light conversion film layer is stacked on the light receiving surface of the silicon wafer, and the light conversion film layer is used for converting ultraviolet light emitted to the light receiving surface of the silicon wafer into visible light; and the first protection layer is laminated on the surface of the light conversion film layer. According to the solar cell and the photovoltaic assembly, ultraviolet light can be effectively utilized, the efficiency of the cell is improved, and the service life of the cell is prolonged.

Description

Technical Field

[0001] This utility model belongs to the field of photovoltaic cell technology, specifically relating to a solar cell and a photovoltaic module. Background Technology

[0002] Solar energy is a sustainable and clean energy source. However, in practical power plant applications, it is inevitably affected by environmental factors such as ultraviolet radiation, mechanical loads from wind and snow, and acid rain corrosion. Among these, ultraviolet-induced degradation is particularly prominent. Ultraviolet light has a short wavelength and high energy. When the energy of ultraviolet photons exceeds 3.5 electron volts (eV), it will break the Si-H bonds at the SiNx / Si interface, reduce passivation quality, increase emitter saturation current, and reduce carrier lifetime, thereby leading to decreased battery efficiency and power degradation.

[0003] Therefore, higher requirements are placed on the module encapsulation materials and cell structure during the production process. One solution at the module level is to lay a barrier film on the surface of the photovoltaic module. This film effectively filters ultraviolet light and protects the internal structure of the cell; however, this method introduces light loss, limiting the improvement of solar cell conversion efficiency. Another method is to lay a thick UV light transfer film on the surface of the photovoltaic module. This film converts ultraviolet light into blue light, increasing module power and power generation; however, this method produces a thicker UV light transfer film layer, reducing light transmittance, and the high cost of the UV light transfer film increases production costs.

[0004] The solution for battery-side applications typically involves depositing rare-earth ions using PECVD technology after electrode printing to achieve a UV light transfer layer. However, the ff transition luminescence mechanism of rare-earth ions results in poor light absorption, necessitating a thicker film layer and sacrificing transmittance to achieve the UV light conversion effect.

[0005] Therefore, how to convert ultraviolet light into visible light before sunlight reaches the crystalline silicon film layer, while ensuring low cost and no loss of light transmittance, is a technical problem that the industry urgently needs to solve.

[0006] The information disclosed in this background section is intended only to enhance the understanding of the overall background of this utility model and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Utility Model Content

[0007] The purpose of this invention is to provide a solar cell and photovoltaic module that can effectively utilize ultraviolet light, improve battery efficiency, and extend battery life.

[0008] To achieve the above objectives, the technical solution provided by a specific embodiment of this utility model is as follows:

[0009] A solar cell, comprising:

[0010] A silicon wafer has a light-receiving surface and a back-lighting surface that are positioned opposite to each other.

[0011] A light-converting film layer, stacked on the light-receiving surface of the silicon wafer, is used to convert ultraviolet light incident on the light-receiving surface of the silicon wafer into visible light; and

[0012] The first protective layer is stacked on the surface of the light-converting film layer.

[0013] In one or more embodiments of this utility model, the light-converting film layer includes one or more of a first quantum dot layer and a rare earth layer.

[0014] In one or more embodiments of the present invention, the first quantum dot layer comprises an inorganic photoelectric quantum dot layer.

[0015] In one or more embodiments of this utility model, the thickness of the light-converting film is less than or equal to 50 nm; and / or,

[0016] The light-converting film has a transmittance of less than or equal to 40% in the ultraviolet light band; and / or,

[0017] The light-converting film has a transmittance of 95% or more in the visible and near-infrared light band.

[0018] In one or more embodiments of the present invention, the first protective layer includes one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer.

[0019] In one or more embodiments of this utility model, the thickness of the first protective layer ranges from 2nm to 20nm.

[0020] In one or more embodiments of the present invention, a second quantum dot layer is stacked on the backlight surface of the silicon wafer.

[0021] In one or more embodiments of the present invention, the second quantum dot layer includes one or more of the following: silicon quantum dot layer, germanium quantum dot layer, cadmium sulfide quantum dot layer, cadmium selenide quantum dot layer, cadmium telluride quantum dot layer, zinc selenide quantum dot layer, lead sulfide quantum dot layer, lead selenide quantum dot layer, indium phosphide quantum dot layer, and indium arsenide quantum dot layer.

[0022] In one or more embodiments of this invention, the thickness of the second quantum dot layer is 150nm-250nm.

[0023] In one or more embodiments of the present invention, a third antireflection layer is stacked on the side of the second quantum dot layer facing away from the silicon wafer.

[0024] In one or more embodiments of the present invention, the third antireflection layer includes one or more of silicon nitride, silicon oxynitride, and silicon oxide.

[0025] In one or more embodiments of this utility model, the silicon wafer comprises:

[0026] A silicon substrate having a first surface and a second surface disposed opposite to each other;

[0027] A tunneling passivation structure is disposed on the second surface of the silicon substrate. The tunneling passivation structure includes a tunneling layer and a first doped layer stacked sequentially. The doping type of the first doped layer is the same as the doping type of the silicon substrate.

[0028] A second doped layer is disposed on the first surface of the silicon substrate, the doping type of the second doped layer being opposite to the doping type of the silicon substrate, and the light conversion film layer is stacked on the second doped layer.

[0029] In one or more embodiments of this utility model, the silicon wafer further includes:

[0030] A first passivation layer and / or a first antireflection layer are stacked on the surface of the tunneling passivation structure facing away from the silicon wafer; and / or,

[0031] A second passivation layer and / or a second antireflection layer are stacked on the side of the second doped layer facing away from the silicon wafer.

[0032] In one or more embodiments of this utility model,

[0033] The first passivation layer is an aluminum oxide passivation layer;

[0034] The second passivation layer is an aluminum oxide passivation layer;

[0035] The first antireflection layer is one or more of silicon nitride, silicon oxynitride, and silicon oxide.

[0036] The second antireflection layer is one or more of silicon nitride, silicon oxynitride, and silicon oxide.

[0037] A photovoltaic module includes the aforementioned solar cell.

[0038] Compared with the prior art, the solar cell and photovoltaic module of this utility model effectively utilize ultraviolet light by setting a light conversion film layer and a first protective layer on the light-receiving surface, thereby improving the battery efficiency, protecting the light conversion film layer, delaying the aging process of the light conversion film layer, and extending the battery life.

[0039] The solar cell and photovoltaic module of this invention, through the specific setting of the light conversion film layer and thickness, can further improve the efficiency of absorbing and utilizing ultraviolet light, effectively reduce the UVID degradation phenomenon of the battery, and improve the reliability of the battery.

[0040] The solar cell and photovoltaic module of this invention improve the power generation efficiency of the battery by setting a second quantum dot layer on the back surface to absorb long-wavelength light and generate electron-hole pairs. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is an exploded view of the structure of the solar cell in Embodiment 1 of this utility model;

[0043] Figure 2 This is a schematic diagram of the silicon wafer structure of the solar cell in Embodiment 2 of this utility model;

[0044] Figure 3 This is an exploded view of the structure of the solar cell in Embodiment 3 of this utility model;

[0045] Figure 4 This is a schematic diagram of the silicon wafer structure of the solar cell in Embodiment 3 of this utility model. Detailed Implementation

[0046] To enable those skilled in the art to better understand the technical solutions of this utility model, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of this utility model.

[0047] This utility model discloses a solar cell, comprising:

[0048] A silicon wafer has a light-receiving surface and a back-lighting surface that are positioned opposite to each other.

[0049] A light-converting film layer, stacked on the light-receiving surface of a silicon wafer, is used to convert ultraviolet light incident on the light-receiving surface of the silicon wafer into visible light; and

[0050] The first protective layer is stacked on the surface of the light conversion film layer.

[0051] In a preferred embodiment, a second quantum dot layer and a third antireflection layer are stacked on the back surface of the silicon wafer.

[0052] In a preferred embodiment, the solar cell is a TOPCon cell, and the silicon wafer includes:

[0053] A silicon substrate having a first surface and a second surface disposed opposite to each other;

[0054] A tunneling passivation structure is disposed on the second surface of a silicon substrate. The tunneling passivation structure includes a tunneling layer and a first doped layer stacked sequentially. The doping type of the first doped layer is the same as that of the silicon substrate.

[0055] A second doped layer is disposed on the first surface of the silicon substrate. The doping type of the second doped layer is opposite to that of the silicon substrate. The light conversion film layer is stacked on the second doped layer.

[0056] It is understood that in other embodiments, the solar cell may also be a BC cell, an HJT cell, etc.

[0057] This utility model also discloses a photovoltaic module, including the aforementioned solar cell.

[0058] The solar cell and photovoltaic module of this invention effectively absorb and utilize ultraviolet light by setting a light-converting film layer and a first protective layer on the light-receiving surface, thereby improving the battery efficiency and protecting the light-converting film layer, slowing down the aging process of the light-converting film layer, and extending the battery life. By setting a second quantum dot layer on the back light surface, it is used to absorb long-wavelength light and generate electron-hole pairs, thereby improving the power generation efficiency of the battery.

[0059] The present invention will be further illustrated below with specific examples.

[0060] Example 1:

[0061] like Figure 1 As shown, the solar cell in Embodiment 1 of this utility model includes a silicon wafer 10. The silicon wafer 10 has a light-receiving surface 10a and a back-lighting surface 10b arranged opposite to each other.

[0062] It is understandable that the silicon wafer 10 here is not an unprocessed silicon wafer, but a semi-finished structure that has undergone a certain degree of processing and has a certain photoelectric conversion function. Based on this silicon wafer 10, further processing can be carried out, such as forming a passivation layer and / or an anti-reflection layer, or depositing electrodes, to make TOPCon cells, BC cells, or HJT cells, etc.

[0063] A light-converting film layer 20 is stacked on the light-receiving surface 10a of the silicon wafer 10. The light-converting film layer 20 is used to convert ultraviolet light incident on the light-receiving surface 10a of the silicon wafer 10 into visible light, effectively utilizing ultraviolet light and improving the photoelectric conversion efficiency of the battery.

[0064] The light-converting film layer 20 may include, but is not limited to, one or more of a first quantum dot layer and a rare-earth layer. The first quantum dot layer may include an inorganic light-converting quantum dot layer. The light-converting film layer 20 can be formed on the light-receiving surface 10a of the silicon wafer 10 by methods such as blade coating, spraying, printing, or PECVD deposition. The thickness of the light-converting film layer 20 is less than or equal to 50 nm. The transmittance of the light-converting film layer 20 in the ultraviolet light band (250 nm-380 nm) is less than or equal to 40%; the transmittance of the light-converting film layer 20 in the visible and near-infrared light band (380 nm-870 nm) is greater than or equal to 95%.

[0065] The first protective layer 30 is stacked on the surface of the light conversion film layer 20 facing away from the silicon wafer 10. Preferably, the projection of the first protective layer 30 in the thickness direction of the silicon wafer 10 completely covers the light conversion film layer 20, so as to protect the light conversion film layer 20, delay the aging process of the light conversion film layer 20, and extend the battery life.

[0066] Preferably, the first protective layer 30 may include, but is not limited to, one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer. The thickness of the first protective layer 30 ranges from 2 nm to 20 nm.

[0067] Example 2:

[0068] The solar cell in Embodiment 2 of this utility model is preferably a TOPCon cell, comprising a silicon wafer 10. The silicon wafer 10 has a light-receiving surface 10a and a back-lighting surface 10b disposed opposite to each other.

[0069] refer to Figure 2 As shown, the silicon wafer 10 includes a silicon substrate 101, a tunneling passivation structure 102, and a second doped layer 103.

[0070] The silicon substrate 101 has a first surface S1 and a second surface S2 disposed opposite to each other. The first surface S1 corresponds to the light-receiving surface 10a of the silicon wafer 10, and the second surface S2 corresponds to the back-lighting surface 10b of the silicon wafer 10.

[0071] In this embodiment, the silicon substrate 101 is preferably an N-type silicon substrate. A light-trapping structure can be formed on the surface of the silicon substrate 101, such as a pyramidal textured structure that can be formed on the surface of the silicon substrate 101 by alkaline texturing.

[0072] A tunneling passivation structure 102 is disposed on the second surface S2 of the silicon substrate 101. The tunneling passivation structure 102 includes a tunneling layer 1021 and a first doped layer 1022 stacked sequentially. The doping type of the first doped layer 1022 is the same as that of the silicon substrate 10.

[0073] Tunneling layer 1021 is silicon dioxide (SiO2). X ) layer, silicon oxynitride (SiO) X N Y The tunneling layer 1021 can be one or a combination of two of the following layers, preferably a silicon oxide layer. The thickness of the tunneling layer 1021 is preferably 1 nm to 2 nm.

[0074] The doping type of the first doped layer 1022 is the same as that of the silicon substrate 101. In this embodiment, the first doped layer 1022 is a phosphorus-doped polycrystalline silicon layer. During the deposition of the phosphorus-doped polycrystalline silicon layer, the flow rate of phosphine is controlled between 100 sccm and 2500 sccm. After deposition, it undergoes a high-temperature annealing treatment at 800℃-950℃ to excite the phosphorus in the polycrystalline silicon layer to diffuse into the inner layer, forming the first doped layer 1022.

[0075] A second doped layer 103 is disposed on the first surface S1 of the silicon substrate 101. The doping type of the second doped layer 103 is opposite to that of the silicon substrate 101.

[0076] In this embodiment, a second doped layer 103 is formed at the first surface S1 of the silicon substrate 101 by diffusion process or PECVD process, thereby forming a PN junction, which generates minority carrier-hole pairs after illumination.

[0077] For example, the second doped layer 103 in this embodiment is a P-type doped layer, which is formed in the first surface S1 of the silicon substrate 101 by boron diffusion and high-temperature oxidation process.

[0078] The silicon wafer 10 may also include a first passivation layer 104a and / or a first antireflection layer 105a, a second passivation layer 104b and / or a second antireflection layer 105b.

[0079] A first passivation layer 104a and / or a first antireflection layer 105a are stacked on the surface of the tunneling passivation structure 102 facing away from the silicon substrate 101. The first passivation layer 104a is preferably an aluminum oxide passivation layer with a thickness of 3 nm to 8 nm. The first antireflection layer 105a is one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. Silicon nitride is chemically inactive and has strong resistance to acid and alkali corrosion, which can reduce the battery's sensitivity to the environment. The refractive index of the first antireflection layer 105a gradually changes from the direction away from the silicon substrate 10.

[0080] A second passivation layer 104b and / or a second antireflection layer 105b are stacked on the surface of the second doped layer 103 facing away from the silicon substrate 101. The second passivation layer 104b is preferably an aluminum oxide passivation layer with a thickness of 3 nm to 8 nm. The second antireflection layer 105b is one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. Silicon nitride is chemically inactive and has strong resistance to acid and alkali corrosion, which can reduce the battery's sensitivity to the environment. The refractive index of the second antireflection layer 105b gradually changes from the direction away from the silicon substrate 10.

[0081] It is understandable that the second passivation layer 104b and / or the second antireflection layer 105b may not be provided on the side of the second doped layer 103 facing away from the silicon substrate 101.

[0082] The light-converting film 20 is stacked on the second doped layer 103 or on the second passivation layer 104b and / or the second antireflection layer 105b. The light-converting film 20 is used to convert ultraviolet light incident on the light-receiving surface 10a of the silicon wafer 10 into visible light, effectively utilizing ultraviolet light and improving the photoelectric conversion efficiency of the battery.

[0083] The light-converting film layer 20 may include, but is not limited to, one or more of a first quantum dot layer and a rare-earth layer. The first quantum dot layer may include an inorganic light-converting quantum dot layer. The light-converting film layer 20 can be formed on the light-receiving surface 10a of the silicon wafer 10 by methods such as blade coating, spraying, printing, or PECVD deposition. The thickness of the light-converting film layer 20 is less than or equal to 50 nm. The transmittance of the light-converting film layer 20 in the ultraviolet light band (250 nm-380 nm) is less than or equal to 40%; the transmittance of the light-converting film layer 20 in the visible and near-infrared light band (380 nm-870 nm) is greater than or equal to 95%.

[0084] The first protective layer 30 is stacked on the surface of the light conversion film layer 20 facing away from the silicon wafer 10. Preferably, the projection of the first protective layer 30 in the thickness direction of the silicon wafer 10 completely covers the light conversion film layer 20, so as to protect the light conversion film layer 20, delay the aging process of the light conversion film layer 20, and extend the battery life.

[0085] Preferably, the first protective layer 30 may include, but is not limited to, one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer. The thickness of the first protective layer 30 ranges from 2 nm to 20 nm.

[0086] The method for preparing the solar cell in Example 2 specifically includes the following steps:

[0087] 1. Double-sided pile fabrication

[0088] A silicon substrate 101 is provided. The silicon substrate 101 includes a first surface S1 and a second surface S2 disposed opposite to each other. The first surface S1 corresponds to the light-receiving surface 10a of the silicon wafer 10, and the second surface S2 corresponds to the backlight surface 10b of the silicon wafer 10.

[0089] In this embodiment, the silicon substrate 101 is an N-type silicon substrate.

[0090] In this embodiment, the first surface S1 and the second surface S2 of the silicon substrate 101 are formed with a pyramidal textured surface structure by an alkaline texturing process.

[0091] 2. Boron diffusion

[0092] A second p-type doped layer 103 is formed on the first surface S1 of the silicon substrate 101 through boron diffusion and high-temperature oxidation. Specifically, diffusion is carried out in a high-temperature furnace tube using a boron source (e.g., BCl3 or BBr3) deposition-progress method, and a layer of silicon oxide is formed on the outer layer. During the boron diffusion process, BSG will be formed on the second surface S2 and the side surfaces of the silicon substrate 101, which needs to be removed by subsequent alkaline polishing.

[0093] 3. Alkaline polishing cleaning of the back and sides

[0094] The silicon substrate 101 after boron diffusion is subjected to hydrofluoric acid solution to remove silicon oxide from the second surface S2 and the side surface. Then, the second surface S2 and the side surface are subjected to alkaline polishing to remove the edge junction and back-side plating (BSG). Finally, it is cleaned.

[0095] 4. Preparation of back-side tunneling passivation structure

[0096] A tunneling layer 1022 and a first doped layer 1022 are sequentially stacked on the second surface S2.

[0097] For example, in this embodiment, a PECVD process is used for deposition. First, a silicon oxide tunneling layer with a thickness of 1nm-2nm is deposited on the second surface S2. Then, one or more phosphorus-doped amorphous silicon layers (first doped layer 1022) are deposited, wherein the phosphine flow rate is adjusted between 100sccm and 2500sccm.

[0098] 5. Annealing activation

[0099] Annealing is performed in a high-temperature annealing furnace to stimulate phosphorus diffusion into the inner layer of the polycrystalline silicon layer, forming the first doped layer 1022. The annealing temperature is 800℃-950℃. After annealing, the phosphorus-doped amorphous silicon layer is transformed into a phosphorus-doped polycrystalline silicon layer. Phosphorus activation is achieved through annealing, forming a tunneling passivation contact structure on the second surface S2.

[0100] 6. Remove plating

[0101] Alkaline etching: The first surface and edge PSG coating are removed using an alkaline solution in an alkaline washing tank.

[0102] RCA cleaning is an existing technology and will not be described in detail here.

[0103] 7. Passivation layer preparation

[0104] A second passivation layer 104b and a first passivation layer 104a are prepared on the first surface S1 and the second surface S2 of a silicon substrate using the ALD process. Both the second passivation layer 104b and the first passivation layer 104a are aluminum oxide passivation layers with a thickness of 3nm-8nm.

[0105] 8. Preparation of antireflection layer

[0106] A second antireflection layer 105b and a first antireflection layer 105a are fabricated on the first surface S1 and the second surface S2 of a silicon substrate using a PECVD process. The second antireflection layer 105b and the first antireflection layer 105a can be a stacked film formed by any one or more of silicon nitride, silicon oxynitride, and silicon oxide layers, preferably silicon nitride. Silicon nitride is chemically inactive and has strong resistance to acid and alkali corrosion, which can reduce the battery's sensitivity to the environment. The refractive index of both the second antireflection layer 105b and the first antireflection layer 105a can gradually change from the direction away from the silicon substrate 10.

[0107] 9. Preparation of light-converting film layer 20

[0108] A light-converting film layer 20 is formed on the first surface S1 of the silicon substrate by means of scraping, spraying, printing or PECVD deposition. The light-converting film layer 20 is used to convert ultraviolet light incident on the light-receiving surface 10a of the silicon wafer 10 into visible light, effectively utilizing ultraviolet light and improving the photoelectric conversion efficiency of the battery.

[0109] The light-converting film layer 20 may include, but is not limited to, one or more of a first quantum dot layer and a rare-earth layer. The first quantum dot layer may include an inorganic light-converting quantum dot layer. The thickness of the light-converting film layer 20 is less than or equal to 50 nm. The transmittance of the light-converting film layer 20 in the ultraviolet light band (250 nm-380 nm) is less than or equal to 40%; the transmittance of the light-converting film layer 20 in the visible and near-infrared light band (380 nm-870 nm) is greater than or equal to 95%.

[0110] 10. Preparation of the first protective layer 30

[0111] A first protective layer 30 is grown on the surface of the light conversion film layer 20. The first protective layer 30 may include, but is not limited to, one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer. The thickness of the first protective layer 30 ranges from 2 nm to 20 nm.

[0112] Preferably, the projection of the first protective layer 30 in the thickness direction of the silicon wafer 10 completely covers the light conversion film layer 20, so as to protect the light conversion film layer 20, delay the aging process of the light conversion film layer 20, and extend the battery life.

[0113] 11. Printed metal electrodes

[0114] The first and second electrodes are printed on the light-receiving and back-light-receiving surfaces respectively using a screen printing process, followed by sintering and photo-injection or electro-injection treatments to form ohmic contacts. The first and second electrodes are existing grid line electrodes, typically including main grid lines and fine grid lines.

[0115] Example 3:

[0116] like Figure 3 As shown, the solar cell in Embodiment 3 of this utility model includes a silicon wafer 10. The silicon wafer 10 has a light-receiving surface 10a and a back-lighting surface 10b arranged opposite to each other.

[0117] It is understandable that the silicon wafer 10 here is not an unprocessed silicon wafer, but a semi-finished structure that has undergone a certain degree of processing and has a certain photoelectric conversion function. Based on this silicon wafer 10, further processing can be carried out, such as forming a passivation layer and / or an anti-reflection layer, or depositing electrodes, to make TOPCon cells, BC cells, or HJT cells, etc.

[0118] A light-converting film layer 20 is stacked on the light-receiving surface 10a of the silicon wafer 10. The light-converting film layer 20 is used to convert ultraviolet light incident on the light-receiving surface 10a of the silicon wafer 10 into visible light, effectively utilizing ultraviolet light and improving the photoelectric conversion efficiency of the battery.

[0119] The light-converting film layer 20 may include, but is not limited to, one or more of a first quantum dot layer and a rare-earth layer. The first quantum dot layer may include an inorganic light-converting quantum dot layer. The light-converting film layer 20 can be formed on the light-receiving surface 10a of the silicon wafer 10 by methods such as blade coating, spraying, printing, or PECVD deposition. The thickness of the light-converting film layer 20 is less than or equal to 50 nm. The transmittance of the light-converting film layer 20 in the ultraviolet light band (250 nm-380 nm) is less than or equal to 40%; the transmittance of the light-converting film layer 20 in the visible and near-infrared light band (380 nm-870 nm) is greater than or equal to 95%.

[0120] The first protective layer 30 is stacked on the surface of the light conversion film layer 20 facing away from the silicon wafer 10. Preferably, the projection of the first protective layer 30 in the thickness direction of the silicon wafer 10 completely covers the light conversion film layer 20, so as to protect the light conversion film layer 20, delay the aging process of the light conversion film layer 20, and extend the battery life.

[0121] Preferably, the first protective layer 30 may include, but is not limited to, one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer. The thickness of the first protective layer 30 ranges from 2 nm to 20 nm.

[0122] The second quantum dot layer 40 is stacked on the back surface 10b of the silicon wafer 10. The second quantum dot layer 40 is used to absorb long-wavelength light, generate electron-hole pairs, and improve the power generation efficiency of the battery.

[0123] The second quantum dot layer 40 may include, but is not limited to, one or more of the following: silicon quantum dot layer, germanium quantum dot layer, cadmium sulfide quantum dot layer, cadmium selenide quantum dot layer, cadmium telluride quantum dot layer, zinc selenide quantum dot layer, lead sulfide quantum dot layer, lead selenide quantum dot layer, indium phosphide quantum dot layer, and indium arsenide quantum dot layer. The second quantum dot layer 40 may be formed on the back surface 10b of the silicon wafer 10 by methods such as blade coating, spraying, printing, or PECVD deposition. The thickness of the second quantum dot layer 40 is 150 nm to 250 nm.

[0124] The third antireflection layer 50 is stacked on the surface of the second quantum dot layer 40 facing away from the silicon wafer 10. Preferably, the third antireflection layer 50 may include, but is not limited to, one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer. The refractive index of the third antireflection layer 50 may gradually change from the direction away from the silicon wafer.

[0125] In the solar cell of this embodiment 3, the solar cell can also preferably be a TOPCon cell. Therefore, as Figure 4 As shown, the silicon wafer 10 in this embodiment may include a silicon substrate 101, a tunneling passivation structure 102, and a second doped layer 103.

[0126] The silicon substrate 101 has a first surface S1 and a second surface S2 disposed opposite to each other. The first surface S1 corresponds to the light-receiving surface 10a of the silicon wafer 10, and the second surface S2 corresponds to the back-lighting surface 10b of the silicon wafer 10.

[0127] In this embodiment, the silicon substrate 101 is preferably an N-type silicon substrate. A light-trapping structure can be formed on the surface of the silicon substrate 101, such as a pyramidal textured structure that can be formed on the surface of the silicon substrate 101 by alkaline texturing.

[0128] A tunneling passivation structure 102 is disposed on the second surface S2 of the silicon substrate 101. The tunneling passivation structure 102 includes a tunneling layer 1021 and a first doped layer 1022 stacked sequentially. The doping type of the first doped layer 1022 is the same as that of the silicon substrate 10.

[0129] Tunneling layer 1021 is silicon dioxide (SiO2). X ) layer, silicon oxynitride (SiO) X N YThe tunneling layer 1021 can be one or a combination of two of the following layers, preferably a silicon oxide layer. The thickness of the tunneling layer 1021 is preferably 1 nm to 2 nm.

[0130] The doping type of the first doped layer 1022 is the same as that of the silicon substrate 101. In this embodiment, the first doped layer 1022 is a phosphorus-doped polycrystalline silicon layer. During the deposition of the phosphorus-doped polycrystalline silicon layer, the flow rate of phosphine is controlled between 100 sccm and 2500 sccm. After deposition, it undergoes a high-temperature annealing treatment at 800℃-950℃ to excite the phosphorus in the polycrystalline silicon layer to diffuse into the inner layer, forming the first doped layer 1022.

[0131] A second doped layer 103 is disposed on the first surface S1 of the silicon substrate 101. The doping type of the second doped layer 103 is opposite to that of the silicon substrate 101.

[0132] In this embodiment, a second doped layer 103 is formed at the first surface S1 of the silicon substrate 101 by diffusion process or PECVD process, thereby forming a PN junction, which generates minority carrier-hole pairs after illumination.

[0133] For example, the second doped layer 103 in this embodiment is a P-type doped layer, which is formed in the first surface S1 of the silicon substrate 101 by boron diffusion and high-temperature oxidation process.

[0134] The silicon wafer 10 may also include a first passivation layer 104a and / or a first antireflection layer (not shown), a second passivation layer 104b and / or a second antireflection layer 105b.

[0135] A first passivation layer 104a and / or a first antireflection layer are stacked on the surface of the tunneling passivation structure 102 facing away from the silicon substrate 101. The first passivation layer 104a is preferably an aluminum oxide passivation layer with a thickness of 3 nm-8 nm. The first antireflection layer is one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. Silicon nitride is chemically inactive and has strong resistance to acid and alkali corrosion, which can reduce the battery's sensitivity to the environment. The refractive index of the first antireflection layer gradually changes from the direction away from the silicon substrate 10.

[0136] A second passivation layer 104b and / or a second antireflection layer 105b are stacked on the surface of the second doped layer 103 facing away from the silicon substrate 101. The second passivation layer 104b is preferably an aluminum oxide passivation layer with a thickness of 3 nm to 8 nm. The second antireflection layer 105b is one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. Silicon nitride is chemically inactive and has strong resistance to acid and alkali corrosion, which can reduce the battery's sensitivity to the environment. The refractive index of the second antireflection layer 105b gradually changes from the direction away from the silicon substrate 10.

[0137] The light-converting film layer 20 is stacked on the second passivation layer 104b and / or the second antireflection layer 105b.

[0138] The second quantum dot layer 40 is stacked on the first passivation layer 104a and / or the first antireflection layer.

[0139] It is understandable that the first antireflection layer may not be disposed on the surface of the tunneling passivation structure 102 facing away from the silicon substrate 101. Therefore, the second quantum dot layer 40 can be directly stacked on the first passivation layer 104a.

[0140] Compared with the prior art, the solar cell and photovoltaic module of this utility model effectively utilize ultraviolet light by setting a light conversion film layer and a first protective layer on the light-receiving surface, thereby improving the battery efficiency, protecting the light conversion film layer, delaying the aging process of the light conversion film layer, and extending the battery life.

[0141] The solar cell and photovoltaic module of this invention, through the specific setting of the light conversion film layer and thickness, can further improve the efficiency of absorbing and utilizing ultraviolet light, effectively reduce the UVID degradation phenomenon of the battery, and improve the reliability of the battery.

[0142] The solar cell and photovoltaic module of this invention improve the power generation efficiency of the battery by setting a second quantum dot layer on the back surface to absorb long-wavelength light and generate electron-hole pairs.

[0143] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0144] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A solar cell, characterized by, The solar cell comprises: a silicon wafer having a light-receiving surface and a back surface arranged oppositely; a light-conversion film layer stacked on the light-receiving surface of the silicon wafer, the light-conversion film layer being configured to convert ultraviolet light incident on the light-receiving surface of the silicon wafer into visible light; and a first protective layer stacked on a surface of the light-conversion film layer.

2. The solar cell according to claim 1, characterized in that, The light-conversion film layer comprises one or more of a first quantum dot layer and a rare earth layer.

3. The solar cell according to claim 2, characterized in that, The first quantum dot layer comprises an inorganic light-conversion quantum dot layer.

4. The solar cell of claim 1, wherein The light-conversion film layer has a thickness less than or equal to 50 nm; and / or The light-conversion film layer has a light transmittance in an ultraviolet light wavelength band less than or equal to 40%; and / or The light-conversion film layer has a light transmittance in a visible near-infrared light wavelength band greater than or equal to 95%.

5. The solar cell of claim 1, wherein The first protective layer comprises one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer; and / or The first protective layer has a thickness of 2 nm to 20 nm.

6. The solar cell of claim 1, wherein The back surface of the silicon wafer has a second quantum dot layer stacked thereon.

7. The solar cell according to claim 6, characterized in that, The second quantum dot layer comprises one or more of a silicon quantum dot layer, a germanium quantum dot layer, a cadmium sulfide quantum dot layer, a cadmium selenide quantum dot layer, a cadmium telluride quantum dot layer, a zinc selenide quantum dot layer, a lead sulfide quantum dot layer, a lead selenide quantum dot layer, an indium phosphide quantum dot layer, and an indium arsenide quantum dot layer; and / or The second quantum dot layer has a thickness of 150 nm to 250 nm.

8. The solar cell of claim 6, wherein, A third anti-reflection layer is stacked on a surface of the second quantum dot layer facing away from the silicon wafer.

9. The solar cell of claim 8, wherein, The third anti-reflection layer comprises one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer.

10. The solar cell of claim 1, wherein, The solar cell comprises: a silicon substrate having a first surface and a second surface arranged oppositely; a tunneling passivation structure arranged on the second surface of the silicon substrate, the tunneling passivation structure comprising a tunneling layer and a first doped layer stacked in sequence, the first doped layer having a same doping type as a doping type of the silicon substrate; a second doped layer arranged on the first surface of the silicon substrate, the second doped layer having a doping type opposite to the doping type of the silicon substrate, and the light-conversion film layer being stacked on the second doped layer.

11. The solar cell of claim 10, wherein, The solar cell further comprises: a first passivation layer and / or a first anti-reflection layer stacked on a surface of the tunneling passivation structure facing away from the silicon substrate; and / or a second passivation layer and / or a second anti-reflection layer stacked on a surface of the second doped layer facing away from the silicon substrate.

12. The solar cell of claim 11, wherein the first passivation layer is an aluminum oxide passivation layer; the second passivation layer is an aluminum oxide passivation layer; the first anti-reflection layer comprises one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer; the second anti-reflection layer comprises one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer.

13. A photovoltaic module, characterized by, The solar cell comprises any one of claims 1-12.

Images