Wafer bearing structure and etching device for sconi etching process

Abstract

The utility model provides a wafer bearing structure and an etching device used for the sconi etching process, the wafer bearing structure comprises a pedestal, a top disc and a thimble, the top disc is stacked on the pedestal, the pedestal is provided with a plurality of first open holes close to the edge, the top disc is provided with a plurality of second open holes close to the edge, the first open holes and the second open holes are coaxially arranged, and the thimble is arranged on the pedestal. The ejector pin can move in the axial direction of the first open hole and the second open hole so as to enable a wafer located on the ejector disc to ascend or descend, and the upper side, corresponding to the first open hole, of the base is provided with a first heating element, and when the wafer bearing structure is applied to the sconi etching process, the first heating element is arranged on the upper side, corresponding to the first open hole, of the base; the wafer is located on the top tray, and the first heating element can perform temperature compensation on the second opening area of the top tray, so that the etching reaction rate of the wafer is improved, the etching thickness difference between the center of the wafer and the corresponding second opening area of the top tray is balanced, and the uniformity of a sconi etching process is improved.

Description

Technical Field

[0001] This utility model belongs to the field of semiconductor manufacturing technology, and more specifically, it relates to a wafer carrier structure and an etching apparatus for the siconi etching process. Background Technology

[0002] The siconi etching process is a new generation of pre-cleaning process. When integrated circuit technology develops to below 65nm, the traditional pre-cleaning methods such as hydrofluoric acid immersion (HF dip) and argon sputtering can no longer meet the needs of the process, and the advanced siconi pre-cleaning process must be adopted.

[0003] The siconi etching apparatus mainly consists of a remote plasma generator, a heating element, and a wafer support structure. The remote plasma generator's primary function is to generate active particles from a mixture of NF3 and NH3 under plasma excitation. The support structure holds the wafer, and its temperature is low, close to room temperature. After the active particles enter the reaction chamber, they react with the silicon dioxide on the wafer surface on the support substrate to generate a sublimable compound, hexafluorosilane. Once the silicon dioxide on the wafer has formed the sublimable hexafluorosilane, the support structure lifts the wafer closer to the heating element. The heating element then uses radiation heating to sublimate the hexafluorosilane on the wafer surface. A vacuum pump then removes the gas, effectively removing the native oxide.

[0004] In existing siconi etching apparatuses, the wafer support structure within the reaction chamber supports the wafer via a top plate during the etching process. When the wafer needs to be heated close to the heating element, it is lifted by a pin. The inventors have discovered that wafers processed by the existing siconi etching process exhibit uneven etching. Utility Model Content

[0005] The purpose of this invention is to provide a wafer support structure and an etching apparatus for the siconi etching process, which can improve the situation of uneven etching on the wafer.

[0006] To achieve the above objectives, the technical solution adopted by this utility model is as follows: In the first aspect, this utility model provides a wafer carrier structure, including a base, a top disk, and a ejector pin. The top disk is stacked on the base. The base has a plurality of first openings near its edge, and the top disk has a plurality of second openings near its edge. The first openings and the second openings are coaxially arranged. The ejector pin can move along the axial direction of the first openings and the second openings to allow the wafer located on the top disk to rise or fall.

[0007] A first heating element is provided on the base, the first heating element is located in the second opening, and the top surface of the first heating element is not higher than the upper surface of the top plate.

[0008] In one embodiment, the first heating element has an annular cross-section, and the top of the first heating element is flush with the top of the top plate.

[0009] In one embodiment, a second heating element is provided at the edge of the top plate; the second heating element is integrated into the top plate, or the second heating element is provided on the outer side of the edge of the top plate.

[0010] In one embodiment, both the first heating element and the second heating element are positive temperature coefficient thermistors.

[0011] In one embodiment, both the first heating element and the second heating element are ceramic heating elements.

[0012] In one embodiment, the thickness of the top plate near the second opening is greater than the thickness of the top plate near the center of the top plate, and the thickness of the edge of the top plate is equal to the thickness of the top plate near the second opening.

[0013] In one embodiment, the upper surface of the base is provided with an air channel groove, and the top plate is provided with an air outlet that runs vertically through the top and bottom, the air outlet communicating with the air channel groove.

[0014] In one embodiment, the number of ejector pins is at least three, and the adjacent ejector pins are evenly spaced.

[0015] In one embodiment, the temperatures of the first heating element and the second heating element are adjustable, and the adjustable temperature range of the first heating element and the second heating element is 0-300 degrees Celsius.

[0016] A second aspect of this invention provides an etching apparatus for the siconi etching process, comprising a reaction chamber, a heating structure, and a wafer support structure as described above, wherein the wafer support structure and the heating structure are located within the reaction chamber.

[0017] The etching apparatus for the siconi etching process provided by this utility model includes a reaction chamber, a heating structure, and a wafer support structure as described above. The wafer support structure and the heating structure are located within the reaction chamber. The wafer support structure includes a base, a top disk, and ejector pins. The top disk is stacked on the base. The base has multiple first openings near its edge, and the top disk has multiple second openings near its edge. The first and second openings are coaxially arranged. The ejector pins can move along the axial direction of the first and second openings to raise or lower the wafer, thereby allowing the wafer to rest against the siconi etching process. A first heating element is provided on the base, either near or far from the heating structure. The first heating element is located inside the second opening, and the top surface of the first heating element is not higher than the upper surface of the top plate. By providing the first heating element on the upper side of the base corresponding to the first opening, the etching device can perform temperature compensation near the area of ​​the second opening on the top plate during the wafer etching process. This improves the etching reaction rate near the area of ​​the second opening on the wafer, balances the etching thickness difference between the wafer center area and the area of ​​the second opening on the top plate, and improves the uniformity of the siconi etching process. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 Schematic diagram of wafer etching thickness images obtained by the etching apparatus of the siconi etching process at the beginning, middle and end of maintenance;

[0020] Figure 2 This is a schematic diagram showing the relationship between etching amount and substrate temperature in the siconi etching process.

[0021] Figure 3 A schematic diagram of the etching apparatus for the siconi etching process provided in an embodiment of this utility model;

[0022] Figure 4 A three-dimensional assembly drawing of the wafer carrier structure provided in the embodiments of this utility model;

[0023] Figure 5 This is a cross-sectional schematic diagram of the wafer support structure provided in an embodiment of the present invention.

[0024] The following are the labeling elements in the figure:

[0025] 1-Reaction chamber; 2-Heating structure; 3-Wafer support structure; 4-Wafer; 5-First heating element; 31-Base; 32-Top plate; 33-Ejector pin; 14-Side side; 311-First opening; 312-Gas channel groove; 321-Second opening; 322-Gas outlet. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0027] In the description of this utility model, it should be understood that the terms "comprising" and "having" as used herein, and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0028] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0029] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. It should be understood that the term "and / or" as used herein is merely a description of the relationship between related objects, indicating that three relationships may exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. In the description of this utility model, unless otherwise stated, "multiple" means two or more.

[0030] The siconi etching process involves placing the wafer on a top disk of a low-temperature substrate (35°C). NF3 and NH3 generate active particles under the influence of remote plasma. These active particles react with silicon dioxide on the wafer at low temperature to form a sublimable compound, hexafluorosilane. A pusher then lifts the wafer closer to the heating structure, causing the hexafluorosilane to sublimate. Inevitably, some byproducts condense on the top disk and substrate during this process, causing the environment inside the reaction chamber to gradually deteriorate as the number of wafers processed increases. Current siconi etching processes require maintenance after a period of use, such as raising the substrate and top disk to near the heating structure. Thermal radiation heats the top disk, causing surface byproducts to sublimate, improving the environment inside the reaction chamber and extending its lifespan. During maintenance, the top disk is replaced, for example, after processing 8000 wafers in the reaction chamber. A chamber cleaning procedure is performed midway through each maintenance cycle to remove accumulated byproducts from the top disk. Figure 1 These are schematic images of wafer etching thickness obtained from the etching apparatus of the Siconi etching process at the beginning, middle, and end of maintenance phases, combined with... Figure 1 The siconi etching process data shown indicates that the wafer has a good etching thickness in the early stages of maintenance, the etching thickness image improves in the middle stages, but deteriorates in the late stages. Combining the wafer etching thickness image obtained in the middle stages of maintenance, it can be seen that cleaning the chamber in the middle stages of maintenance did not restore the etching thickness image to its initial state, indicating that the effect of using the heating structure to remove byproducts on the top disk is limited.

[0031] In the siconi etching process, the wafer rests on a top disk on a substrate. The edge region of the top disk and the corresponding ejector pin region are raised structures that directly contact the wafer to support it. The central region of the top disk is a recessed structure that does not directly contact the wafer and is used for gas flow. This structure results in uneven heat transfer at the wafer edge, especially in the corresponding ejector pin region, compared to the central region, leading to cold spots at the wafer edge, particularly in the ejector pin region. Figure 2 This diagram illustrates the relationship between etching depth and substrate temperature in the siconi etching process, where the horizontal axis represents the substrate temperature and the vertical axis represents the etching depth. Figure 2 It is known that a decrease in temperature on the substrate leads to a decrease in etching rate, combined with Figure 1 Medium wafer etching thickness image and Figure 2 The relationship between etching depth and substrate temperature reveals a significant temperature difference between the wafer edge, especially the tip region, and the wafer center, resulting in abnormal etching thickness in this area. Based on the above reasons, this application provides a wafer support structure and an etching apparatus for the siconi etching process.

[0032] The wafer carrier structure and etching apparatus for the siconi etching process provided by this utility model will be described in detail below with reference to specific embodiments.

[0033] Figure 3 This is a schematic diagram of the etching apparatus for the siconi etching process provided in an embodiment of the present invention. Figure 4 This is a three-dimensional assembly drawing of the wafer carrier structure provided in an embodiment of the present invention. Figure 5 Please refer to the cross-sectional structural diagram of the wafer support structure provided in the embodiment of this utility model. Figures 3-5 This embodiment provides a wafer support structure. This embodiment describes the wafer support structure in conjunction with an etching apparatus for the siconi etching process. The etching apparatus for the siconi etching process includes a reaction chamber 1, a heating structure 2, and a wafer support structure 3. The wafer support structure 3 and the heating structure 2 are located within the reaction chamber 1. The wafer support structure of this embodiment includes a base 31, a top disk 32, and ejector pins 33. The top disk 32 is stacked on the base 31. The base 31 has multiple first openings 311 near its edge, and the top disk 32 has multiple second openings 321 near its edge. The first openings 311 and the second openings 321 are coaxially arranged. The ejector pins 33 can move axially along the first openings 311 and the second openings 321 to raise or lower the wafer 4 located on the top disk 32, thereby moving the wafer 4 closer to or away from the heating structure 2.

[0034] A first heating element 5 is provided on the base 31. The first heating element 5 is located inside the second opening 321, and the top surface of the first heating element 5 is not higher than the upper surface of the top plate 32.

[0035] The wafer carrier structure in this embodiment is applied to the siconi etching process. The siconi etching process involves placing the wafer on the top disk 32 of a low-temperature substrate 31 (35°C). NF3 and NH3 generate active particles under the action of remote plasma. These active particles react with the silicon dioxide on the wafer at low temperature to generate a sublimable compound, hexafluorosilane. Then, a pusher lifts the wafer close to the heating structure, causing the hexafluorosilane to sublimate, thus removing the native oxide. The siconi etching process has many advantages compared to hydrofluoric acid immersion (HF dip) and argon sputtering. The siconi etching process eliminates the Q-time problem present in the HF dip process. Since HF dip and metal film growth must be performed on different equipment, contact with the atmosphere during wafer transport causes a thin layer of SiO2 film to regrow on the wafer. Ar sputter generates strong plasma within the reaction chamber, creating a powerful bombardment effect on the wafer surface. While removing SiO2, it also damages the wafer surface, making it rougher and increasing defects. During the formation of silicides, it easily forms sharp-shaped defects. In addition, the plasma within the reaction chamber can also damage the devices on the wafer.

[0036] The wafer support structure 3 of this embodiment includes a base 31, a top plate 32, and a push pin 33. The upper surface of the base 31 is provided with an air channel groove 312, and the top plate 32 is provided with a through-hole 322. The air outlet 322 communicates with the air channel groove 312. The wafer 4 placed on the top plate 32 can transfer heat through the air outlet 322 and the air channel groove 312, for example, by venting air through the air channel groove 312 and the air outlet 322 to maintain a certain temperature on the wafer 4. This embodiment does not impose any special limitations on the material and size of the base 31 and the top plate 32. The push pin 33 of this embodiment is used to move axially to move the wafer 4 closer to or away from the heating structure 2. Both the wafer support structure 3 and the heating structure 2 of this embodiment are disposed within the reaction chamber 1, and the reaction chamber 1 is also provided with a driving structure for the push pin 33.

[0037] In this embodiment, the base 31 has multiple first openings 311 near its edge, and the top plate 32 has multiple second openings 321 near its edge. The first openings 311 and second openings 321 are coaxially arranged, and the ejector pin 33 passes through the first openings 311 and second openings 321 when it moves up and down. In this embodiment, the ejector pin 33 is used to move axially to bring the wafer 4 closer to or away from the heating structure 2. In order to ensure that the wafer 4 rises stably during the process of the ejector pin 33 lifting the wafer, the number of ejector pins 33 is generally greater than or equal to three. The number of first openings 311 and second openings 321 is the same as the number of ejector pins 33. In this embodiment, there is no special limitation on the size of the first openings 311 and second openings 321. For example, the first openings 311 and second openings 321 can both be circular holes, the cross-section of the ejector pin 33 can be circular, and the diameter of the first openings 311 and second openings 321 can be larger than the diameter of the ejector pin 33.

[0038] In this embodiment, a first heating element 5 is provided on the upper side of the base 31 corresponding to the first opening 311. The first heating element 5 is located inside the second opening 321, and the top surface of the first heating element 5 is not higher than the upper surface of the top plate 32. In this embodiment, a gas channel groove 312 is provided on the upper surface of the base 31 in the reaction chamber, and a gas outlet 322 is provided on the top plate 32, which is connected to the gas channel groove 312. The wafer 4 placed on the top plate 32 can transfer heat through the gas outlet 322 and the gas channel groove 312. For example, by venting air into the gas channel groove 312 and the gas outlet 322, a certain temperature can be maintained on the wafer 4. Since there is no vent 322 at the second opening 321 on the top plate 32, the heat transfer in the area corresponding to the second opening 321 on the top plate 32 is uneven compared to the central area of ​​the top plate. In this embodiment, by setting a first heating element 5, the area corresponding to the second opening 321 on the top plate 32 can be heated during the etching process, ensuring the temperature uniformity of the entire top plate 32, that is, ensuring the temperature uniformity of the wafer 4, thereby ensuring the uniformity of the etching thickness of the wafer 4. The first heating element 5 in this embodiment is used to heat the area corresponding to the second opening 321 on the top plate 32. This embodiment does not impose any particular limitation on the form of the first heating element 5. For example, the first heating element 5 in this embodiment is a positive temperature coefficient heating element.

[0039] The wafer carrier structure provided in this embodiment includes a base, a top disk, and ejector pins. The top disk is stacked on the base. The base has multiple first openings near its edge, and the top disk has multiple second openings near its edge. The first and second openings are coaxially arranged. The ejector pins can move along the axial direction of the first and second openings to raise or lower the wafer, thereby moving the wafer closer to or away from the heating structure. A first heating element is provided on the base and is located inside the second opening. The top surface of the first heating element is not higher than the upper surface of the top disk. By providing a first heating element on the upper side of the base corresponding to the first opening, when applied to the siconi etching process, the wafer is located on the top disk, and the first heating element can provide temperature compensation near the area of ​​the second opening on the top disk, thereby improving the etching reaction rate near the area of ​​the second opening on the wafer, balancing the etching thickness difference between the wafer center and the area of ​​the second opening on the top disk, and improving the uniformity of the siconi etching process.

[0040] In one specific embodiment, please refer to Figure 4 and Figure 5 The first heating element 5 is annular, and its top is flush with the top of the top platen 32. In this embodiment, the first heating element 5 is annular, and the ejector pin 33 passes through the hollow portion of the annular first heating element 5 during its up-and-down movement. This embodiment sets the first heating element 5 as annular, which makes the heating of the wafer 4 at the area corresponding to the second opening 321 of the top platen 32 more uniform during the etching process, thereby making the overall etching effect of the wafer 4 more uniform.

[0041] Furthermore, a second heating element (not shown in the figure) is provided at the edge of the top disk 32; the second heating element is integrated into the top disk 32, or the second heating element is provided on the outer side of the edge of the top disk 32. Exemplarily, in this embodiment, the second heating element is annular, and the second heating element is sleeved on the outer side of the edge of the top disk 32. In this embodiment, the edge of the top disk 32 contacts the wafer 4 during etching. Since there is no vent 322 at the edge of the top disk 32, the temperature at the edge of the top disk 32 will be lower than the temperature at the center of the top disk 32 during etching. In this embodiment, by providing a second heating element at the edge of the top disk 32, the second heating element heats the wafer 4 corresponding to the edge area of ​​the top disk 32 during etching, making the entire wafer 4 heated more uniformly, thereby making the overall etching effect of the wafer 4 more uniform.

[0042] Exemplarily, both the first heating element 5 and the second heating element are PTC thermistors. In this embodiment, the first heating element 5 and the second heating element are PTC thermistors, which are typical temperature-sensitive semiconductor resistors. Above a certain temperature, their resistance increases stepwise with increasing temperature, thus achieving automatic temperature control. For example, during the etching process of wafer 4, setting the first heating element 5 and the second heating element to 35°C ensures that the temperature of the area of ​​the second opening 321 of the top disk 32, the edge area of ​​the top disk 32, and the center area of ​​the top disk 32 remains uniform. In this embodiment, the PTC thermistor automatically reduces power after reaching the set temperature, reducing energy consumption and exhibiting high energy efficiency.

[0043] Preferably, in this embodiment, both the first heating element 5 and the second heating element are ceramic heating elements. Ceramic heating elements have a long service life, good chemical corrosion resistance and heat resistance, and ceramic materials have good chemical stability and are not prone to aging.

[0044] In one specific embodiment, the thickness of the top plate 32 near the second opening 321 is greater than the thickness of the top plate 32 near its center, and the thickness of the edge of the top plate 32 is equal to the thickness of the top plate 32 near the second opening 321. In this embodiment, when the etching apparatus is etching the wafer 4, the wafer 4 is located on the top plate 32. To ensure smooth airflow from the vent holes 322 on the top plate 32, there is a certain distance between the wafer 4 and the vent holes 322 on the top plate 32. In this embodiment, the thickness of the top plate 32 near the second opening 321 is greater than the thickness of the top plate 32 near its center. During the etching process of the wafer 4, the area of ​​the top plate 32 near the second opening 321 supports the wafer 4, ensuring normal heat transfer through the vent holes 322. In this embodiment, the thickness of the edge of the top disk 32 is equal to the thickness of the top disk 32 near the second opening 321. During the etching process of the wafer 4, the area of ​​the top disk 32 near the second opening 321 and the edge of the top disk 32 simultaneously support the wafer 4, which can improve the stability of the wafer 4 during the etching process.

[0045] Please refer to Figure 5. In this embodiment, the temperature of the first heating element 5 is adjustable, and the adjustable temperature range of the first heating element 5 is 0-300 degrees Celsius. For example, during the etching stage of the siconi etching process, setting the temperature of the first heating element between 25-60°C ensures low-temperature etching of the wafer 4 on the top disk 32. During the sublimation stage of the siconi etching process, setting the temperature of the first heating element 5 between 180-210°C prevents byproducts from accumulating on the top disk 32 and the base 31 during the sublimation of hexafluorosilane. During the cleaning process of the reaction chamber 1, the base 31 and the top disk 32 are raised to the vicinity of the heating structure 2, and the temperature of the first heating element 5 is set between 150-300°C. Simultaneous heating of the heating structure 2 and the first heating element 5 effectively removes the byproducts accumulated on the top disk 32 and the base 31.

[0046] The wafer carrier structure provided in this embodiment includes a base, a top disk, and ejector pins. The top disk is stacked on the base. The base has multiple first openings near its edge, and the top disk has multiple second openings near its edge. The first and second openings are coaxially arranged. The ejector pins can move along the axial direction of the first and second openings to raise or lower the wafer located on the top disk. A first heating element is provided on the base and is located inside the second opening. The top surface of the first heating element is not higher than the upper surface of the top disk. By providing a first heating element on the upper side of the base corresponding to the first opening, when applied to the siconi etching process, the wafer is located on the top disk, and the first heating element can provide temperature compensation near the area of ​​the second opening on the top disk, thereby improving the etching reaction rate near the area of ​​the second opening on the wafer, balancing the etching thickness difference between the wafer center and the area of ​​the second opening on the top disk, and improving the uniformity of the siconi etching process.

[0047] Please see Figure 3 The second aspect of this embodiment provides an etching apparatus for the siconi etching process, including a reaction chamber 1, a heating structure 2, and a wafer support structure 3 as described in the above embodiment, wherein the wafer support structure 3 and the heating structure 2 are located within the reaction chamber 1.

[0048] The etching apparatus for the siconi etching process provided in this embodiment includes a reaction chamber, a heating structure, and a wafer support structure as described above. The wafer support structure and the heating structure are located within the reaction chamber. The wafer support structure includes a base, a top disk, and ejector pins. The top disk is stacked on the base. The base has multiple first openings near its edge, and the top disk has multiple second openings near its edge. The first and second openings are coaxially arranged. The ejector pins can move along the axial direction of the first and second openings to raise or lower the wafer, thereby bringing the wafer closer to the center of the wafer. Alternatively, away from the heating structure, a first heating element is provided on the base. The first heating element is located inside the second opening, and the top surface of the first heating element is not higher than the upper surface of the top plate. By providing the first heating element on the upper side of the base corresponding to the first opening, the etching apparatus can perform temperature compensation near the area of ​​the second opening on the top plate during the wafer etching process. This improves the etching reaction rate near the area of ​​the second opening on the wafer, balances the etching thickness difference between the wafer center area and the area of ​​the second opening on the top plate, and improves the uniformity of the siconi etching process.

[0049] In the above description, the terms "an embodiment," "some embodiments," "example," "specific example," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this utility model. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0050] The above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A wafer carrying structure, comprising: a base, a top plate, and a plurality of pins, the top plate being stacked on the base, the base having a plurality of first openings arranged near the edge of the base, the top plate having a plurality of second openings arranged near the edge of the top plate, the first openings and the second openings being coaxially arranged, the pins being movable along the axis of the first openings and the second openings to lift or lower a wafer on the top plate. The base has a first heating element arranged on the base, the first heating element being arranged in the second opening, the top surface of the first heating element being not higher than the upper surface of the top plate. The first heating element has a cross section in the shape of a ring, the top of the first heating element being flush with the top of the top plate.

2. The wafer support structure of claim 1, wherein: 3.The wafer carrying structure of claim 2, wherein: the top plate has a second heating element arranged near the edge of the top plate, the second heating element being integrated in the top plate or arranged outside the edge of the top plate. 4.The wafer carrying structure of claim 3, wherein: the first heating element and the second heating element are both positive temperature coefficient thermistors. 5.The wafer carrying structure of claim 4, wherein: the first heating element and the second heating element are both ceramic heating elements. 6.The wafer carrying structure of claim 1, wherein: the thickness of the top plate near the second opening is greater than the thickness of the top plate near the center of the top plate, the thickness of the edge of the top plate being equal to the thickness of the top plate near the second opening. The upper surface of the base has an air channel groove, the top plate has an air outlet hole penetrating the top plate, the air outlet hole being in communication with the air channel groove. The number of the pins is at least three, the adjacent pins being uniformly distributed. The temperature of the first heating element and the second heating element is adjustable, the temperature of the first heating element and the second heating element being adjustable in the range of 0-300℃. The wafer carrying structure of any one of claims 1-9 and a heating structure are arranged in a reaction chamber. ​ 7. The wafer support structure of claim 1, wherein: ​ 8. The wafer support structure of claim 1, wherein: ​ 9. The wafer support structure of any of claims 3-5, wherein: ​ 10. An etching apparatus for siconi etching process, characterized by: ​

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