Measuring circuit of device

Abstract

The utility model relates to the technical field of power electronics, and discloses a measuring circuit of a device. According to the circuit, the drive circuit is arranged in the clamping unit, the drive circuit is used for outputting the pulse signal of the corresponding voltage to improve the potential of the second end of the clamping circuit, the measurement range of the conduction voltage drop of the device is expanded, the voltage drop after the clamping circuit is conducted is very small and is basically unchanged, and the measurement accuracy is improved. The problems that when an existing clamping circuit is in a conducting state, voltage drop is unstable, and the measurable voltage range is small are solved.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and more particularly to a measurement circuit for a device. Background Technology

[0002] With the continuous development of power electronics technology, power switching devices have been widely used, especially in power circuits. However, power switching devices also suffer from parameter degradation during high-frequency switching control.

[0003] Based on this, a measurement circuit was set up to monitor and measure the power switching device. Currently, this is mainly achieved through a clamping circuit. However, traditional clamping circuits are designed using devices such as diodes. Although clamping measurement can be achieved, the voltage drop of the diodes and other devices varies greatly, resulting in an unstable on-state voltage drop of the clamped power switching device, which leads to low measurement accuracy. At the same time, the clamping voltage range of diodes and other devices is small, which cannot adapt to the measurement of devices with large on-state voltage drops. Utility Model Content

[0004] In view of this, this application proposes a measurement circuit for a device to solve the problems of unstable voltage drop and small clamping voltage range in existing clamping circuits after conduction. A first aspect of this application provides a measurement circuit for a device, comprising: a first detection terminal, a second detection terminal, and a clamping unit; the clamping unit includes a clamping circuit and a driving circuit, a first terminal of the clamping circuit is connected to the first detection terminal, a second terminal of the driving circuit is connected to one end of the driving circuit; the other end of the driving circuit is connected to the second detection terminal and a third terminal of the clamping circuit, and the driving unit is used to provide a pulse signal corresponding to the voltage to the second terminal of the clamping circuit; the first detection terminal and the second detection terminal are used to connect to the device under test.

[0005] In one feasible implementation, the clamping circuit includes a depletion-type N-channel MOSFET and a Zener diode circuit; the drain of the depletion-type N-channel MOSFET is connected to the first detection connection terminal, the source of the depletion-type N-channel MOSFET is connected to one end of the Zener diode circuit, and the gate of the depletion-type N-channel MOSFET is connected to one end of the driving circuit; the other end of the driving circuit and the other end of the Zener diode circuit are both connected to the second detection connection terminal.

[0006] In one feasible implementation, the Zener diode circuit includes a first diode and a second diode, the anode of the first diode is connected to the source of the depletion-type N-channel MOSFET, the cathode of the first diode is connected to the cathode of the second diode, and the anode of the second diode is connected to the second detection terminal.

[0007] In one feasible implementation, the driving circuit is a voltage source, the positive terminal of which is connected to the gate of the depletion-type N-channel MOS transistor, and the negative terminal of which is connected to the second detection terminal.

[0008] In one feasible implementation, the driving circuit is a pulse generation circuit, which is connected to the second detection terminal and shares a common ground; the pulse output terminal of the pulse generation circuit is connected to the gate of the depletion-type N-channel MOS transistor, and is used to output a high-level pulse when the device under test is turned on, and to output a low-level pulse when the device under test is turned off.

[0009] In one feasible implementation, the measurement circuit of the device further includes a voltage detection unit connected in parallel between the first and second terminals of the clamping circuit, for acquiring the on-state voltage drop between the first and second detection terminals.

[0010] In one feasible implementation, the measurement circuit of the device further includes a current detection unit connected to the second detection terminal for collecting the current flowing through the second detection terminal.

[0011] In one feasible implementation, the measurement circuit of the device further includes a controller, the control terminal of which is connected to the control terminal of the device under test to control the device under test.

[0012] In one feasible implementation, the measurement circuit of the device further includes a power supply unit, the positive terminal of which is connected to the first detection terminal and the negative terminal of which is connected to the second detection terminal.

[0013] In one feasible implementation, the measurement circuit of the device further includes: a first switching device and a load inductor, one end of the first switching device being connected to the positive terminal of the power supply unit and one end of the load inductor, and the other end of the first switching device being connected to the first detection terminal and the other end of the load inductor.

[0014] The technical solution provided in this application includes a circuit comprising a first detection terminal, a second detection terminal, and a clamping unit. The clamping unit includes a clamping circuit and a driving circuit. A first terminal of the clamping circuit is connected to the first detection terminal, and a second terminal of the clamping circuit is connected to one end of the driving circuit. The other end of the driving circuit is connected to the second detection terminal and a third terminal of the clamping circuit, and is used to provide a pulse signal corresponding to the voltage to the second terminal of the clamping circuit. The first detection terminal and the second detection terminal are used to connect to the device under test. This application, by setting a driving circuit in the clamping unit and using the driving circuit to output a pulse signal corresponding to the voltage to increase the potential of the second terminal of the clamping circuit, expands the measurement range of the on-state voltage drop of the device, and the voltage drop after the clamping circuit is turned on is very small and basically unchanged, thus solving the problems of unstable voltage drop and small measurable voltage range in existing clamping circuits when in the on-state. Attached Figure Description

[0015] Figure 1 A first schematic diagram of the measurement circuit of the device provided in the embodiments of this application;

[0016] Figure 2 A second schematic diagram of the measurement circuit of the device provided in the embodiments of this application;

[0017] Figure 3 A third schematic diagram of the measurement circuit of the device provided in the embodiments of this application;

[0018] Figure 4 A circuit schematic diagram of the measurement circuit of the device provided in the embodiments of this application;

[0019] Figure 5 Another circuit schematic diagram of the measurement circuit of the device provided in the embodiments of this application. Detailed Implementation

[0020] This application provides a measurement circuit for a device, which mainly uses a depletion-type N-channel MOSFET as a clamping circuit. At the same time, a driving circuit, such as a voltage source and a pulse generation unit, is added to the gate of the depletion-type N-channel MOSFET. After the circuit is turned on, the on-state voltage drop of the clamping circuit is almost zero, and the driving circuit increases the gate potential, thereby increasing the range of the on-state voltage drop of the device under test. This solves the problem of unstable voltage drop after the clamping circuit is turned on, and also expands the measurement range of the on-state voltage drop, thus broadening the application range of the clamping circuit.

[0021] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0022] like Figure 1 As shown in the embodiment of this application, a measurement circuit for a device is provided. The circuit includes: a first detection terminal 110, a second detection terminal 120, and a clamping unit 130.

[0023] The clamping unit 130 includes a clamping circuit 131 and a driving circuit 132. The clamping circuit 131 also has three pins, namely a first terminal, a second terminal, and a third terminal. The first terminal of the clamping circuit 131 is connected to the first detection terminal 110, and the second terminal of the clamping circuit 131 is connected to one end of the driving circuit 132. The other end of the driving circuit 132 is connected to the second detection terminal 120 and the third terminal of the clamping circuit 131, and is used to provide a pulse signal corresponding to the voltage to the clamping circuit 131. The first detection terminal 110 and the second detection terminal 120 are used to connect to the device under test.

[0024] That is to say, the first end of the clamping circuit 131 is connected to the first detection end 110, and the second detection end 120 is connected to the second end of the clamping circuit 131 through the driving circuit 132.

[0025] In this embodiment, the measurement circuit further includes a first switching device 140 and a load inductor 150. One end of the first switching device 140 is connected to one end of the load inductor 150, and the other end of the first switching device 140 is connected to the first detection terminal 110 and the other end of the load inductor 150, as shown below. Figure 2 As shown.

[0026] It should be noted that the first switching device 140 is actually used to control the access of external input power. Therefore, one end of the first switching device 140 is used to connect to the positive terminal of the power supply, and the other end is connected to the clamping unit 130 and the first detection terminal 110.

[0027] Understandably, the first switching device 140 is a power switching transistor, in which the drain is connected to the positive terminal of the power supply, the source is connected to the first detection terminal 110 and the clamping unit 130, and the gate is connected to the subsequent controller.

[0028] In another feasible embodiment, the measurement circuit of the device further includes a power supply unit 160, the positive terminal of which is connected to one end of the first switching device 140, and the negative terminal of which is connected to the second detection terminal 120. One end of the first switching device 140 is connected to the positive terminal of the power supply unit 160 and one end of the load inductor 150, such as... Figure 3 As shown. Specifically, the power supply unit 160 includes: a DC voltage source and a voltage storage capacitor; the DC voltage source and the voltage storage capacitor are connected in parallel, and the DC voltage source is connected in parallel between the first switching device 140 and the second detection terminal 120. Of course, in addition to the above-described structural type, the power supply unit 160 can also be an energy storage power supply, a switching power supply, or even a power converter, etc.

[0029] It should be noted that the first switching device 140 is provided with a first pin, a second pin and a third pin. These three pins are used to connect the power supply unit 160, the clamping circuit 131 and the device under test. The connection with the device under test is achieved through the first detection terminal 110.

[0030] In this embodiment, the drain of the first switching device 140 is connected to the positive terminal of the power supply unit 160, and the source of the first switching device 140 is connected to the first detection terminal 110 and the first terminal of the clamping circuit 131; the second detection terminal 120 is connected to the negative terminal of the power supply unit 110 and one end of the driving circuit 132; the other end of the driving circuit 132 is connected to the second terminal of the clamping circuit 131.

[0031] It should be noted that the first switching device 140 can be implemented using a gallium nitride power switching device, or it can be implemented using a common switching transistor, or even a voltage divider circuit with resistors. A device under test (DUT) is placed between the first detection terminal 110 and the second detection terminal 120. Specifically, the drain of the DUT is connected to the first detection terminal 110, and the source of the DUT is connected to the second detection terminal 120. The conduction control of the DUT is the same as that of the first switching device 140, both being controlled by connecting to a controller to receive a corresponding pulse signal to control conduction and shutdown. When conduction occurs, both the DUT and the first switching device 140 conduct simultaneously for subsequent measurement operations.

[0032] During measurement, the drain potential of the device under test (DUT) changes with the output voltage of the power supply unit 160. For example, when the DUT is turned on, its drain potential is pulled low, causing the body diode in the clamping circuit 131 to conduct. As the drain potential continues to drop, the clamping circuit 131 conducts when it reaches a certain value. Once the clamping circuit 131 is on, the voltage between the drain and source of the DUT can be measured, thus allowing the measurement of the DUT's performance parameters. When the DUT is turned off, the principle is the opposite of when it is turned on.

[0033] In this embodiment, the clamping circuit 131 includes a depletion-type N-channel MOSFET 1311 and a Zener diode circuit 1312. The drain of the depletion-type N-channel MOSFET 1311 is connected to the first detection terminal 110, the source of the depletion-type N-channel MOSFET 1311 is connected to one end of the Zener diode circuit 1312, and the gate of the depletion-type N-channel MOSFET 1311 is connected to one end of the driving circuit 132. The other ends of the driving circuit 132 and the Zener diode circuit 1312 are both connected to the second detection terminal 120. Figure 4 As shown.

[0034] Understandably, the depletion-type N-channel MOSFET 1311 can be replaced by a combination circuit of a MOSFET, a capacitor, and a diode. In this case, the anode of the diode is connected to the source of the MOSFET, the cathode of the diode is connected to the drain of the MOSFET, and the capacitor is connected in parallel with the diode.

[0035] In practical applications, when analyzing the parameters of the device under test (DUT), the DUT is turned on by controlling its conduction and then gradually lowering the potential of the drain of the DUT to turn on the depletion-type N-channel MOSFET 1311, thereby measuring the on-state voltage drop of the DUT and analyzing its dynamic resistance.

[0036] Furthermore, the Zener diode circuit 1312 is actually a circuit with two diodes connected in reverse series, namely, it includes a first diode and a second diode. The anode of the first diode is connected to the source of the depletion-type N-channel MOSFET 1311, the cathode of the first diode is connected to the cathode of the second diode, and the anode of the second diode is connected to the second detection terminal 120. After both the device under test (DUT) and the depletion-type N-channel MOSFET 1311 are turned on, the voltage measured between the first and second diodes is the forward voltage drop of the DUT. The first diode is a Zener diode, and the second diode can be either a Zener diode or a regular diode.

[0037] In another embodiment, the driving circuit 132 is a voltage source, the positive terminal of which is connected to the gate of the depletion-type N-channel MOS transistor 1311, and the negative terminal of which is connected to the second detection terminal 120. Figure 4 As shown, the voltage source is the power supply Vcc in the figure.

[0038] Based on Figure 4 the circuit structure, when measuring the dynamic resistance of the device under test, when the device under test (DUT) is turned on, the voltage at point A is pulled down. At this time, the parasitic diode on the MOS transistor is turned on, resulting in a decrease in the voltage at point B. Since Vgs = Vcc - Vclamp, as Vclamp decreases, Vgs is continuously rising. When Vgs rises to Vgs(th), the MOS transistor is turned on. At this time, the voltage at B is the same as the voltage at A, and the voltage measured by Vclamp is the on-state voltage drop of the DUT. Therefore, it is necessary to ensure that when the on-state voltage drop reaches the maximum value Vdsonmax, the MOS transistor can still be turned on.

[0039] That is: Vcc - Vclamp > Vgs(th), so Vcc > Vclamp + Vgs(th) = Vdsonmax + Vgs(th).

[0040] When the device under test (DUT) is turned off, the voltage at point A rises rapidly. Since the MOS transistor was in the on state before, the voltage at point B rises together with point A. When the voltage at point B rises to the regulated voltage value of the zener diode, it no longer rises. At this time, Vgs = Vcc - Vz - Vd. If it is necessary to ensure that the clamping circuit remains at a high level when the DUT is turned off, then Q3 should be kept in the off state, that is, Vcc - Vz - Vd < Vgs(th), so Vcc < Vz + Vd + Vgs(th). That is, the value range of Vcc is [Vdsonmax + Vgs(th), Vz + Vd + Vgs(th)].

[0041] In this embodiment, the driving point 132 can also be implemented by a pulse generation circuit 1321. It should be noted that the connection between the pulse generation circuit 1321, the second detection end 120, and the power supply unit 160 must be a common ground connection, as Figure 2 shown. The pulse output end of the pulse generation circuit 1321 is connected to the second end of the clamping circuit 131, and is used to output a high-level pulse when the first switching device 140 is turned on, and output a low-level pulse when the first switching device 140 is turned off.

[0042] It should be noted that when implemented by the pulse generation circuit 1321, the PWM signal output by it should be synchronized with the driving signal of the DUT. When the DUT is turned off, the output PWM signal is also at a low level to turn off the MOS transistor. When the DUT is turned on, the output PWM signal is at a high level, and the value range of this high level is the same as the value range of the above voltage source Vcc to increase the potential of the MOS transistor gate, so as to meet a higher level of on-state voltage drop measurement.

[0043] In another embodiment, such as Figure 3 As shown, the measurement circuit of the device further includes a voltage detection unit 170 connected in parallel between the first and second terminals of the clamping circuit 131, used to acquire the on-state voltage drop between the first detection terminal 110 and the second detection terminal 120. It can be understood that this on-state voltage drop is the potential difference between the first detection terminal 110 and the second detection terminal 120, or the potential value at point A.

[0044] Furthermore, the measurement circuit of the device also includes a current detection unit 180, which is connected to the second detection terminal 120 and is used to collect the current flowing through the second detection terminal 120 after the device under test is turned on. It is understood that the second detection terminal 120 is multiplexed with the source of the device under test.

[0045] In practical applications, the device under test can operate in either the first quadrant or the third quadrant, such as... Figure 5 As shown, when operating in the third quadrant, during measurement, when the pulse signal on the gate of the device under test (DUT) puts the DUT into the on state in the third quadrant, the voltage at point A begins to decrease. When it drops below the voltage at point B, the parasitic diode of Q3 conducts, and the voltage at point B begins to decrease. Since it is in the on state in the third quadrant at this time, the voltage at point A is negative, and the voltage at point B is also negative. Therefore, Vgs = Vcc - Vclamp > 0, which will definitely turn on Q3. The clamping voltage measured at this time is the on-state voltage drop of the DUT. When the DUT is in the off state in the third quadrant, the voltage at point A will be affected by the input voltage. This is the same as the off state in the first quadrant, which is the off control described above, and will not be elaborated further.

[0046] By implementing the measurement circuit of the device provided above, since a driving circuit is set in the clamping unit, the output pulse signal of the driving circuit makes the gate voltage of the NMOS transistor in the clamping unit not equal to the ground voltage, thereby expanding the measurement range of the on-state voltage drop. At the same time, by using an NMOS transistor as a clamping circuit, the characteristic that the on-state voltage drop of the NMOS transistor is small and negligible when it is turned on is utilized to clamp the voltage of the device under test at the desired potential after it is turned on, without generating additional unstable voltage drop, thereby improving the measurement accuracy.

[0047] Finally, it should be noted that the above embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A measuring circuit of a device, characterized by, The device measurement circuit comprises: a first detection end, a second detection end and a clamping unit; the clamping unit comprises a clamping circuit and a driving circuit, a first end of the clamping circuit is connected with the first detection end, a second end of the clamping circuit is connected with one end of the driving circuit; the other end of the driving circuit is connected with the second detection end and a third end of the clamping circuit, and the driving circuit is used for providing a pulse signal corresponding to a voltage to the second end of the clamping circuit; the first detection end and the second detection end are used for connecting a device to be measured.

2. The measurement circuit of a device according to claim 1, characterized in that, the clamping circuit comprises a depletion-mode N-channel MOS tube and a voltage stabilizing tube circuit; a drain of the depletion-mode N-channel MOS tube is connected with the first detection end, a source of the depletion-mode N-channel MOS tube is connected with one end of the voltage stabilizing tube circuit, and a gate of the depletion-mode N-channel MOS tube is connected with one end of the driving circuit; the other end of the driving circuit and the other end of the voltage stabilizing tube circuit are both connected with the second detection end.

3. The measurement circuit of a device according to claim 2, characterized in that, the voltage stabilizing tube circuit comprises a first diode and a second diode, an anode of the first diode is connected with the source of the depletion-mode N-channel MOS tube, a cathode of the first diode is connected with a cathode of the second diode, and an anode of the second diode is connected with the second detection end.

4. The measurement circuit of a device according to claim 2, characterized in that, the driving circuit is a voltage source, a positive electrode of the voltage source is connected with the gate of the depletion-mode N-channel MOS tube, and a negative electrode of the voltage source is connected with the second detection end.

5. The measurement circuit of a device according to claim 2, characterized in that, the driving circuit is a pulse generation circuit, the pulse generation circuit is connected with the second detection end and shares a ground; a pulse output end of the pulse generation circuit is connected with the gate of the depletion-mode N-channel MOS tube, used for outputting a high-level pulse when the device to be measured is turned on, and outputting a low-level pulse when the device to be measured is turned off.

6. The measurement circuit of a device according to claim 1, characterized in that, the device measurement circuit further comprises a voltage detection unit connected in parallel between the first end and the second end of the clamping circuit, used for collecting a turn-on voltage drop between the first detection end and the second detection end.

7. The measurement circuit of a device according to claim 6, characterized in that, the device measurement circuit further comprises a current detection unit connected with the second detection end, used for collecting a current flowing through the second detection end.

8. The measurement circuit of a device according to any one of claims 1-7, characterized in that, the device measurement circuit further comprises a controller, a control end of the controller is connected with a control end of the device to be measured, so as to control the device to be measured.

9. The measurement circuit of a device according to any one of claims 1-7, characterized in that, the device measurement circuit further comprises a power supply unit, a positive electrode of the power supply unit is connected with the first detection end, and a negative electrode of the power supply unit is connected with the second detection end.

10. The measurement circuit of a device according to claim 9, characterized in that, the device measurement circuit further comprises a first switching device and a load inductor, one end of the first switching device is connected with the positive electrode of the power supply unit and one end of the load inductor, and the other end of the first switching device is connected with the first detection end and the other end of the load inductor.

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