Driving circuit and intelligent terminal

Abstract

The utility model provides a driving circuit and an intelligent terminal, the driving circuit comprises a direct current boost unit and an inversion boost unit, and a first end of the direct current boost unit is connected with a voltage input end; the second end of the direct current boosting unit is connected with the first end of the inversion boosting unit; the second end of the inversion boost unit is connected with the voltage input end; the third end of the inversion boost unit is connected with the electrochromic dimming module; the direct current boosting unit boosts an input voltage into an output voltage, then the output voltage and the input voltage are input to the inversion boosting unit, and the inversion boosting unit converts a boosted direct current into an alternating current so as to obtain a sine wave signal of the boosted alternating current; the voltage and the frequency of the sine wave signal are the voltage and the frequency input to the electro-dimming module. The driving circuit provided by the technical scheme of the utility model is small in size, increases application scenes, and can be carried in an intelligent terminal.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, specifically to a driving circuit and a smart terminal. Background Technology

[0002] Polymer dispersed liquid crystal (PDLC), also known as electroluminescent module, has applications in various fields such as construction, automotive, and aerospace. PDLC requires specific voltage and frequency to operate in these applications.

[0003] In conceiving and implementing this application, the inventors discovered at least the following problems: In some implementations, to drive a PDLC, DC power can be input through a power supply interface and fed into an inverter. The inverter converts the DC power into AC power to output the voltage required by the PDLC. The frequency of the PDLC is consistent with the DC power, thus ultimately driving the PDLC. However, in the above-mentioned circuits for driving PDLCs, the inverter is bulky and / or the circuitry is complex.

[0004] The preceding description is intended to provide general background information and does not necessarily constitute prior art. Utility Model Content

[0005] To address the aforementioned technical problems, this application provides a driving circuit and a smart terminal, which can solve the technical problems of large device size, complex circuit, and / or high cost in the existing PDLC driving circuit.

[0006] In a first aspect, this application provides a driving circuit, including: a DC boost unit and an inverter boost unit;

[0007] The first terminal of the DC boost unit is connected to the voltage input terminal;

[0008] The second terminal of the DC boost unit is connected to the first terminal of the inverter boost unit;

[0009] The second terminal of the inverter boost unit is connected to the voltage input terminal;

[0010] The third terminal of the inverter boost unit is connected to the electroluminescent module;

[0011] The DC boost unit is used to boost the input voltage to the output voltage;

[0012] The inverter boost unit is used to boost the output voltage and input voltage from DC to AC to obtain a sine wave signal.

[0013] Optionally, the voltage and frequency of the sinusoidal signal are the voltage and frequency input to the electroluminescent module.

[0014] Optionally, the current of the sinusoidal signal is alternating current.

[0015] Optionally, the voltage of the sinusoidal signal is greater than the output voltage.

[0016] Optionally, the frequency of the sinusoidal signal is modulated by the inverter boost unit.

[0017] Optionally, the output voltage is greater than or equal to half the voltage of the sine wave signal.

[0018] Optionally, the inverter boost unit includes a sinusoidal pulse width modulation unit, a DC amplitude amplification unit, and a filter.

[0019] Optionally, the second terminal of the DC boost unit is connected to the first terminal of the DC amplitude amplification unit.

[0020] Optionally, the first terminal of the sinusoidal pulse width modulation unit is connected to the voltage input terminal.

[0021] Optionally, the second terminal of the sinusoidal pulse width modulation unit is connected to the second terminal of the DC amplitude amplification unit.

[0022] Optionally, the third terminal of the DC amplitude amplification unit is connected to the first terminal of the filter.

[0023] Optionally, the second end of the filter is connected to the electro-dimming module.

[0024] Optionally, the sinusoidal pulse width modulation unit is used to modulate the input voltage into a first sinusoidal pulse width signal.

[0025] Optionally, the DC amplitude amplification unit is used to amplify the amplitude of the first sinusoidal pulse width signal into a second sinusoidal pulse width signal.

[0026] Optionally, the filter is used to filter the second sinusoidal pulse width signal to obtain a sinusoidal signal.

[0027] Optionally, the filter is used to filter the second sinusoidal pulse width signal to obtain a sinusoidal signal.

[0028] Optionally, the frequency of the sinusoidal signal is equal to the frequency of the second sinusoidal pulse width signal.

[0029] Optionally, the frequency of the first sinusoidal pulse width signal is equal to the frequency of the modulating wave included therein.

[0030] Optionally, the voltage of the second sinusoidal pulse width signal is equal to the output voltage.

[0031] Optionally, the frequency of the second sinusoidal pulse width signal is equal to the frequency of the first sinusoidal pulse width signal.

[0032] Optionally, the frequency of the sinusoidal signal is equal to the frequency of the second sinusoidal pulse width signal.

[0033] Optionally, different duty cycles in the sinusoidal pulse width modulation unit correspond to different sinusoidal signals to obtain different voltages.

[0034] Optionally, the third terminal of the DC boost unit, the third terminal of the sinusoidal pulse width modulation unit, the fourth terminal of the DC amplitude amplification unit, and the third terminal of the filter are all grounded.

[0035] Optionally, the DC amplitude amplification unit includes a P-channel transistor.

[0036] Optionally, the P-channel transistor is connected to the first terminal of the filter.

[0037] Optionally, the P-channel transistor is used to amplify the first sinusoidal pulse width signal according to the amplitude of the output voltage to obtain a second sinusoidal pulse width signal.

[0038] Optionally, the second sinusoidal pulse width signal is output from the drain of the transistor.

[0039] Optionally, before and after amplitude amplification, the differential phase difference between the second sinusoidal pulse width signal and the first sinusoidal pulse width signal remains unchanged in the DC amplitude amplification unit.

[0040] Optionally, the differential phase difference is the phase difference between the positive half-cycle signal and the negative half-cycle signal in the corresponding sinusoidal pulse width signal.

[0041] Optionally, the filter includes a positive filter and a negative filter.

[0042] Optionally, the sinusoidal signal includes a positive half-cycle signal and a negative half-cycle signal.

[0043] Optionally, the first end of the positive filter and the first end of the negative filter are connected to the third end of the DC amplitude amplification unit.

[0044] Optionally, the second end of the positive filter and the second end of the negative filter are connected to the electroluminescent module.

[0045] Optionally, the positive filter is used to filter the positive half-cycle signal in the second sinusoidal pulse width signal to obtain the filtered positive half-cycle signal.

[0046] Optionally, the negative filter is used to filter the negative half-cycle signal in the second sinusoidal pulse width signal to obtain the filtered negative half-cycle signal.

[0047] Optionally, the DC boost unit further includes a first voltage divider resistor, a second voltage divider resistor, and a voltage regulator.

[0048] Optionally, the first terminal of the first voltage divider resistor is connected to the first terminal of the DC amplitude amplification unit.

[0049] Optionally, the first terminal of the voltage regulator is connected to the voltage input terminal.

[0050] Optionally, the second terminal of the voltage regulator is connected to the second terminal of the first voltage divider resistor and the first terminal of the second voltage divider resistor.

[0051] Optionally, different ratios of voltage divider resistors in the DC boost unit correspond to different output voltages.

[0052] Optionally, different output voltages correspond to different sine wave signal voltages.

[0053] Secondly, this application provides a smart terminal, including the driving circuit described in any one of the first aspects.

[0054] As described above, this application provides a driving circuit and a smart terminal. The driving circuit includes: a DC-DC boost unit and an inverter boost unit. The first terminal of the DC-DC boost unit is connected to a voltage input terminal; the second terminal of the DC-DC boost unit is connected to the first terminal of the inverter boost unit; the second terminal of the inverter boost unit is connected to the voltage input terminal; and the third terminal of the inverter boost unit is connected to an electroluminescent dimming module. Optionally, the DC-DC boost unit can boost the input voltage to an output voltage. Therefore, the DC-DC boost unit boosts DC power. Further, the output voltage and the input voltage are input to the inverter boost unit. The inverter boost unit converts DC power to AC power to obtain a sine wave signal. Therefore, the current in the obtained sine wave signal is AC. Furthermore, due to the characteristics of the positive and negative half-cycles of the sine wave signal, the voltage of each half-cycle is superimposed, increasing the voltage of the sine wave signal. Thus, the required voltage and frequency for the electroluminescent dimming module can be obtained based on the drive circuit, and the sine wave signal can be input into the electroluminescent dimming module. The voltage and frequency of the sine wave signal can then drive the electroluminescent dimming module. The drive circuit provided in this application is small in size and has a simple connection, thus allowing for a wider range of applications. Attached Figure Description

[0055] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0056] Figure 1 This is a schematic diagram of a drive circuit provided in some implementations;

[0057] Figure 2 A schematic diagram of an electroluminescent dimming module driving system is provided for an embodiment.

[0058] Figure 3 A schematic diagram of an electroluminescent dimming module driving system is provided for an embodiment.

[0059] Figure 4 A schematic diagram of an electroluminescent dimming module driving system is provided for an embodiment.

[0060] Figure 5 A schematic diagram of a DC amplitude amplification unit structure is provided for an embodiment;

[0061] Figure 6 A schematic diagram of a filter structure is provided for an embodiment;

[0062] Figure 7 A schematic diagram of a DC boost unit structure is provided for an embodiment;

[0063] Figure 8 A schematic diagram of a sinusoidal pulse width modulation unit structure is provided for an embodiment;

[0064] Figure 9 This is a schematic diagram of the hardware structure of a mobile terminal provided for an embodiment.

[0065] Figure label:

[0066] 201-Driver circuit; 202-DC boost unit; 203-Inverter boost unit; 204-Voltage input terminal; 205-Electronic dimming module; 301-Sinusoidal pulse width modulation unit; 302-DC amplitude amplification unit; 303-Filter; 501-Negative half-cycle amplitude amplification subunit; 502-Positive half-cycle amplitude amplification subunit; 601-Negative filter; 602-Positive filter; 701-Input capacitor; 702-Inductor; 703-Diode; 704-Output capacitor; 705-First voltage divider resistor; 706-Second voltage divider resistor; 707-Regulator; 708 - Control switch; 900 - Mobile terminal; 901 - Radio frequency unit; 902 - WIFI module; 903 - Audio output unit; 904 - A / V input unit; 9041 - Graphics processor; 9042 - Microphone; 905 - Sensor; 906 - Display unit; 9061 - Display panel; 907 - User input unit; 9071 - Touch panel; 9072 - Other input devices; 908 - Interface unit; 909 - Memory; 910 - Processor; 911 - Power supply.

[0067] The realization of the objectives, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0068] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0069] Optionally, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Optionally, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which needs to be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0070] It should be understood that although the terms first, second, third, etc., may be used herein to describe various information, such information should not be limited to these terms. These terms are used only to distinguish information of the same type from one another. For example, without departing from the scope of this document, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if," as used herein, may be interpreted as "when," "when," or "in response to determination." Furthermore, as used herein, the singular forms "a," "an," and "the" are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms "comprising," "including," indicate the presence of a feature, step, operation, element, component, item, kind, and / or group, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms "or," "and / or," "including at least one of the following," etc., used in this application may be interpreted as inclusive, or mean any one or any combination thereof. For example, "including at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Similarly, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Exceptions to this definition only occur when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0071] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0072] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0073] Figure 1 This is a schematic diagram of a drive circuit provided in some implementations. For example... Figure 1 This includes method one and method two.

[0074] In Method 1, driving the PDLC involves a circuit that sequentially includes a power supply interface (through which DC power is input), an inverter, and the PDLC. The inverter includes a controller and a transformer. DC power is input through the power supply interface and then fed into the inverter, which converts it to AC power to output the voltage required by the PDLC. The PDLC's frequency matches the DC power, ultimately driving the PDLC. In Method 2, AC power from the city is input through the power supply interface to a transformer for step-down, obtaining the voltage and frequency required by the PDLC, thus driving the PDLC.

[0075] However, in the first method mentioned above, the inverter is bulky, the circuit is complex, the components are expensive, and the application scenarios are narrow.

[0076] Method 2, due to the use of urban AC power supply, has high requirements for the application scenario, and thus a narrower application range.

[0077] To address this, this application proposes a driving circuit comprising a DC-DC boost unit and an inverter boost unit. Optionally, the first terminal of the DC-DC boost unit is connected to the voltage input terminal, and the second terminal of the DC-DC boost unit is connected to the first terminal of the inverter boost unit. The second terminal of the inverter boost unit is also connected to the voltage input terminal. The third terminal of the inverter boost unit is connected to an electro-dimming module. Thus, after the DC-DC boost unit boosts the input voltage to the output voltage, the inverter boost unit further boosts the input and output voltages, converting the DC to AC and performing frequency modulation to obtain a sine wave signal. The voltage and frequency of this sine wave signal can be the voltage and frequency required by the electro-dimming module. If the required voltage and frequency are met, the electro-dimming module can be driven. Optionally, the DC-DC boost unit and inverter boost unit in this application are small devices, thus the driving circuit in this application, due to its small size, can be used in various scenarios. Existing inverters are bulky and cannot be used in smart terminals. Alternatively, the complexity of the circuitry also results in a large overall circuit size, making it unsuitable for use in smart terminals. Therefore, this solution addresses the issues of large device size and limited application scenarios in existing technologies.

[0078] Optionally, the driving circuit in this application can be an integrated circuit. The circuit connection between the DC boost unit and the inverter boost unit in this application can be simpler than the connection in the prior art. Optionally, the DC boost unit and the inverter boost unit in this application can be small in size. Optionally, the transparency of the PDLC is closely related to its voltage; when the voltage reaches the voltage required by the PDLC, the better the transparency of the PDLC, and thus the greater the effect of the PDLC.

[0079] First Embodiment

[0080] This embodiment provides a driving circuit, which is mounted in a smart terminal.

[0081] Figure 2 This is a schematic diagram of an electroluminescent dimming module driving system provided for an embodiment. Figure 2 As shown, the electro-dimming module driving system includes a driving circuit 201 and an electro-dimming module 205. Optionally, the driving circuit 201 includes a DC boost unit 202, an inverter boost unit 203, and a voltage input terminal 204.

[0082] Optionally, the first terminal of the DC boost unit 202 is connected to the voltage input terminal 204; the second terminal of the DC boost unit 202 is connected to the first terminal of the inverter boost unit 203; the second terminal of the inverter boost unit 203 is connected to the voltage input terminal 204; and the third terminal of the inverter boost unit 203 is connected to the electroluminescent module 205.

[0083] Optionally, the DC boost unit 202 is used to boost the input voltage to the output voltage; the input voltage and the output voltage are DC.

[0084] In one embodiment, the voltage input terminal 204 can use a battery as the voltage supply terminal for voltage input, thus obtaining the input voltage. Optionally, by inputting a 4V input voltage to the DC boost unit 202, an output voltage greater than 4V can be output. Optionally, both the input voltage and the output voltage are DC.

[0085] The inverter boost unit 203 is used to boost the output voltage and input voltage to convert DC to AC to obtain a sine wave signal; the voltage and frequency of the sine wave signal are the voltage and frequency input to the electroluminescent dimming module.

[0086] Optionally, the inverter boost unit 203 can use sinusoidal pulse width modulation to obtain a sinusoidal signal.

[0087] Optionally, the inverter boost unit 203 can perform current form conversion, thereby converting the current of the sinusoidal signal into alternating current.

[0088] Optionally, due to the characteristics of the positive and negative half-cycle signals, the voltage of the sinusoidal signal is greater than the output voltage.

[0089] Optionally, the frequency of the sinusoidal signal is modulated by the inverter boost unit.

[0090] Optionally, the output voltage is greater than or equal to half the voltage of the sine wave signal.

[0091] Optionally, a sine wave signal is input to the electroluminescent dimming module to drive the electroluminescent dimming module.

[0092] Optionally, to drive the PDLC, the voltage and frequency of the sinusoidal signal need to be the same as those required by the PDLC. Therefore, the DC boost unit 202 and the inverter boost unit 203 in this application can adjust the voltage and frequency to drive the PDLC.

[0093] Optionally, the frequency can be modulated in the inverter boost unit 203 to obtain the frequency required by the PDLC.

[0094] Alternatively, the voltage required by the PDLC can also be obtained by adjusting the DC boost unit 202 and the inverter boost unit 203.

[0095] Optionally, the connection between the DC boost unit 202 and the inverter boost unit 203 is simple, and their size is smaller than that of the inverter / urban power supply transformer. Therefore, the drive circuit in this embodiment can be applied in a smart terminal.

[0096] Optionally, the driving circuit of this application can drive capacitive loads, meaning that the driving circuit of this application has the ability to drive loads with capacitive characteristics. Optionally, the load can be the electroluminescent dimming module of this application.

[0097] This embodiment provides a driving circuit, including a DC-DC boost unit and an inverter boost unit. In this application, the first terminal of the DC-DC boost unit is connected to the voltage input terminal; the second terminal of the DC-DC boost unit is connected to the first terminal of the inverter boost unit; the second terminal of the inverter boost unit is connected to the voltage input terminal; and the third terminal of the inverter boost unit is connected to an electro-dimming module. Optionally, the DC-DC boost unit can boost the input voltage to the output voltage, thus boosting DC power. Further, the output voltage and input voltage are input to the inverter boost unit, which converts the boosted DC power to AC power to obtain a sine wave signal. Therefore, the current of the obtained sine wave signal is AC. Simultaneously, due to the characteristics of the positive and negative half-cycles of the sine wave signal, the voltage of each half-cycle is superimposed, increasing the voltage of the sine wave signal. The sine wave signal is input to the electro-dimming module. If the voltage and frequency of the sine wave signal are the voltage and frequency required by the electro-dimming module, then the electro-dimming module can be driven. The driving circuit in this application is small in size and has a simple connection, thus making it applicable to a wider range of scenarios.

[0098] Second Embodiment

[0099] This embodiment is a further refinement of the first embodiment described above. Figure 3 This is a schematic diagram of an electroluminescent dimming module driving system provided for an embodiment. Figure 3 The electroluminescent dimming module drive system includes a drive circuit 201 and an electroluminescent dimming module 205. Optionally, the drive circuit 201 includes a DC boost unit 202, an inverter boost unit 203, and a power input terminal 204.

[0100] Optionally, the inverter boost unit 203 includes: a sinusoidal pulse width modulation unit 301, a DC amplitude amplifier unit 302, and a filter 303. The second terminal of the DC boost unit 202 is connected to the first terminal of the DC amplitude amplifier unit 302; the first terminal of the sinusoidal pulse width modulation unit 301 is connected to the voltage input terminal 204; the second terminal of the sinusoidal pulse width modulation unit 301 is connected to the second terminal of the DC amplitude amplifier unit 302; the third terminal of the DC amplitude amplifier unit 302 is connected to the first terminal of the filter 303; and the second terminal of the filter 303 is connected to the electro-dimming module (PDLC) 202.

[0101] Optionally, the sinusoidal pulse width modulation unit 301 is used to modulate the input voltage into a first sinusoidal pulse width signal; the voltage of the first sinusoidal pulse width signal is equal to the input voltage; the frequency of the first sinusoidal pulse width signal is equal to the frequency of the modulating wave included therein.

[0102] Optionally, the Sine pulse width modulation (SPWM) unit can modulate a sinusoidal pulse width signal, i.e., an SPWM signal.

[0103] Optionally, the SPWM signal, or sinusoidal pulse width modulation signal, modulates the width of at least one pulse in each sinusoidal cycle naturally or regularly, so that it sequentially modulates a pulse sequence with a phase angle and area equivalent to a sine wave, forming a sinusoidal current output with equal amplitude but unequal width.

[0104] Optionally, the voltage of the first sinusoidal pulse width signal is equal to the input voltage.

[0105] Optionally, the sinusoidal pulse width signal includes a positive half-cycle signal and a negative half-cycle signal. Optionally, each half-cycle signal includes a corresponding carrier wave and a modulating wave. Optionally, the frequency of the carrier wave is higher than the frequency of the modulating wave, and the frequency of the first sinusoidal pulse width signal is equal to the frequency of its modulating wave.

[0106] Optionally, the SPWM unit (i.e., the sinusoidal pulse width modulation unit) 301 can modulate the frequency of the modulation wave of the SPWM signal. If the modulated frequency is the frequency required by the PDLC, it can drive the electroluminescent dimming module. The DC amplitude amplification unit 302 is used to amplify the amplitude of the first sinusoidal pulse width signal into a second sinusoidal pulse width signal; optionally, the voltage of the second sinusoidal pulse width signal is equal to the output voltage; optionally, the frequency of the second sinusoidal pulse width signal is equal to the frequency of the first sinusoidal pulse width signal.

[0107] Optionally, if the first sinusoidal pulse width signal is 4V and the output voltage is 36V, the DC amplitude amplification unit 302 can amplify the amplitude of the first sinusoidal pulse width signal to a second sinusoidal pulse width signal of 36V.

[0108] Optionally, in the DC amplitude amplification unit 302, a second sinusoidal pulse width signal is output by combining the output voltage and the first sinusoidal pulse width signal. Throughout the process, the frequency of the sinusoidal pulse width signal remains unchanged.

[0109] Optionally, the first sinusoidal pulse width signal is a set of low-voltage differential SPWM signals.

[0110] Optionally, the second sinusoidal pulse width signal is a set of high-voltage differential SPWM signals.

[0111] Optionally, each set of sinusoidal pulse width signals includes corresponding positive and negative half-cycle signals.

[0112] like Figure 3 As shown, the DC amplitude amplification unit 302 inputs the second sinusoidal pulse width signal into the filter 303. Optionally, the filter 303 is used to filter the second sinusoidal pulse width signal to obtain a sine wave signal; optionally, the frequency of the sine wave signal is equal to the frequency of the second sinusoidal pulse width signal.

[0113] Optionally, the filter 303 in this embodiment can be a low-pass filter. A low-pass filter (LPF) is an electronic circuit or signal processing tool that allows signals below a certain cutoff frequency to pass through while suppressing or attenuating signals above that frequency.

[0114] Optionally, when the filter 303 performs filtering, the frequency of its sinusoidal signal is equal to the frequency of the second sinusoidal pulse width signal.

[0115] Optionally, the output voltage is greater than or equal to half the voltage of the sine wave signal.

[0116] Optionally, the output voltage is greater than or equal to half the voltage of the sine wave signal, and less than the voltage of the sine wave signal. That is, the voltage of the sine wave signal is greater than the output voltage, and less than or equal to twice the output voltage.

[0117] Optionally, if the output voltage is 36V, the voltage of the sine wave signal is less than or equal to 72V, and the sine wave signal is greater than the output voltage of 36V.

[0118] Optionally, if the voltage of the sinusoidal signal is not the voltage required by the PDLC, the output voltage can be adjusted to obtain the voltage required by the PDLC.

[0119] This embodiment provides a driving circuit. Optionally, the inverter boost unit includes an SPWM unit, a DC amplitude amplifier unit, and a filter. The SPWM unit modulates a low-voltage first sinusoidal pulse width signal based on the input voltage, and inputs the first sinusoidal pulse width signal and the output voltage into the DC amplitude amplifier unit to obtain a high-voltage second sinusoidal pulse width signal. Optionally, the voltage of the second sinusoidal pulse width signal is equal to the output voltage. Further, the second sinusoidal pulse width signal is input into the filter and filtered by the filter to obtain a sinusoidal signal.

[0120] Optionally, Figure 4 This is a schematic diagram of an electro-dimming module driving system provided in an embodiment. The third terminal of the DC boost unit 202, the third terminal of the sinusoidal pulse width modulation unit 301, the fourth terminal of the DC amplitude amplification unit 302, and the third terminal of the filter 303 are all grounded.

[0121] Third Embodiment

[0122] Figure 5 This is a schematic diagram of a DC amplitude amplification unit structure provided in an embodiment. Figure 5 As shown, the DC amplitude amplification unit 302 includes a negative half-cycle amplitude amplification subunit 501 and a positive half-cycle amplitude amplification subunit 502. In this embodiment, the DC amplitude amplification unit 302 can be implemented in a switching circuit built with field-effect transistors.

[0123] Optionally, each subunit may include a transistor.

[0124] Alternatively, the transistor can be a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0125] Figure 5 In the diagram, the transistors in each sub-unit are N-channel transistors (or N-channel MOS, referred to as NMOS in the diagram) and P-channel transistors (or P-channel MOS, referred to as PMOS in the diagram); each sub-unit also includes resistors.

[0126] Figure 5 In the negative half-cycle amplitude amplification subunit 501, there is an N-channel MOS1 ( Figure 5 The middle channel is NMOS1) and P-channel MOS1 ( Figure 5 In the PMOS1 subunit, the first resistor is R3; in the positive half-cycle amplitude amplification subunit 502, there are N-channel MOS2 (i.e., NMOS2) and P-channel MOS2 (i.e., PMOS2), and the second resistor is R4.

[0127] Optionally, each sub-unit includes a gate (G), a drain (D), and a source (S) in both the N-channel MOS and P-channel MOS.

[0128] Optionally, in Figure 5 In this configuration, the gate of the N-channel MOS in each sub-unit is connected to the second terminal of the SPWM unit 301, which is the input SPWM_N signal (i.e., the positive half-cycle signal of the first sinusoidal pulse width signal). The SPWM_N signal is a pulse width modulation (PWM) signal used to control the switching state of the NMOS.

[0129] Optionally, the drain of the N-channel MOS in each sub-unit is connected to the gate of the P-channel MOS and the second terminal of the resistor.

[0130] Optionally, the source of the N-channel MOS in each sub-unit is grounded.

[0131] Optionally, the P-channel transistor is connected to the first terminal of the filter 303, which can be achieved by connecting the drain of the P-channel MOS in each sub-unit to the first terminal of the filter 303.

[0132] Optionally, the source of the P-channel MOS in each sub-unit is connected to the second terminal of the DC boost unit 202.

[0133] Optionally, the first end of the resistor is connected to the second end of the DC boost unit 202, and the second end of the resistor is connected between the gate of the P-channel MOS and the drain of the N-channel MOS.

[0134] Figure 5In this context, SPWM_N refers to the negative half-cycle signal in the first sinusoidal pulse width signal.

[0135] Figure 5 In the example, the negative half-cycle amplitude amplification subunit 501 is used for illustration. The 36V output voltage is input to the P-channel MOS (i.e., PMOS1). The negative half-cycle signal (i.e., SPWM_N) in the first sinusoidal pulse width signal is input to the N-channel MOS (i.e., NMOS1) and transmitted to the P-channel MOS (i.e., PMOS1) through the line connection. The negative half-cycle signal in the second sinusoidal pulse width signal with amplified amplitude is output from the P-channel MOS (i.e., PMOS1), which is SPWM_N_36V in the figure.

[0136] Optionally, resistors are used for current limiting and protection to prevent excessive gate current in the P-channel MOS.

[0137] The transistor is used to amplify the amplitude of the first sinusoidal pulse width signal according to the amplitude of the output voltage to obtain the second sinusoidal pulse width signal; the second sinusoidal pulse width signal is output from the drain of the transistor.

[0138] Figure 5 In this example, the negative half-cycle amplitude amplification subunit 501 is used to illustrate the process. A P-channel MOS is used to amplify the first sinusoidal pulse width signal according to the amplitude of the output voltage, thereby obtaining the second sinusoidal pulse width signal.

[0139] Optionally, before and after amplitude amplification, the differential phase difference between the second sinusoidal pulse width signal and the first sinusoidal pulse width signal remains unchanged in the DC amplitude amplification unit 302; the differential phase difference is the phase difference between the positive half-cycle signal and the negative half-cycle signal in the corresponding sinusoidal pulse width signal.

[0140] Optionally, Figure 6 This is a schematic diagram of a filter structure provided for an embodiment. Figure 6 As shown, filter 303 includes a negative filter 601 and a positive filter 602; the sine wave signal includes the positive half-cycle signal and the negative half-cycle signal.

[0141] Optionally, the negative filter 601 includes a third resistor R5, and the positive filter 602 includes a fourth resistor R6. The first terminal of the negative filter 601 and the first terminal of the positive filter 602 are connected to the third terminal of the DC amplitude amplification unit 302.

[0142] Optionally, the first end of the negative filter 601 is connected to the drain of the P-channel MOS in the negative half-cycle amplitude amplification subunit 501.

[0143] Optionally, the first end of the forward filter 602 is connected to the drain of the P-channel MOS of the positive half-cycle amplitude amplification subunit 502.

[0144] Figure 6 In the negative filter 601, there is a third resistor R5 and a first capacitor C1, and in the positive filter 602, there is a fourth resistor R6 and a second capacitor C2.

[0145] Optionally, the first end of the third resistor R5 is connected to the drain of the P-channel MOS in the negative half-cycle amplitude amplification subunit 501, the second end of the third resistor R5 is connected to the N end of the PDLC, the second end of the third resistor R5 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is grounded.

[0146] Optionally, the first end of the fourth resistor R6 is connected to the drain of the P-channel MOS in the positive half-cycle amplitude amplification subunit 502, the second end of the fourth resistor R6 is connected to the P end of the PDLC, the second end of the fourth resistor R6 is connected to the first end of the second capacitor C2, and the second end of the second capacitor C2 is grounded.

[0147] The second end of the negative filter 601 and the second end of the positive filter 602 are connected to the electroluminescent module.

[0148] The third terminal of the negative filter 601 and the third terminal of the positive filter 602 are both grounded; the negative filter 601 is used to filter the positive half-cycle signal in the second sinusoidal pulse width signal to obtain the filtered positive half-cycle signal.

[0149] The positive filter 602 is used to filter the negative half-cycle signal in the second sinusoidal pulse width signal to obtain the filtered negative half-cycle signal.

[0150] Optionally, the filter 303 in this embodiment can be implemented using an RC low-pass filter circuit.

[0151] Optionally, in this embodiment, the DC boost unit further includes a first voltage divider resistor, a second voltage divider resistor, and a voltage regulator. The first terminal of the first voltage divider resistor is connected to the first terminal of the DC amplitude amplification unit 302; the first terminal of the voltage regulator is connected to the voltage input terminal; the second terminal of the voltage regulator is connected to the second terminal of the first voltage divider resistor and the first terminal of the second voltage divider resistor; the second terminal of the second voltage divider resistor is grounded.

[0152] Figure 7 This is a schematic diagram of a DC-DC boost unit structure provided for an embodiment. Figure 7 As shown, the DC boost unit includes: an input capacitor 701, an inductor 702, a diode 703, an output capacitor 704, a first voltage divider resistor 705, a second voltage divider resistor 706, a voltage regulator 707, and a control switch 708.

[0153] Optionally, the input capacitor ( Figure 7The Cin 701 is used for filtering, reducing input voltage ripple, and providing a more stable voltage to the regulator 707.

[0154] Optionally, inductor ( Figure 7 The L)702 can store energy when the switch is on and release energy when the switch is off, helping to increase the output voltage.

[0155] Optionally, diode 703 is used to prevent reverse current flow and ensure that inductor 702 can release energy to the output when the switch is open.

[0156] Optionally, the output capacitor ( Figure 7 The Cout704 is used for filtering, reducing output voltage ripple, and providing a more stable output voltage.

[0157] Optionally, the first voltage divider resistor 705 and the second voltage divider resistor 706 form a voltage divider to detect the output voltage and feed this information back to the feedback (FB) pin of the regulator 707 to adjust the output voltage. Figure 7 In the diagram, the first voltage divider resistor 705 is represented by R1, and the second voltage divider resistor 706 is represented by R2.

[0158] Optionally, the voltage regulator 707 includes at least one pin, which can be:

[0159] VIN: Connected to the input voltage.

[0160] SW: Switch pin, connected to the inductor and diode, used to control the charging and discharging of the inductor.

[0161] NC: Pin not connected, usually not used.

[0162] EN: Enable pin, used to control the boost converter to turn on and off.

[0163] GND-1 and GND-2: Ground pins used to provide a reference potential for the circuit.

[0164] FB: Feedback pin, receives voltage from the voltage divider R1 and R2, used to regulate the output voltage.

[0165] Optionally, a control switch (shown as Enable in the figure) 708 is used to control the enable pin (EN) of the voltage regulator 707, thereby controlling the opening and closing of the entire circuit.

[0166] The working principle of the DC boost unit is as follows: When the enable pin is turned on, the regulator 707 starts to work, controlling the switching on and off of the switch 708 to allow the inductor 702 to store and release energy, thereby boosting the input voltage. Figure 7The voltage is boosted to 36V, and the output voltage is fed back to the regulator 707 through the voltage divider of R1 and R2 to ensure the stability of the output voltage.

[0167] Optionally, the ratio of voltage divider R1 and R2 will affect the final output voltage. Optionally, the ratio of voltage divider R1 and R2 is the same as the ratio of the voltage divider resistors.

[0168] Figure 7 In the circuit, the first terminal of the input capacitor 701 is connected to the voltage input terminal (VIN) 204, the first terminal of the inductor 702, and the first terminal of the regulator 707, while the second terminal of the input capacitor 701 is grounded.

[0169] Figure 7 In the circuit, the second terminal of inductor 702 is connected to the first terminal of diode 703 and the third terminal of voltage regulator 707, respectively.

[0170] Figure 7 In the middle, the second end of diode 703 is connected to the first end of output capacitor 704 and the first end of first voltage divider resistor 706, respectively, and is connected to DC amplitude amplification unit 302, specifically connected to the source of P-channel MOS in the corresponding sub-unit.

[0171] Figure 7 In this circuit, the first terminal of the output capacitor 704 is connected to the second terminal of the diode 703 and the first terminal of the first voltage divider resistor 706, and then connected to the DC amplitude amplifier unit 302, specifically to the source of the P-channel MOS in the corresponding sub-unit. The second terminal of the output capacitor 704 is grounded.

[0172] Figure 7 In the middle, the first terminal of the voltage regulator 707 is connected to the first terminal of the inductor 702 and the voltage input terminal respectively. Figure 7 The first terminal of VIN)204 and input capacitor 701 is shown in the middle. Figure 7 In the middle, the second terminal of the voltage regulator 707 is connected to the second terminal of the first voltage divider resistor 705 and the first terminal of the second voltage divider resistor 706.

[0173] Figure 7 In this configuration, the first terminal of the first voltage divider resistor 705 is connected to the first terminal of the DC amplitude amplifier unit 302, specifically connected to the source of the P-channel MOS in the corresponding sub-unit. The second terminal of the first voltage divider resistor 705 is connected to the first terminal of the second voltage divider resistor 706.

[0174] Figure 7 In the middle, the second terminal of the second voltage divider resistor 706 is grounded, and the fourth terminal of the voltage regulator 707 is connected to the control switch 708.

[0175] Optionally, different ratios of voltage divider resistors in the DC boost unit correspond to different output voltages; different output voltages correspond to different sine wave signal voltages.

[0176] Optionally, when driving a PDLC, different output voltages can be output by adjusting the ratio of the voltage divider resistors, thereby ensuring that the output voltage meets the requirements for driving the PDLC. Optionally, the voltage divider ratio is the ratio of the first voltage divider resistor to the second voltage divider resistor.

[0177] Alternatively, in some scenarios, if the PDLC needs to be driven, the output voltage can be adjusted by adjusting the ratio of the voltage divider resistors, thereby obtaining the required voltage to drive the PDLC.

[0178] Optionally, the DC boost unit in this embodiment can be implemented in the backlight driver chip.

[0179] Optionally, Figure 8 This is a schematic diagram of a sinusoidal pulse width modulation unit structure provided for an embodiment. Figure 8 As shown, the sinusoidal pulse width modulation unit (SPWM unit) 301 includes: a power input 801, an I2C interface 802, a logic module 803, and a driver module 804.

[0180] Optionally, the I2C interface 802 communicates with external devices via SCL (serial clock line) and SDA (serial data line). Optionally, RSTN (reset signal) and INT (interrupt signal) connections are also provided for resetting the module and handling interrupt events.

[0181] Optionally, the logic module 803 may also include: a main control module 8031, a storage unit 8032, a waveform editor 8033, and a waveform comparator 8034.

[0182] Alternatively, the main control module 8031 ​​can be regarded as a central processing unit.

[0183] Optionally, the storage unit 8032 is the memory of the main control module 8031, and can be a static random-access memory (SARM).

[0184] Optionally, the waveform editor 8033 can generate the desired modulation wave and carrier.

[0185] Optionally, the waveform comparator 8034 can synthesize the modulated wave and the carrier wave into an SPWM signal.

[0186] Optionally, the drive module 804 may include a negative drive terminal and a positive drive terminal. Optionally, the positive drive terminal outputs an SPWM_P signal (i.e., a positive half-cycle signal), and the negative drive terminal outputs an SPWM_N signal (i.e., a negative half-cycle signal).

[0187] Optionally, the first terminal of the power input 801 is connected to the voltage input terminal 204 to input the input voltage.

[0188] Optionally, the second terminal of the power input 801 is connected to the first terminal of the logic module 803.

[0189] Optionally, the third terminal of the power input 801 is connected to the first terminal of the I2C interface 802.

[0190] Optionally, the second end of the logic module 803 is connected to the first end of the drive module 804.

[0191] Optionally, the second end of the driving module 804 is connected to the second end of the DC amplitude amplification unit 302, specifically: the negative driving end in the driving module 804 is connected to the source of PMOS1 in the negative half-cycle amplitude amplification sub-unit 501, and the positive driving end in the driving module 804 is connected to the source of PMOS2 in the positive half-cycle amplitude amplification sub-unit 502.

[0192] Optionally, in this embodiment, the first sinusoidal pulse width signal can be generated using a preset waveform mode and a real-time waveform mode, as follows:

[0193] Method 1, Pre-set Waveform Mode: External devices can program a pre-set waveform into the sinusoidal pulse width modulation unit 301 via the I2C interface 802. The storage unit 8032 programs the pre-set waveform. When generating the first sinusoidal pulse width signal, the sinusoidal pulse width modulation unit 301 obtains the pre-set waveform from the storage unit 8032, generates a carrier wave (high-frequency triangular wave) of a specific frequency and a modulation wave (which can be the frequency required by the electroluminescence module), and then inputs it into the waveform comparator 8034 to generate the first sinusoidal pulse width modulation signal, which is then output through the driver module 804.

[0194] Method 2: Real-time waveform model. External devices transmit waveform control information through I2C interface 802. The sinusoidal pulse width modulation unit 301 decodes the signal and controls the waveform editor 8033 to generate a carrier wave (high-frequency triangular wave) and a modulation wave (which can be the frequency required by the electroluminescence module). The signal is then input into the waveform comparator 8034 to generate the first sinusoidal pulse width modulation signal, which is then output through the driver module 804.

[0195] Optionally, the sinusoidal pulse width modulation (SPWM) unit can be implemented using a motor driver chip. Different duty cycles in the SPWM unit correspond to different sinusoidal signals to obtain different voltages.

[0196] Optionally, different duty cycles of the sinusoidal pulse width modulation unit 301 correspond to different sinusoidal signals.

[0197] In some scenarios, if the voltage of the sinusoidal signal obtained at a duty cycle of 10% is insufficient to drive the PDLC, the duty cycle ratio can be adjusted. The duty cycle of the sinusoidal pulse width modulation unit 301 can be adjusted from 10% to 15%, and the input voltage can be re-input. After passing through the driving circuit, another sinusoidal signal can be obtained. The voltage of this sinusoidal signal is increased. If it is increased to the voltage required by the PDLC, the PDLC can be driven.

[0198] Optionally, to obtain the voltage required by the PDLC, the ratio and duty cycle of the voltage divider resistors can be adjusted simultaneously, or one of them can be adjusted individually; there is no limitation here.

[0199] Fourth embodiment

[0200] This application also provides a smart terminal, including the driving circuit described in any of the above embodiments.

[0201] Optionally, the smart terminal includes the driving circuit and electroluminescence module described in the above embodiments.

[0202] Smart terminals can be implemented in various forms. For example, the smart terminals described in this application may include mobile terminals such as mobile phones, tablets, laptops, handheld computers, personal digital assistants (PDAs), portable media players (PMPs), navigation devices, wearable devices, smart bracelets, pedometers, etc., as well as fixed terminals such as digital TVs and desktop computers.

[0203] The following description will use a mobile terminal as an example. Those skilled in the art will understand that, apart from elements specifically designed for mobile purposes, the construction according to the embodiments of this application can also be applied to fixed-type terminals.

[0204] Figure 9 This is a schematic diagram of the hardware structure of a mobile terminal provided for an embodiment. For example... Figure 9 As shown, the mobile terminal 900 may include: an RF (Radio Frequency) unit 901, a WiFi module 902, an audio output unit 903, an A / V (Audio / Video) input unit 904, a sensor 905, a display unit 906, a user input unit 907, an interface unit 908, a memory 909, a processor 910, and a power supply 911, etc. Those skilled in the art will understand that... Figure 9The mobile terminal structure shown does not constitute a limitation on the mobile terminal. The mobile terminal may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0205] The following is combined Figure 9 A detailed introduction to each component of the mobile terminal:

[0206] The radio frequency unit 901 can be used for receiving and transmitting signals during information transmission or calls. Optionally, it receives downlink information from the base station and processes it with the processor 910; additionally, it transmits uplink data to the base station. Typically, the radio frequency unit 901 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier, a duplexer, etc. Optionally, the radio frequency unit 901 can also communicate wirelessly with networks and other devices. The aforementioned wireless communications may use any communication standard or protocol, including but not limited to GSM (Global System of Mobile communication), GPRS (General Packet Radio Service), CDMA2000 (Code Division Multiple Access 2000), WCDMA (Wideband Code Division Multiple Access), TD-SCDMA (Time Division-Synchronous Code Division Multiple Access), FDD-LTE (Frequency Division Duplexing-Long Term Evolution), TDD-LTE (Time Division Duplexing-Long Term Evolution), 5G, and 6G.

[0207] WiFi is a short-range wireless transmission technology. Mobile terminals using the WiFi module 902 can help users send and receive emails, browse web pages, and access streaming media, providing users with wireless broadband internet access. Although Figure 9 WiFi module 902 is shown, but optionally, it is not a necessary component of the mobile terminal and can be omitted as needed without changing its essential nature.

[0208] The audio output unit 903 can convert audio data received by the radio frequency unit 901 or the WiFi module 902, or stored in the memory 909, into audio signals and output them as sound when the mobile terminal 900 is in call signal receiving mode, call mode, recording mode, voice recognition mode, broadcast receiving mode, etc. Furthermore, the audio output unit 903 can also provide audio output related to specific functions performed by the mobile terminal 900 (e.g., call signal receiving sound, message receiving sound, etc.). The audio output unit 903 may include a speaker, a buzzer, etc.

[0209] The A / V input unit 904 is used to receive audio or video signals. The A / V input unit 904 may include a graphics processing unit (GPU) 9041 and a microphone 9042. The GPU 9041 processes image data of still images or videos acquired by an image capture device (such as a camera) in video capture mode or image capture mode. The processed image frames can be displayed on the display unit 906. The image frames processed by the GPU 9041 can be stored in the memory 909 (or other storage medium) or transmitted via the radio frequency unit 901 or the WiFi module 902. The microphone 9042 can receive sound (audio data) in operating modes such as telephone call mode, recording mode, and voice recognition mode, and can process such sound into audio data. The processed audio (voice) data can be converted into a format that can be transmitted to a mobile communication base station via the radio frequency unit 901 in telephone call mode. The microphone 9042 can implement various types of noise cancellation (or suppression) algorithms to eliminate (or suppress) noise or interference generated during the reception and transmission of audio signals.

[0210] The mobile terminal 900 also includes at least one sensor 905, such as a light sensor, a motion sensor, and other sensors. Optionally, the light sensor includes an ambient light sensor and a proximity sensor. Optionally, the ambient light sensor can adjust the brightness of the display panel 9061 according to the ambient light level, and the proximity sensor can turn off the display panel 9061 and / or backlight when the mobile terminal 900 is moved to the ear. As a type of motion sensor, the accelerometer sensor can detect the magnitude of acceleration in various directions (generally three axes), and can detect the magnitude and direction of gravity when stationary. It can be used for applications that recognize the phone's posture (such as landscape / portrait switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc. Other sensors that may be configured in the phone, such as fingerprint sensors, pressure sensors, iris sensors, molecular sensors, gyroscopes, barometers, hygrometers, thermometers, and infrared sensors, will not be described in detail here.

[0211] The display unit 906 is used to display information input by the user or information provided to the user. The display unit 906 may include a display panel 9061, which may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like.

[0212] User input unit 907 can be used to receive input numerical or character information, and generate key signal inputs related to user settings and function control of the mobile terminal. Optionally, user input unit 907 may include touch panel 9071 and other input devices 9072. Touch panel 9071, also known as a touch screen, can collect touch operations performed by the user on or near it (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near touch panel 9071), and drive corresponding connection devices according to a pre-set program. Touch panel 9071 may include two parts: a touch detection device and a touch controller. Optionally, the touch detection device detects the user's touch position and the signal generated by the touch operation, and transmits the signal to the touch controller; the touch controller receives touch information from the touch detection device, converts it into touch point coordinates, and sends it to processor 910, and can also receive and execute commands sent by processor 910. Optionally, touch panel 9071 can be implemented using various types such as resistive, capacitive, infrared, and surface acoustic wave. In addition to the touch panel 9071, the user input unit 907 may also include other input devices 9072. Optionally, other input devices 9072 may include, but are not limited to, one or more of the following: physical keyboard, function keys (such as volume control buttons, power buttons, etc.), trackball, mouse, joystick, etc., without being specifically limited here.

[0213] Optionally, the touch panel 9071 may cover the display panel 9061. When the touch panel 9071 detects a touch operation on or near it, it transmits the information to the processor 910 to determine the type of touch event. Subsequently, the processor 910 provides corresponding visual output on the display panel 9061 based on the type of touch event. Although in Figure 9 In this embodiment, the touch panel 9071 and the display panel 9061 are two independent components to realize the input and output functions of the mobile terminal. However, in some embodiments, the touch panel 9071 and the display panel 9061 can be integrated to realize the input and output functions of the mobile terminal. The specific implementation is not limited here.

[0214] Interface unit 908 serves as an interface through which at least one external device can connect to mobile terminal 900. For example, the external device may include a wired or wireless headset port, an external power supply (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device with an identification module, an audio input / output (I / O) port, a video I / O port, a headphone port, and so on. Interface unit 908 may be used to receive input (e.g., data, power, etc.) from the external device and transmit the received input to one or more elements within mobile terminal 900, or it may be used to transmit data between mobile terminal 900 and the external device.

[0215] The memory 909 can be used to store software programs and various data. The memory 909 may primarily include a program storage area and a data storage area. Optionally, the program storage area may store the operating system, applications required for at least one function (such as sound playback, image playback, etc.), etc.; the data storage area may store data created based on the use of the mobile phone (such as audio data, phonebook, etc.). Optionally, the memory 909 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0216] The processor 910 is the control center of the mobile terminal. It connects various parts of the mobile terminal via various interfaces and lines. By running or executing software programs and / or modules stored in the memory 909, and by calling data stored in the memory 909, it performs various functions and processes data of the mobile terminal, thereby providing overall monitoring of the mobile terminal. The processor 910 may include one or more processing units; preferably, the processor 910 may integrate an application processor and a modem processor. Optionally, the application processor mainly handles the operating system, user interface, and applications, while the modem processor mainly handles wireless communication. Optionally, the modem processor may not be integrated into the processor 910.

[0217] The mobile terminal 900 may also include a power supply 911 (such as a battery) that supplies power to various components. Preferably, the power supply 911 can be logically connected to the processor 910 through a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system.

[0218] although Figure 9 As not shown, the mobile terminal 900 may also include a Bluetooth module, the driving circuit of this application, and an electroluminescent module, etc., which will not be described in detail here.

[0219] It is understood that the above scenarios are merely examples and do not constitute a limitation on the application scenarios of the technical solutions provided in the embodiments of this application. The technical solutions of this application can also be applied to other scenarios. For example, as those skilled in the art will know, with the evolution of system architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0220] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0221] The units in the device of this application embodiment can be merged, divided, and deleted according to actual needs.

[0222] In this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions are generally described in detail only when they appear for the first time. When they appear again, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions that are not described in detail later can be referred to their previous relevant detailed descriptions.

[0223] In this application, the descriptions of the various embodiments have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0224] The technical features of the present application can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.

[0225] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A drive circuit characterized by comprising: Comprise: A direct current boosting unit and an inverter boosting unit; The first end of the direct current boosting unit is connected with a voltage input end; The second end of the direct current boosting unit is connected with the first end of the inverter boosting unit; The second end of the inverter boosting unit is connected with the voltage input end; The third end of the inverter boosting unit is connected with an electrochromic dimming module; The direct current boosting unit is used for boosting the input voltage to the output voltage; The inverter boosting unit is used for boosting the output voltage and the input voltage to obtain a sine wave signal.

2. The drive circuit according to claim 1, characterized in that, Further comprising at least one of: The voltage and frequency of the sine wave signal are the voltage and frequency input to the electrochromic dimming module; The current of the sine wave signal is alternating current; The voltage of the sine wave signal is greater than the output voltage; The frequency of the sine wave signal is modulated by the inverter boosting unit; The output voltage is greater than or equal to half of the voltage of the sine wave signal.

3. The drive circuit according to claim 1, characterized by The inverter boosting unit comprises a sine pulse width modulation unit, a direct current amplitude amplification unit and a filter, and further comprises at least one of: The second end of the direct current boosting unit is connected with the first end of the direct current amplitude amplification unit; The first end of the sine pulse width modulation unit is connected with the voltage input end; The second end of the sine pulse width modulation unit is connected with the second end of the direct current amplitude amplification unit; The third end of the direct current amplitude amplification unit is connected with the first end of the filter; The second end of the filter is connected with the electrochromic dimming module; The sine pulse width modulation unit is used for modulating the input voltage to a first sine pulse width signal; The direct current amplitude amplification unit is used for amplifying the amplitude of the first sine pulse width signal to a second sine pulse width signal; The filter is used for filtering the second sine pulse width signal to obtain a sine wave signal.

4. The drive circuit according to claim 3, characterized in that, Further comprising at least one of: The frequency of the first sine pulse width signal is equal to the frequency of the modulated wave included therein; The voltage of the second sine pulse width signal is equal to the output voltage; The frequency of the second sine pulse width signal is equal to the frequency of the first sine pulse width signal; The frequency of the sine wave signal is equal to the frequency of the second sine pulse width signal; Different duty cycles in the sine pulse width modulation unit correspond to different sine wave signals to obtain different voltages.

5. The drive circuit according to claim 3, characterized by The third end of the direct current boosting unit, the third end of the sine pulse width modulation unit, the fourth end of the direct current amplitude amplification unit and the third end of the filter are all grounded.

6. The drive circuit according to claim 3, characterized by The direct current amplitude amplification unit comprises a P-channel triode, and further comprises at least one of: The P-channel triode is connected with the first end of the filter; The P-channel triode is used for amplifying the amplitude of the first sine pulse width signal according to the amplitude of the output voltage to obtain a second sine pulse width signal; The second sine pulse width signal is output from the drain of the P-channel triode.

7. The drive circuit according to any one of claims 3 to 6, characterized in that, The differential phase difference corresponding to the second sine pulse width signal before and after the amplitude amplification of the direct current amplitude amplification unit is unchanged.

8. The drive circuit according to claim 7, characterized in that, Further comprising at least one of: The differential phase difference is a phase difference between a positive half cycle signal and a negative half cycle signal in the corresponding sinusoidal pulse width signal. The filter comprises a positive filter and a negative filter. The sinusoidal signal comprises a positive half cycle signal and a negative half cycle signal.

9. The drive circuit according to any one of claims 3 to 6, characterized by, The direct current boosting unit further comprises a first voltage dividing resistor, a second voltage dividing resistor and a voltage stabilizer, and further comprises at least one of the following: A first end of the first voltage dividing resistor is connected with a first end of the direct current amplitude amplifying unit; A first end of the voltage stabilizer is connected with the voltage input end; a second end of the voltage stabilizer is connected with a second end of the first voltage dividing resistor and a first end of the second voltage dividing resistor; Different voltage dividing resistors in the direct current boosting unit correspond to different output voltages; different output voltages correspond to different voltages of the sinusoidal signal.

10. An intelligent terminal comprising the driving circuit according to any one of claims 1 to 9.

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