Multi-signal hardware interlocking control device

Abstract

The utility model provides a multi-signal hardware interlocking control device which comprises a shell, a signal relay control card, a signal interlocking control card and a photoelectric signal control card, the signal relay control card, the signal interlocking control card and the photoelectric signal control card are arranged in the shell and electrically connected in sequence, and the signal relay control card is provided with a bus signal input interface H and a bus signal output interface I; the signal interlocking control card is provided with an interlocking signal input interface J, and the photoelectric signal control card is provided with a light source input interface K and an optical signal output interface L; the bus signal input interface H inputs multiple paths of bus signals, the interlocking signal input interface J inputs multiple paths of interlocking signals corresponding to the multiple paths of bus signals, and the signal interlocking control card achieves interlocking of the multiple paths of bus signals and the corresponding multiple paths of interlocking signals. Multiple paths of result signals obtained by interlocking the bus signal and the interlocking signal are output through a bus signal output interface I; the light source input interface K is connected with a laser light source, and the photoelectric signal control card obtains multi-channel result signals, converts the signals into optical signals and outputs the optical signals through the optical signal output interface L.

Description

TECHNICAL FIELD

[0001] The utility model belongs to semiconductor manufacturing equipment technical field especially relates to a kind of multi-signal hardware interlock control device. BACKGROUND

[0002] Current PVD (Physical Vapor Deposition) process equipment appears a large number of sensor controls multiple motors control, multiple valve piece control of multiple cavities, need to have higher requirement sequence control.

[0003] However, for such multi-signal control, currently mainly through software control related logic, rely on software or programmable logic controller (PLC) to realize signal interlocking function. However, this implementation exists following problems:

[0004] 1) Software failure risk: software system may be due to crash, program error or external interference to cause interlocking function failure, and then cause security risk.

[0005] 2) Response speed is insufficient: software processing needs certain time delay, possibly unable to meet the scene of high real-time requirement.

[0006] 3) Higher cost: need additional controller equipment and complex programming work, increase the overall cost of system and labor cost.

[0007] Therefore, it is necessary to provide a kind of multi-signal hardware interlock control device, realize in the hardware logic interlocking of multiple types, multiple channels. Utility model content

[0008] The utility model provides a kind of multi-signal hardware interlock control device, realizes multi-signal hardware logic interlocking.

[0009] To achieve the above object, the utility model provides the following technical scheme:

[0010] The application discloses a multi-signal hardware interlocking control device, which comprises a shell and a signal relay control card, a signal interlocking control card and an optoelectronic signal control card which are sequentially and electrically connected in the shell, wherein the signal relay control card is provided with a bus signal input interface H and a bus signal output interface I, the signal interlocking control card is provided with an interlocking signal input interface J, and the optoelectronic signal control card is provided with a light source input interface K and a light signal output interface L; the bus signal input interface H inputs a plurality of bus signals, the interlocking signal input interface J inputs a plurality of interlocking signals corresponding to the plurality of bus signals, the signal interlocking control card realizes interlocking of the plurality of bus signals and the corresponding plurality of interlocking signals, and the plurality of result signals obtained by interlocking the bus signals and the interlocking signals are output through the bus signal output interface I; the light source input interface K is connected with a laser light source, and the optoelectronic signal control card converts the plurality of result signals into light signals and outputs the light signals through the light signal output interface L.

[0011] Preferably, the signal interlocking control card is provided with a plurality of intermediate relays, one coil of each intermediate relay is connected with one interlocking signal, and the coil of the intermediate relay is controlled to be powered on or powered off; the bus signal is connected with the normally open contact of the intermediate relay in series to output a result signal; the plurality of interlocking signals, the plurality of intermediate relays and the plurality of bus signals are in one-to-one correspondence, and the one-to-one interlocking of the bus signals and the interlocking signals is realized through the intermediate relays.

[0012] Preferably, the bus signal, the interlocking signal and the result signal are all logic level signals and are set to be high level effective; when the interlocking signal is high level, the coil of the intermediate relay is powered on, the normally open contact of the intermediate relay is closed, and the bus signal is output as a result signal; when the interlocking signal is low level, the coil of the intermediate relay is powered off, the normally open contact of the intermediate relay is disconnected, and the result signal is low level.

[0013] Preferably, the signal relay control card and the signal interlocking control card are electrically connected through an integrated quick connector, and the signal interlocking control card and the optoelectronic signal control card are electrically connected through an integrated quick connector.

[0014] Preferably, the shell comprises a left shell and a right shell, the signal interlocking control card is vertically arranged in the right shell, the optoelectronic conversion control card is vertically arranged in the left shell, and the signal relay control card is horizontally arranged above the signal interlocking control card and the optoelectronic conversion control card.

[0015] Preferably, the shell is provided with a plurality of interface holes corresponding to the bus signal input interface H, the bus signal output interface I, the interlock signal input interface J, the light source input interface K and the light signal output interface L; the interface hole of the bus signal input interface H and the interface hole of the bus signal output interface I are arranged on the front surface of the left shell and the right shell respectively; the interface hole of the interlock signal input interface J is arranged on the side surface of the right shell, and the interface hole of the light source input interface K and the interface hole of the light signal output interface L are both arranged on the side surface of the left shell and located on the same side of the shell as the interface hole of the interlock signal input interface J.

[0016] Preferably, the interface flanges are arranged at the interface hole of the bus signal input interface H and the interface hole of the bus signal output interface I; and the outer wall of the interface flange is provided with an interface sealing ring.

[0017] Preferably, an annular shielding groove is arranged on the connecting surface of the left shell and the right shell, and a shielding coil is arranged in the shielding groove.

[0018] Preferably, the shielding coil is made of metal silver.

[0019] Preferably, the shell is made of metal and is manufactured by 3D printing.

[0020] Compared with the prior art, the technical scheme of the utility model has beneficial effects.

[0021] For example, the multi-signal hardware interlocking control device comprises a shell and signal relay control cards, signal interlocking control cards and photoelectric signal control cards which are sequentially and electrically connected in the shell, the signal relay control cards are provided with a bus signal input interface H and a bus signal output interface I, the signal interlocking control cards are provided with an interlock signal input interface J, and the photoelectric signal control cards are provided with a light source input interface K and a light signal output interface L; the bus signal input interface H inputs a plurality of bus signals, the interlock signal input interface J inputs a plurality of interlocking signals corresponding to the plurality of bus signals, the signal interlocking control cards realize interlocking of the plurality of bus signals and the corresponding plurality of interlocking signals, and the plurality of result signals obtained by interlocking the bus signals and the interlocking signals are output through the bus signal output interface I; the light source input interface K is connected with a laser light source, the photoelectric signal control cards convert the plurality of result signals into light signals and output the light signals through the light signal output interface L; the signal interlocking control cards and the signal relay control cards realize hardware logic interlocking of multiple types and multiple channels, thereby guaranteeing the efficiency of relevant matrix control and the safety of logic interlocking; the photoelectric signal control cards convert the result signals into light signals and output the light signals, thereby realizing visual monitoring of the multiple-channel signal interlocking results and historical data tracing.

[0022] Further, the reasonable deployment of the signal relay control card, the signal interlocking control card and the photoelectric signal control card reduces the space occupation, is small in size, and the reasonable deployment of the interface facilitates the connection with other components outside.

[0023] Further, the shell is made of metal material, and a shielding coil is arranged at a shell connecting position, so that external signal interference is effectively prevented. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a multi-signal hardware interlocking control device structure schematic view in the embodiment of the utility model;

[0025] Figure 2 is a partial sectional view of the multi-signal hardware interlocking control device in the embodiment of the utility model;

[0026] Figure 3 is a split schematic view of the multi-signal hardware interlocking control device in the embodiment of the utility model;

[0027] Figure 4 is a signal transmission schematic view of the signal hardware interlocking control device in the embodiment of the utility model;

[0028] Figure 5 is a control principle diagram of the signal hardware interlocking control device in the embodiment of the utility model.

[0029] BRIEF DESCRIPTION OF DRAWINGS

[0030] 1 - shell, 11 - left shell, 12 - right shell, 2 - signal relay control card, 3 - signal interlocking control card, 4 - photoelectric signal control card, 5 - interface sealing ring, 6 - shielding coil, H - bus signal input interface, I - bus signal output interface, J - interlocking signal input interface, K - light source input interface, L - optical signal output interface. DETAILED DESCRIPTION

[0031] In order to make the purpose, features and beneficial effects of the utility model more obvious and easy to understand, the specific implementation mode of the utility model is described in detail below in combination with the drawings. It can be understood that the following specific implementation mode is only used for explaining the utility model, and is not limited to the utility model. In the drawings, the same or similar reference signs can be used to refer to the same or similar elements in different embodiments, and the description of the same or similar elements in different embodiments and the description of prior art elements, features, effects and the like can be omitted.

[0032] Figure 1 is a multi-signal hardware interlocking control device structure schematic view in the embodiment of the utility model;

[0033] Figure 2It is the partial section view of the multi-signal hardware interlock control device in the embodiment of the utility model; Figure 3 It is the split schematic view of the multi-signal hardware interlock control device in the embodiment of the utility model; Figure 4 It is the signal transmission schematic view of the signal hardware interlock control device in the embodiment of the utility model; Figure 5 It is the control principle diagram of the signal hardware interlock control device in the embodiment of the utility model.

[0034] With reference to Figures 1-5 The utility model embodiment provides a kind of multi-signal hardware interlock control device.

[0035] Specifically, the multi-signal hardware interlock control device includes shell 1 and the signal relay control card 2, signal interlock control card 3 and photoelectric signal control card 4 that are sequentially electrically connected in shell 1, signal relay control card 2 is provided with bus signal input interface H and bus signal output interface I, signal interlock control card 3 is provided with interlock signal input interface J, and photoelectric signal control card 4 is provided with light source input interface K and light signal output interface L;Bus signal input interface H inputs multiple bus signals, interlock signal input interface J inputs multiple interlock signals corresponding to multiple bus signals, signal interlock control card 3 realizes the interlock of multiple bus signals and corresponding multiple interlock signals, and the multiple result signals of the interlock of bus signal and interlock signal are output through bus signal output interface I;Light source input interface K connects laser light source, and photoelectric signal control card 4 converts multiple result signals into optical signals and outputs through light signal output interface L.

[0036] Specifically, light signal output interface L connects optical fiber output optical signal.

[0037] In some embodiments, signal interlock control card 3 is provided with multiple intermediate relays, and each interlock signal is connected with the coil of one intermediate relay and controls the power-on and power-off of the coil of intermediate relay, and the result signal is output after the series connection of bus signal and the normally open contact of intermediate relay, and multiple interlock signals, multiple intermediate relays and multiple bus signals are one-to-one corresponding, and one-to-one interlock of bus signal and interlock signal is realized through intermediate relay.

[0038] In some embodiments, bus signal, interlock signal and result signal are all logic level signals, and are set as high level effective;When interlock signal is high level, the coil of intermediate relay is powered on, and the normally open contact of intermediate relay is closed, and bus signal is output as result signal;When interlock signal is low level, the coil of intermediate relay is powered off, and the normally open contact of intermediate relay is disconnected, and result signal is low level.

[0039] Referring to Figure 5 Specifically, bus signal is 42-way, and A1-A 42indicates that the interlocking signal is 42, and the D1-D 42 indicates that the intermediate relay is 42, and the S1-S 42 indicates that the interlocking signal D1-D 42 respectively one-to-one corresponding connection control intermediate relay S1-S 42 coil; bus signal A1-A 42 respectively one-to-one corresponding connection intermediate relay S1-S 42 normally open contact, bus signal A1-A 42 and the normally open contact of the intermediate relay S1-S 42 in series after output result signal E1-E 42 , realize interlocking; photoelectric signal control card 4 converts the result signal E1-E 42 into optical signal C1-C 42 and outputs through the optical signal output interface L, realizing the monitoring feedback of the result signal.

[0040] Specifically, the output result signal E1-E 42 is used to drive the controlled object B1-B 42 , which can be a motor or a valve element.

[0041] In some embodiments, the signal relay control card 2 and the signal interlocking control card 3 are electrically connected through the integrated quick connector; the signal interlocking control card 3 and the photoelectric signal control card 4 are electrically connected through the integrated quick connector; realizing fast installation connection.

[0042] In some embodiments, the shell 1 includes a left shell 11 and a right shell 12, the signal interlocking control card 3 is vertically arranged in the right shell 12, the photoelectric conversion control card 4 is vertically arranged in the left shell 11, and the signal relay control card 2 is horizontally arranged above the signal interlocking control card 3 and the photoelectric conversion control card 4; the reasonable deployment of the signal relay control card 2, the signal interlocking control card 3 and the photoelectric signal control card 4 reduces the space occupation, has small volume, and is convenient to use in narrow space.

[0043] In some embodiments, the shell 1 is provided with a plurality of interface holes corresponding to the bus signal input interface H, the bus signal output interface I, the interlocking signal input interface J, the light source input interface K and the optical signal output interface L; the interface holes of the bus signal input interface H and the interface holes of the bus signal output interface I are arranged on the front surface of the left shell 11 and the right shell 12 respectively; the interface hole of the interlocking signal input interface J is arranged on the side surface of the right shell 12, and the interface hole of the light source input interface K and the interface hole of the optical signal output interface L are both arranged on the side surface of the left shell 11 and located on the same side of the shell 1 as the interface hole of the interlocking signal input interface J; the reasonable deployment of the interface is convenient for connection with other external components.

[0044] In some embodiments, the interface hole of the bus signal input interface H and the interface hole of the bus signal output interface I are both provided with an interface flange; the outer wall of the interface flange is provided with an interface sealing ring 5; and the reliable sealing connection is facilitated.

[0045] In some embodiments, the annular shielding groove is arranged on the connecting surface of the left shell 11 and the right shell 12, and the shielding coil 6 is arranged in the shielding groove; the shielding effect is improved, and the signal interference is reduced.

[0046] In some embodiments, the shielding coil 6 is made of metal silver.

[0047] In some embodiments, the shell 1 is made of metal and is manufactured by 3D printing.

[0048] In summary, the multi-signal hardware interlocking control device provided by the utility model, including shell 1 and setting in shell 1 signal relay control card 2, signal interlocking control card 3 and photoelectric signal control card 4, signal relay control card 2 is provided with bus signal input interface H and bus signal output interface I, signal interlocking control card 3 is provided with interlocking signal input interface J, photoelectric signal control card 4 is provided with light source input interface K and light signal output interface L;Signal relay control card 2 is electrically connected with signal interlocking control card 3;Signal interlocking control card 3 is electrically connected with photoelectric signal control card 4;Bus signal input interface H inputs multi-channel bus signal, interlocking signal input interface J inputs the multi-channel interlocking signal corresponding to the multi-channel bus signal, signal interlocking control card 3 realizes the interlocking of the multi-channel bus signal and the corresponding multi-channel interlocking signal, and the multi-channel result signal of the interlocking of the bus signal and the interlocking signal is output through the bus signal output interface I;Light source input interface K is connected with laser light source, and photoelectric signal control card 4 converts the multi-channel result signal into light signal and outputs through light signal output interface L;Multi-type, multi-channel hardware logic interlocking is realized through signal interlocking control card 3 and signal relay control card 2, the efficiency of relevant matrix control is guaranteed, and the safety of logic interlocking is guaranteed;The result signal is acquired through photoelectric signal control card 4 and converted into light signal output, the visualization monitoring of multi-channel signal interlocking result and the historical data tracing are realized.

[0049] Further, the reasonable deployment of signal relay control card 2, signal interlocking control card 3 and photoelectric signal control card 4 reduces the space occupation and the volume is small;The reasonable deployment of the interface facilitates the connection with other external components.

[0050] Further, the shell 1 is made of metal, and the shielding coil 6 is arranged at the connecting position of the shell 1, which effectively prevents the influence of external signal interference.

[0051] Although specific embodiments have been described above, these embodiments are not intended to limit the scope of the present disclosure, even if only a single embodiment is described with respect to a particular feature. The examples of features provided in the present disclosure are intended to be illustrative rather than limiting, unless otherwise specified. In a specific implementation, one or more technical features of a dependent claim can be combined with technical features of an independent claim, and technical features from a corresponding independent claim can be combined by any appropriate means rather than only by the specific combinations listed in the claims, as technically feasible.

[0052] Although the present disclosure has been described as above, the present disclosure is not limited thereto. Any person skilled in the art can make various modifications and changes without departing from the spirit and scope of the present disclosure, and the protection scope of the present disclosure should be subject to the scope defined by the claims.

Claims

1. A multiple signal hardware interlock control apparatus, characterized by, The system includes a housing and, within the housing, a signal relay control card, a signal interlock control card, and a photoelectric signal control card, which are electrically connected in sequence. The signal relay control card has a bus signal input interface H and a bus signal output interface I. The signal interlock control card has an interlock signal input interface J. The photoelectric signal control card has a light source input interface K and a light signal output interface L. The bus signal input interface H inputs multiple bus signals, and the interlock signal input interface J inputs multiple interlock signals corresponding to the multiple bus signals. The signal interlock control card implements interlocking between the multiple bus signals and their corresponding multiple interlock signals. The multiple result signals of the interlocking bus signals and interlock signals are output through the bus signal output interface I. The light source input interface K is connected to a laser light source, and the photoelectric signal control card acquires the multiple result signals, converts them into light signals, and outputs them through the light signal output interface L.

2. The multi-signal hardware interlock control device according to claim 1, characterized in that, The signal interlock control card is equipped with multiple intermediate relays. Each interlock signal is connected to the coil of one intermediate relay and controls the energization and de-energization of the intermediate relay coil. The bus signal is connected in series with the normally open contact of the intermediate relay to output a result signal. The multiple interlock signals, the multiple intermediate relays and the multiple bus signals are in one-to-one correspondence. The bus signals and the interlock signals are interlocked one-to-one through the intermediate relays.

3. The multi-signal hardware interlock control device according to claim 2, characterized in that, The bus signal, the interlock signal, and the result signal are all logic level signals, set to active high. When the interlock signal is high, the coil of the intermediate relay is energized, the normally open contact of the intermediate relay is closed, and the bus signal is output as the result signal. When the interlock signal is low, the coil of the intermediate relay is de-energized, the normally open contact of the intermediate relay is open, and the result signal is low.

4. The multi-signal hardware interlock control device according to claim 1, characterized in that, The signal relay control card and the signal interlock control card are electrically connected via an integrated quick-connect plug; the signal interlock control card and the photoelectric signal control card are electrically connected via an integrated quick-connect plug.

5. The multi-signal hardware interlock control device according to claim 1, characterized in that, The housing includes a left housing and a right housing. The signal interlock control card is vertically disposed in the right housing, the photoelectric signal control card is vertically disposed in the left housing, and the signal relay control card is horizontally disposed above the signal interlock control card and the photoelectric signal control card.

6. The multi-signal hardware interlock control device according to claim 5, characterized in that, The housing is provided with a plurality of interface holes corresponding one-to-one with the bus signal input interface H, the bus signal output interface I, the interlock signal input interface J, the light source input interface K, and the optical signal output interface L; the interface holes of the bus signal input interface H and the bus signal output interface I are respectively located on the front of the left and right shells; the interface hole of the interlock signal input interface J is located on the side of the right shell; the interface holes of the light source input interface K and the optical signal output interface L are both located on the side of the left shell and are on the same side of the housing as the interface hole of the interlock signal input interface J.

7. The multi-signal hardware interlock control device according to claim 6, characterized in that, Both the bus signal input interface H and the bus signal output interface I are provided with interface flanges; the outer wall of the interface flange is provided with an interface sealing ring.

8. The multi-signal hardware interlock control device according to claim 5, characterized in that, An annular shielding groove is provided on the connecting surface between the left and right shells, and a shielding coil is provided in the shielding groove.

9. The multi-signal hardware interlock control device according to claim 8, characterized in that, The shielding coil is made of metallic silver.

10. The multi-signal hardware interlock control device according to claim 1, characterized in that, The shell is made of metal and is manufactured using 3D printing.

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