Direct current power supply link rapid cut-off circuit

Abstract

The utility model relates to a direct current power supply link rapid cut-off circuit, which is arranged between a direct current source and a load and comprises a plurality of switch modules and a control module, the direct current source, the switch modules and the load are sequentially connected in series to form a main loop, and the control ends of the switch modules are jointly connected with the output end of the control module. Therefore, the on-off of the main loop is controlled. According to the direct-current power supply link rapid cut-off circuit provided by the utility model, the plurality of switch modules are connected in series in the direct-current power supply link, and the control module controls the plurality of switch modules at the same time to realize rapid and safe connection or cut-off of the direct-current power supply link, so that the power supply voltage stress is shared by the plurality of switch modules; the voltage endurance capability of the whole circuit is improved, the service life of the whole circuit is prolonged, and the stability of the whole system is enhanced.

Description

Technical Field

[0001] This utility model relates to the field of power supply and distribution technology, specifically to a DC power supply link fast disconnection circuit. Background Technology

[0002] In a DC power supply link, current flows from the positive terminal to the negative terminal of the DC source, transmitting electrical energy through wires and electronic components along the way. In scenarios where a DC source powers a load, the switching speed of the power supply link can affect the circuit's lifespan and operating efficiency. To achieve fast DC link switching, some solutions utilize the fast turn-off characteristics of power transistors, connecting them in series as controllable switching devices in the DC circuit. However, a single switching element connected in series in a DC power supply link must withstand significant voltage stress, limiting the overall voltage withstand capability of the circuit.

[0003] Therefore, it is necessary to develop a solution that can safely and effectively cut off the DC power supply link, with strong voltage resistance. Utility Model Content

[0004] Based on the above description, this utility model provides a fast disconnection circuit for DC power supply links to solve the problems of low switching efficiency of on / off states and large voltage stress on switching devices in DC power supply links.

[0005] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: A DC power supply link fast disconnection circuit is set between the DC source and the load, including multiple switch modules and a control module. The DC source, multiple switch modules and the load are connected in series to form a main circuit. The control terminals of multiple switch modules are connected to the output terminal of the control module to control the on / off of the main circuit.

[0006] Based on the above technical solution, the present invention can be further improved as follows.

[0007] Furthermore, the multiple switching modules include a first switching module and a second switching module. The first switching module includes a first NMOS transistor Q1, and the second switching module includes a second NMOS transistor Q2. The drain of the first NMOS transistor Q1 is connected to the positive terminal of the DC source, and the source of the first NMOS transistor Q1 is connected to the source of the second NMOS transistor Q2. The drain of the second NMOS transistor Q2 is connected to the negative terminal of the DC source after being connected in series with a load Zo. The gates of the first NMOS transistor Q1 and the second NMOS transistor Q2 are both connected to the output terminal of the control module.

[0008] Furthermore, the first switching module also includes resistors R1 and R4. Resistor R1 is disposed between the gate and source of the first NMOS transistor Q1, and resistor R4 is disposed between the gate of the first NMOS transistor Q1 and the output terminal of the control module.

[0009] Furthermore, the first switching module also includes a Zener diode D1, a Zener diode D3, and a resistor R3. The cathode of the Zener diode D1 is connected to the source of the first NMOS transistor Q1, and the anode of the Zener diode D1 is connected to the gate of the first NMOS transistor Q1. The cathode of the Zener diode D3 is connected to the output terminal of the control module, and the anode of the Zener diode D3 is connected to the gate of the first NMOS transistor Q1 after being connected in series with the resistor R3.

[0010] Furthermore, the first switching module also includes a capacitor C1, which is disposed between the gate and source of the first NMOS transistor Q1.

[0011] Furthermore, the second switching module also includes resistors R2 and R5. Resistor R2 is disposed between the gate and source of the second NMOS transistor Q2, and resistor R5 is disposed between the gate of the second NMOS transistor Q2 and the output terminal of the control module.

[0012] Furthermore, the second switching module also includes a Zener diode D2, the cathode of which is connected to the source of the second NMOS transistor Q2, and the anode of which is connected to the gate of the second NMOS transistor Q2.

[0013] Furthermore, the second switching module also includes a capacitor C2, which is disposed between the gate and source of the second NMOS transistor Q2.

[0014] Furthermore, it also includes a diode D4, the cathode of which is connected to the source of the second NMOS transistor Q2, and the anode of which is connected to the negative terminal of the DC source.

[0015] Furthermore, the control module includes a NOR gate, a D flip-flop, and a gate driver. At least one input of the NOR gate is used to input a main circuit turn-off signal, and at least one input of the NOR gate is used to input a main circuit close-up signal. The output of the NOR gate is connected to the input of the D flip-flop, and the output of the D flip-flop is connected to the input of the gate driver. This is used to convert the main circuit turn-off signal or the main circuit close-up signal into a square wave signal to output a main circuit turn-off trigger signal or a main circuit close-up trigger signal. The output of the gate driver is connected to the control terminals of the first switch module and the second switch module, and is used to output the main circuit turn-off trigger signal or the main circuit close-up trigger signal after signal isolation.

[0016] Compared with the prior art, the technical solution of this application has the following beneficial technical effects: The DC power supply link fast disconnection circuit provided by this utility model connects multiple switching modules in series in the DC power supply link, and controls multiple switching modules simultaneously through the control module to achieve fast and safe connection or disconnection of the DC power supply link, thereby distributing the voltage stress to multiple switching modules, improving the overall voltage withstand capability and service life of the circuit, and helping to enhance the stability of the entire system. Attached Figure Description

[0017] Figure 1 A schematic diagram of a DC power supply link fast disconnection circuit topology provided for an embodiment of this utility model;

[0018] Figure 2 A block diagram of the control module provided in an embodiment of this utility model. Detailed Implementation

[0019] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0021] It is understood that spatial relation terms such as "below," "under," "below," "below," "above," "over," etc., can be used here to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as "below" or "under" or "below" of other elements or features will be oriented "over" of other elements or features. Therefore, the exemplary terms "below" and "under" can include both upper and lower orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0022] It should be noted that when one element is considered to be "connected" to another element, it can be directly connected to the other element or connected to the other element through an intermediary element. In the following embodiments, "connection" should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have the transmission of electrical signals or data between them.

[0023] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising,” “including,” or “having,” etc., specify the presence of the stated feature, whole, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof.

[0024] like Figure 1 The present embodiment provides a DC power supply link fast disconnection circuit, which is set between the DC source and the load. It includes multiple switching modules and a control module. The DC source, multiple switching modules and the load are connected in series to form a main circuit. The control terminals of multiple switching modules are connected to the output terminal of the control module to control the on / off state of the main circuit.

[0025] Understandably, the load can be a terminal device, and the DC source provides DC power to the load through the first and second switching modules. The first and second switching modules are synchronously controlled by the control module to achieve rapid and safe disconnection of the DC power supply link. The first and second switching modules share the voltage stress in the circuit, improving the overall voltage withstand performance of the circuit and extending its overall service life.

[0026] In one possible implementation, the control module includes a NOR gate, a D flip-flop, and a gate driver, such as Figure 2 As shown, there are two NOR gates. One NOR gate is used to input the overcurrent protection signal of the main circuit. That is, when the current in the main circuit exceeds the current threshold, it is immediately fed back to the control module through the NOR gate to decide whether to cut off the main circuit. This NOR gate is also used to input the main circuit shutdown signal transmitted through the optical fiber. The other NOR gate is used to input the reset signal input by the operator through the button, or the main circuit reset signal transmitted through the optical fiber, that is, to input the main circuit closure signal.

[0027] The NOR gate makes a decision based on the input signal, and its output is connected to the input of the D flip-flop, providing the decision result to the D flip-flop. The D flip-flop generates a trigger signal (e.g., a square wave signal) based on the received signal to output a main circuit turn-off trigger signal or a main circuit close trigger signal. To improve the overall safety of the circuit operation, the gate driver isolates the main circuit turn-off trigger signal or the main circuit close trigger signal before outputting it to drive the first switching module and the second switching module to perform corresponding actions.

[0028] Understandably, once a disconnect command transmitted via fiber optic cable is detected, or a current exceeding a preset value due to a load short circuit is detected, the D-type flip-flop will quickly capture and lock this signal. Then, the control command issued by the D-type flip-flop is sent to the gate driver. The gate driver adjusts the control terminal voltages of the first and second switching modules according to the received command, such as the gate voltages of the MOS transistors in the first and second switching modules. Specifically, the gate driver lowers the gate voltage of the MOS transistor, causing the transistor to turn off, interrupting the current flow in the main circuit, and achieving a rapid disconnection operation of the DC power supply link.

[0029] Conversely, when the system receives a restart command transmitted via fiber optic cable or triggered by a button, the D-type flip-flop will clear the previously locked signal state. The cleared D-type flip-flop will output an initial control command, which, through the gate driver, returns the first and second switching modules to the ON state. For example, it returns the gate voltage of the MOS transistors in the first and second switching modules to a high level, causing the transistors to turn on again, restoring current flow in the DC control device, and realizing the restart and closure functions of the control device.

[0030] In one possible implementation, the multiple switching modules include a first switching module and a second switching module. The first switching module includes a first NMOS transistor Q1, and the second switching module includes a second NMOS transistor Q2. The drain of the first NMOS transistor Q1 is connected to the positive terminal of a DC source, and the source of the first NMOS transistor Q1 is connected to the source of the second NMOS transistor Q2. The drain of the second NMOS transistor Q2 is connected to the negative terminal of a DC source after being connected in series with a load Zo. The gates of the first NMOS transistor Q1 and the second NMOS transistor Q2 are both connected to the output terminal of the control module.

[0031] It is understood that in this embodiment, the first NMOS transistor Q1 and the second NMOS transistor Q2 are connected in reverse series and configured with a common source. The drain of the first NMOS transistor Q1 is connected to the positive terminal of the DC source, and its source is connected to the source of the second NMOS transistor Q2. The drain of the second NMOS transistor Q2 is connected to the positive terminal of the load, and its source is connected to the source of the first NMOS transistor Q1. The gates of the first NMOS transistor Q1 and the second NMOS transistor Q2 are both connected to the output terminal of the gate driver.

[0032] Since the first NMOS transistor Q1 and the second NMOS transistor Q2 are connected in reverse series, when the circuit is turned on, the power supply voltage is shared by the first NMOS transistor Q1 and the second NMOS transistor Q2, which effectively reduces the voltage stress on a single transistor and improves the voltage withstand capability of the entire circuit.

[0033] In an NMOS transistor, the on-current is related to the gate voltage and the drain-source voltage. When the first NMOS transistor Q1 and the second NMOS transistor Q2 are connected in reverse series, their drain-source voltages cancel each other out, resulting in a lower drain-source voltage for each transistor. This improves the transistor's turn-on capability because, at a lower drain-source voltage, the transistor is more likely to enter the saturation region, thus achieving a larger on-current.

[0034] The following is a detailed explanation of how the voltage signal output by the gate driver controls the on and off states of the first NMOS transistor Q1 and the second NMOS transistor Q2.

[0035] (1) On state:

[0036] When the gate driver outputs a high level (i.e., the main circuit closing trigger signal), the gate voltage of the first NMOS transistor Q1 and the second NMOS transistor Q2 is positive relative to the source voltage.

[0037] For the first NMOS transistor Q1, the gate voltage is positive, the drain voltage is the positive DC source voltage, and the source voltage is the source voltage of the second NMOS transistor Q2. Since the gate voltage of the first NMOS transistor Q1 is positive, an electron accumulation layer is induced on the surface of the semiconductor material of the first NMOS transistor Q1, forming a conductive channel, and the first NMOS transistor Q1 is turned on.

[0038] For the second NMOS transistor Q2, the gate voltage is positive, the drain voltage is the positive load voltage, and the source voltage is the source voltage of the first NMOS transistor Q1. Similarly, since the gate voltage of the second NMOS transistor Q2 is positive, an electron accumulation layer is induced on the surface of the semiconductor material of the second NMOS transistor Q2, forming a conductive channel, and the second NMOS transistor Q2 is turned on.

[0039] At this time, the positive terminal of the power supply supplies power to the load through the conductive channels of the first NMOS transistor Q1 and the second NMOS transistor Q2, and the main circuit is in the conducting state.

[0040] (2) Cutoff status:

[0041] When the gate driver outputs a low level (i.e., the main circuit turn-off trigger signal), the gate voltage of the first NMOS transistor Q1 and the second NMOS transistor Q2 is zero or negative relative to the source voltage.

[0042] For the first NMOS transistor Q1, when its gate voltage is zero or negative, the electron accumulation layer on the surface of the semiconductor material disappears, the conductive channel is closed, and the first NMOS transistor Q1 is turned off.

[0043] For the second NMOS transistor Q2, when its gate voltage is zero or negative, the electron accumulation layer on the surface of the semiconductor material disappears, the conductive channel is closed, and the second NMOS transistor Q2 is turned off.

[0044] At this time, the current path between the positive terminal of the power supply and the load is cut off, the main circuit is in a cut-off state, and the load is de-energized.

[0045] Since both the first NMOS transistor Q1 and the second NMOS transistor Q2 have body diodes, and the two body diodes are connected in reverse series, the circuit in this embodiment also has a built-in reverse protection function.

[0046] In one possible implementation, the first switching module further includes resistors R1 and R4. Resistor R1 is disposed between the gate and source of the first NMOS transistor Q1, acting as a voltage divider to maintain a stable voltage difference (U) between the gate and source of the first NMOS transistor Q1. G >U S This improves the conduction stability of the first switching module. The resistor R4 is located between the gate of the first NMOS transistor Q1 and the output terminal of the control module, and is used to provide current limiting protection for the gate of the first NMOS transistor Q1.

[0047] In one possible implementation, the first switching module further includes a Zener diode D1, a Zener diode D3, and a resistor R3. The cathode of the Zener diode D1 is connected to the source of the first NMOS transistor Q1, and the anode of the Zener diode D1 is connected to the gate of the first NMOS transistor Q1. The cathode of the Zener diode D3 is connected to the output terminal of the control module, and the anode of the Zener diode D3 is connected to the gate of the first NMOS transistor Q1 after being connected in series with the resistor R3.

[0048] Understandably, resistor R3 is used for current limiting protection. Zener diode D1 is used to maintain the voltage stability between the gate and source of the first NMOS transistor Q1, and Zener diode D3 is used to maintain the voltage stability between the gate of the first NMOS transistor Q1 and the gate driver of the control module, thus improving the overall circuit stability. The combination of Zener diodes D1 and D3 also provides transient suppression.

[0049] In one possible implementation, the first switching module further includes a capacitor C1, which is disposed between the gate and source of the first NMOS transistor Q1 to filter out the spikes at the moment the first NMOS transistor Q1 is turned on, so as to make the main circuit output smoother.

[0050] In one possible implementation, the second switching module further includes resistors R2 and R5. Resistors R2 and R5 function similarly in the second switching module to resistors R1 and R4 in the first switching module, providing voltage division and current limiting protection. Resistor R2 is positioned between the gate and source of the second NMOS transistor Q2 to maintain a stable gate-source voltage, thus improving the stability of the second switching module. Resistor R5 is positioned between the gate of the second NMOS transistor Q2 and the output terminal of the control module to provide current limiting protection for the gate of the second NMOS transistor Q2, protecting the gate drive module.

[0051] In one possible implementation, the second switching module further includes a Zener diode D2, the cathode of which is connected to the source of the second NMOS transistor Q2, and the anode of which is connected to the gate of the second NMOS transistor Q2. A Zener diode D3 is used to maintain voltage stability between the gate and source of the second NMOS transistor Q2.

[0052] In one possible implementation, the second switching module further includes a capacitor C2, which is disposed between the gate and source of the second NMOS transistor Q2 to filter out the spikes during the turn-on of the second NMOS transistor Q2, making the main circuit output smoother.

[0053] In one possible implementation, a diode D4 is further included, the cathode of which is connected to the source of the second NMOS transistor Q2, and the anode of which is connected to the negative terminal of the DC source. Diode D4 is connected in parallel with the load and is reverse biased.

[0054] Understandably, when the load is inductive, the inductive load stores electrical energy as magnetic field energy when forward current flows through it. However, at the moment of power failure, a high reverse induced voltage is generated across the inductor (inductive load), and it seeks the shortest path to discharge the current. This can lead to arcing, interference with circuit components, or even breakdown. Connecting diode D4 in reverse parallel across the inductive load creates a discharge path for the load, discharging this induced current and protecting other components in the circuit from damage.

[0055] This invention provides a DC power supply link fast disconnection circuit. By connecting the first NMOS transistor Q1 in the first switching module and the second NMOS transistor Q2 in the second switching module in reverse series in the DC power supply link, and controlling the two switching modules simultaneously through a control module, the DC power supply link can be quickly and safely connected or disconnected. This distributes voltage stress across multiple switching modules, improving the overall voltage withstand capability and lifespan of the circuit, and contributing to enhanced system stability and voltage tolerance. Furthermore, if any one of the switching modules fails, the main circuit will not conduct, improving the safety of the main circuit control.

[0056] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A fast disconnect circuit for a DC power link, disposed between a DC source and a load, characterized by, The application relates to a DC power supply control circuit, which comprises a plurality of switch modules and a control module, wherein the DC power supply, the plurality of switch modules and a load are sequentially connected in series to form a main circuit, the control ends of the plurality of switch modules are connected to the output end of the control module to control the on-off of the main circuit. The plurality of switch modules comprise a first switch module and a second switch module, the first switch module comprises a first NMOS tube Q1, a resistor R1, a resistor R4, a stabilizing diode D1, a stabilizing diode D3 and a resistor R3, the second switch module comprises a second NMOS tube Q2, the drain of the first NMOS tube Q1 is connected to the positive pole of the DC power supply, the source of the first NMOS tube Q1 is connected to the source of the second NMOS tube Q2, the drain of the second NMOS tube Q2 is connected to the negative pole of the DC power supply after being connected in series with the load Zo, the gate of the first NMOS tube Q1 and the gate of the second NMOS tube Q2 are both connected to the output end of the control module. The resistor R1 is arranged between the gate and the source of the first NMOS tube Q1, and the resistor R4 is arranged between the gate of the first NMOS tube Q1 and the output end of the control module. The cathode of the stabilizing diode D1 is connected to the source of the first NMOS tube Q1, the anode of the stabilizing diode D1 is connected to the gate of the first NMOS tube Q1, the cathode of the stabilizing diode D3 is connected to the output end of the control module, and the anode of the stabilizing diode D3 is connected to the gate of the first NMOS tube Q1 after being connected in series with the resistor R3.

2. The fast DC link disconnect circuit of claim 1, wherein, The first switch module further comprises a capacitor C1, and the capacitor C1 is arranged between the gate and the source of the first NMOS tube Q1.

3. The fast cut-off circuit for DC power supply link according to any one of claims 1-2, characterized in that, The second switch module further comprises a resistor R2 and a resistor R5, the resistor R2 is arranged between the gate and the source of the second NMOS tube Q2, and the resistor R5 is arranged between the gate of the second NMOS tube Q2 and the output end of the control module.

4. The fast DC link disconnect circuit of claim 3, wherein, The second switch module further comprises a stabilizing diode D2, the cathode of the stabilizing diode D2 is connected to the source of the second NMOS tube Q2, and the anode of the stabilizing diode D2 is connected to the gate of the second NMOS tube Q2.

5. The fast DC link disconnect circuit of claim 4, wherein, The second switch module further comprises a capacitor C2, and the capacitor C2 is arranged between the gate and the source of the second NMOS tube Q2.

6. The fast DC link disconnect circuit of claim 1, wherein, The control module further comprises an NMOS tube, a D flip-flop and a gate driver, the input end of at least one of the NMOS tubes is used for inputting a main circuit closing signal, the input end of at least one of the NMOS tubes is used for inputting a main circuit closing signal, the output end of the NMOS tube is connected to the input end of the D flip-flop, the output end of the D flip-flop is connected to the input end of the gate driver, and the main circuit closing signal or the main circuit closing signal is converted into a main circuit closing trigger signal or a main circuit closing trigger signal, the output end of the gate driver is connected to the control end of the first switch module and the control end of the second switch module, and the main circuit closing trigger signal or the main circuit closing trigger signal is outputted after being signal-isolated.

7. The fast DC link disconnect circuit of claim 1, wherein: ​

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