Driving power supply circuit and device for dynamic display screen of metro vehicle

Abstract

The utility model provides a driving power supply circuit and device for a dynamic display screen of a metro vehicle, and relates to the field of industrial power supplies. The circuit comprises an input module, a direct current-direct current conversion module and an output control module which are sequentially connected in series, and further comprises a processor module, and the three modules are all connected with the processor module. The input module comprises an alternating current input terminal, a direct current input terminal and a power management chip unit, and an external alternating current or direct current signal is converted into a first voltage through the power management chip unit after being accessed; the DC-DC conversion module adopts a high-voltage isolation circuit structure and is used for converting the first voltage into a second voltage; the processor module adopts an ARM processing chip, and controls the voltage output of the DC-DC conversion circuit through a PWM mode; the output control module is used for being connected with an external display screen and driving the DC-DC conversion module to output the second voltage. According to the scheme, the stability and the anti-interference capability of the circuit can be improved while compatible input of alternating current and direct current is realized.

Description

Technical Field

[0001] This application relates to the field of industrial power supplies, and more specifically, to a driving power supply circuit and device for a dynamic display screen on subway vehicles. Background Technology

[0002] In the rail transit sector, the dynamic display screens on subway vehicles serve as the core carrier for passengers to obtain train operation information, and their stable operation relies on high-performance drive power supplies. As the subway operating environment becomes more complex (such as strong vibrations and high electromagnetic interference), the drive power supplies need to have stronger environmental adaptability and dynamic response capabilities.

[0003] Currently, mainstream drive power supplies adopt traditional AC / DC or DC / DC conversion architectures, which have the following technical bottlenecks: Existing power supplies typically only support a single input standard (such as AC220V or DC110V), and cannot adapt to the power supply environment of subway vehicles with multiple voltage standards coexisting. When the vehicle's power supply standard is switched, the power module needs to be replaced, increasing maintenance costs and the risk of failure. Furthermore, due to the complex operating environment of the subway, with factors such as vibration and electromagnetic interference, some traditional drive power supplies have poor stability. Ordinary power supplies are prone to voltage fluctuations, which in turn affect the display effect of the dynamic display screen, causing screen flickering and color distortion. Some trains frequently experience such display abnormalities. Utility Model Content

[0004] To address the aforementioned issues, this application provides a driving power supply circuit and device for a dynamic display screen on subway vehicles, which can improve circuit stability and anti-interference capabilities while achieving compatible AC and DC inputs.

[0005] This application is implemented as follows:

[0006] In a first aspect, this application provides a driving power supply circuit for a dynamic display screen on a subway vehicle, comprising an input module, a DC-DC converter module, and an output control module connected in series, and a processor module. The input module, DC-DC converter module, and output control module are all connected to the processor module. The input module includes an AC input terminal, a DC input terminal, and a power management chip unit. External AC signals received from the AC input terminal and / or external DC signals received from the DC input terminal are converted into a first voltage by the power management chip unit. The DC-DC converter module employs a high-voltage isolation circuit structure to convert the first voltage into a second voltage. The processor module uses an ARM processing chip to control the voltage output of the DC-DC converter circuit via PWM mode. The output control module is used to connect to an external display screen and to drive the second voltage output by the DC-DC converter module.

[0007] Secondly, this application provides a driving power supply device for a dynamic display screen for subway vehicles, which includes a driving power supply circuit for any of the dynamic display screens for subway vehicles as described in the first aspect.

[0008] Compared with the prior art, this application has at least the following advantages or beneficial effects:

[0009] This application provides a driving power supply circuit for a dynamic display screen in a subway vehicle. The design of its input module makes the driving power supply circuit and device compatible with multiple input power standards, such as the AC 220V and DC 110V power supplies provided by the subway vehicle. This solves the problem that existing driving power supplies only support a single input standard, avoiding the need to replace power modules, reducing maintenance costs and failure risks, and improving adaptability in complex power supply environments. Simultaneously, the DC-DC conversion module adopts a high-voltage isolation circuit structure to isolate the input and output electrical connections, reducing the impact of external interference and noise on voltage conversion. In the complex operating environment of the subway (vibration, electromagnetic interference, etc.), it significantly improves circuit stability and anti-interference capabilities, ensuring stable voltage output to the dynamic display screen, avoiding screen flicker and color distortion, and improving display effects. Furthermore, the processor module uses an ARM processing chip to precisely control the DC-DC conversion circuit voltage output through PWM mode. It can adjust the output voltage in real time according to different operating states and displayed content of the dynamic display screen, improving output stability and dynamic response capabilities, ensuring normal operation of the display screen, and enhancing the passenger visual experience. Attached Figure Description

[0010] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 This is a circuit block diagram of an embodiment of the driving power supply circuit for a dynamic display screen of a subway vehicle according to this application.

[0012] Figure 2 This is a schematic diagram of the circuit principle of the processing module in one embodiment of the driving power supply circuit for a dynamic display screen of a subway vehicle according to this application.

[0013] Figure 3A and Figure 3B This is a schematic diagram of the circuit principle of the input module in one embodiment of the driving power supply circuit for a dynamic display screen of a subway vehicle according to this application.

[0014] Figure 4A , Figure 4B and Figure 4CThis is a schematic diagram of the DC-DC converter module in one embodiment of the driving power supply circuit for a dynamic display screen of a subway vehicle according to this application.

[0015] Figure 5 This is a schematic diagram of the output control module in one embodiment of the driving power supply circuit for a dynamic display screen for subway vehicles according to this application. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0017] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0018] Example:

[0019] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the various embodiments and features described below can be combined with each other.

[0020] Please refer to Figure 1 The driving power supply circuit for a dynamic display screen on a subway vehicle includes an input module, a DC-DC converter module, and an output control module connected in series, and also includes a processor module. The input module, DC-DC converter module, and output control module are all connected to the processor module. The input module includes an AC input terminal, a DC input terminal, and a power management chip unit. External AC signals received from the AC input terminal and / or external DC signals received from the DC input terminal are converted into a first voltage by the power management chip unit. The DC-DC converter module employs a high-voltage isolation circuit structure to convert the first voltage into a second voltage. The processor module uses an ARM processing chip to control the voltage output of the DC-DC converter circuit via PWM mode. The output control module is used to connect to an external display screen and to drive the second voltage output by the DC-DC converter module.

[0021] In the above embodiments, the input module includes AC input terminals, DC input terminals, and a power management chip unit. The AC input terminals are used to connect to external AC power signals (typically 220V AC), and the DC input terminals are used to connect to external DC power signals (typically 110V DC). Regardless of whether the input signal is AC or DC, the power management chip unit detects and processes it, converting it into a unified first voltage. This design allows the drive power circuit to adapt to various input power standards, improving the power supply's versatility and adaptability. The DC-DC converter module employs a high-voltage isolation circuit structure, whose main function is to further convert the first voltage converted by the input module into a second voltage suitable for the dynamic display screen. The high-voltage isolation circuit structure effectively isolates the electrical connection between the input and output, reducing interference and noise transmission, and improving the stability and accuracy of voltage conversion. The processor module uses an ARM processing chip, possessing powerful computing and processing capabilities. It controls the voltage output of the DC-DC converter circuit through PWM (Pulse Width Modulation) mode. PWM mode is a highly efficient voltage regulation method. The processor module can precisely adjust the duty cycle of the PWM signal according to the actual needs of the dynamic display screen and the preset algorithm, thereby achieving precise control of the voltage output of the DC-DC converter circuit. The output control module is mainly used to connect to the external display screen. It receives the second voltage output from the DC-DC converter module, amplifies it, and drives it to meet the power requirements of the dynamic display screen. At the same time, the output control module can also monitor and provide feedback on the output voltage and current to ensure that the voltage and current output to the dynamic display screen are within the normal range.

[0022] In other words, the input module design enables the drive power supply circuit and device to be compatible with multiple input power standards, effectively utilizing both AC 220V and DC 110V power supplies provided by subway vehicles. This solves the problem of existing drive power supplies supporting only a single input standard, avoiding the hassle of replacing power modules due to power supply standard switching, reducing maintenance costs and failure risks, and improving the adaptability of the power circuit in the complex power supply environment of subway vehicles. Simultaneously, the DC-DC converter module adopts a high-voltage isolation circuit structure, effectively isolating the electrical connection between input and output, reducing the impact of external interference and noise on the voltage conversion process. In the complex operating environment of the subway, factors such as vibration and electromagnetic interference exist. This design significantly improves the circuit's stability and anti-interference capability, ensuring a stable and reliable voltage output to the dynamic display screen, avoiding problems such as screen flickering and color distortion caused by voltage fluctuations, and improving the display effect of the dynamic display screen. Furthermore, the processor module uses an ARM processing chip and controls the voltage output of the DC-DC converter circuit through PWM mode, enabling precise adjustment of the voltage output. Depending on the different operating states and display content of the dynamic display screen, the processor module can adjust the output voltage in real time, improving output stability and dynamic response capability. This ensures the dynamic display screen receives a suitable voltage supply under various conditions, guaranteeing its normal operation and enhancing the passenger's visual experience. Furthermore, the output control module accurately and reliably outputs a stable secondary voltage to the dynamic display screen, providing sufficient driving capability. Simultaneously, by monitoring and providing feedback on the output voltage and current, abnormal situations can be detected and addressed promptly, ensuring the dynamic display screen is always in good working order, reducing display malfunctions caused by power supply issues, and improving the reliability and stability of the dynamic display screens in subway vehicles.

[0023] In summary, the above embodiments optimize the circuit topology, thereby improving the stability and anti-interference capability of the circuit while achieving AC and DC compatible input, thus providing stable and reliable power support for the dynamic display screen of subway vehicles.

[0024] For example, in some implementations of this application, the power management chip unit includes a power management chip of model NCP1271D65R2G. It should be noted that the NCP1271D65R2G power management chip is a high-performance current-mode PWM controller. In the input module, the NCP1271D65R2G is responsible for uniformly converting AC or DC input signals into a stable first voltage (typically 12VDC).

[0025] For example, in some implementations of this application, the ARM processing chip is model NT68168BTG. It should be noted that the NT68168BTG ARM processing chip has high-performance processing capabilities, enabling it to quickly respond to and process various input signals and control commands. This allows the drive power supply circuit to adjust the output voltage in real time, meeting the needs of the dynamic display screen under different operating states, improving display effects and user experience. Furthermore, through PWM mode, the NT68168BTG chip can achieve precise control of the voltage output of the DC-DC converter circuit. This precise control helps reduce voltage fluctuations and noise interference, ensuring a stable and reliable voltage output to the dynamic display screen, and avoiding problems such as screen flickering and color distortion caused by voltage instability.

[0026] Based on the aforementioned scheme, in some implementations of this application, the processor module includes an NT68168BTG chip U26, a terminal block P10, a crystal oscillator Y1, a fuse A30, a transistor Q10, resistors R25, R26, R23, R20, R22, R21, R27, R44, R42, R39, R36, R35, R40, and an electrical... Resistors R41, R43, R38, R28, R29, R30, R31, R34, R37, and capacitors C31, C29, C25, C20, C21, C22, C32, C13, C12, C23, C71, C24, C26, C28, C30, C33, and C35. Specifically, pin 51 of chip U26 is connected to external power supply VCC1 via fuse A30; pin 55 of chip U26 is connected to pin 56 via resistors R25 and R26; pin 55 of chip U26 is connected to terminal 10 of terminal block P10; pin 56 of chip U26 is connected to terminal 7 of terminal block P10; the common terminal of resistors R25 and R26 is connected to external power supply VCC1; pin 53 of chip U26 is connected to pin 52 via resistors R23 and R20; pin 53 of chip U26 is connected to resistor R22; pin 52 of chip U26 is connected to resistor R21; pin 59 of chip U26 is connected to terminal 5 of terminal block P10; and pin 59 of chip U26 is connected to terminal 5 of terminal block P10. The U26 chip is grounded via the series-connected capacitor C25 and resistor R39. Pin 8 of the U26 chip is grounded via the series-connected capacitor C29 and resistor R42. Pin 10 of the U26 chip is grounded via the series-connected capacitor C31 and resistor R44. Pin 63 of the U26 chip is connected to pin 64 of the U26 chip via resistor R27. Pin 63 of the U26 chip is grounded via capacitor C20. Pin 64 of the U26 chip is grounded via capacitor C21. The crystal oscillator Y1 is connected in parallel with resistor R27. Pin 50 of the U26 chip is grounded. Pin 2 of the U26 chip is connected to pin 50 of the U26 chip via capacitor C23. Pin 26 of the U26 chip is connected to pin 50 of the U26 chip via capacitor C12. Pin 18 of the U26 chip is connected to the external power supply VCC1 via resistor R37.Pin 18 of the U26 chip is connected to the collector of the transistor Q10. Pin 18 of the U26 chip is connected to the emitter of the transistor Q10 through capacitor C35. The base of the transistor Q10 is connected to an external power supply VCC1. The base of the transistor Q10 is grounded through capacitors C22, C32, and C13 connected in parallel. Pin 1 of the U26 chip is connected to pin 23 through resistor R34. Pin 1 of the U26 chip is connected to pin 27 through resistor R31. Pin 1 of the U26 chip is connected to pin 28 through resistor R30. Pin 4 of the U26 chip is grounded through capacitor C24 and resistor R38 connected in series. Pin 6 of the U26 chip is grounded through capacitor C26 and resistor R40 connected in series. Pin 4 of chip U26 is grounded via capacitor C28 and resistor R41 connected in series. Pin 4 of chip U26 is also grounded via capacitor C30 and resistor R43 connected in series. Pin 16 of chip U26 is connected to terminal 3 of terminal block P10. Pin 17 of chip U26 is connected to terminal 1 of terminal block P10. Pin 19 of chip U26 is connected to terminal 7 of terminal block P10. Pin 20 of chip U26 is connected to terminal 6 of terminal block P10. Pin 15 of chip U26 is connected to terminal 4 of terminal block P10 via resistor R36. Pin 14 of chip U26 is connected to terminal 2 of terminal block P10 via resistor R35. Pin 15 of chip U26 is grounded via capacitor C71. Pin 15 of chip U26 is also grounded via capacitor C33.

[0027] In the above implementation, pin 51 of chip U26 is connected to the external power supply VCC1 via fuse A30. This design allows fuse A30 to promptly cut off the power supply in case of short circuits or other abnormal conditions, protecting chip U26 from damage. Pin 55 of chip U26 is connected to pin 56 via resistors R25 and R26 in sequence. Pin 55 is also connected to terminal 10 of terminal block P10, and pin 56 is connected to terminal 7 of terminal block P10. The common terminal of resistors R25 and R26 is connected to the external power supply VCC1. This connection method can form a specific feedback or signal transmission network. Similarly, pin 53 is connected to pin 52 via resistors R23 and R20 in sequence. Pin 53 is connected to resistor R22, and pin 52 is connected to resistor R21. This combination of resistors can achieve voltage division and current limiting functions to meet the signal level requirements of different pins of the chip. Multiple pins of chip U26 are grounded via series capacitors and resistors. For example, pin 5 is grounded via series capacitor C25 and resistor R39, pin 8 via series capacitor C29 and resistor R42, and pin 10 via series capacitor C31 and resistor R44. This grounding and filtering design effectively filters out high-frequency noise and interference signals in the circuit, ensuring the stability of the chip's operation. Pin 63 is connected to pin 64 via resistor R27. Pin 63 is also grounded via capacitor C20, and pin 64 is grounded via capacitor C21. Crystal oscillator Y1 is connected in parallel with resistor R27. Crystal oscillator Y1 provides a stable clock signal to the chip, while capacitors C20 and C21 filter and stabilize the clock signal, ensuring the chip operates accurately according to the clock cycle. Pin 18 of chip U26 is connected to the external power supply VCC1 via resistor R37, and also to the collector of transistor Q10. Pin 18 is further connected to the emitter of transistor Q10 via capacitor C35. The base of transistor Q10 is connected to the external power supply VCC1, and the base is grounded through three capacitors connected in parallel: C22, C32, and C13. This circuit design enables power control and reset functions for the chip. When a circuit malfunctions, the power supply to the chip can be cut off or restored by controlling the conduction and cutoff of transistor Q10. Multiple pins of chip U26 are interconnected via resistors. For example, pin 1 is connected to pin 23 via resistor R34, pin 1 is connected to pin 27 via resistor R31, and pin 1 is connected to pin 28 via resistor R30. These resistors can be used to configure the chip's internal registers or to implement corresponding signal transmission functions.

[0028] It should be noted that terminals 7 and 10 of terminal block P10 are connected to the subsequent output control module. Terminal 7 of terminal block P10 is connected to the input module to control its enable. Terminals 2 and 4 of terminal block P10 are connected to the DC-DC converter module to enable it. Terminal 9 of terminal block P10 is used to control the cooling fan. Figure 2 BL and ADJ in the diagram represent the signals input to the temperature sampling resistor.

[0029] Based on the aforementioned scheme, in some implementations of this application, the input module includes a voltage reference chip U10, a power management chip U1 of model NCP1271D65R2G, a fuse F1, a transformer T1, a common mode inductor L2, a common mode inductor L3, MOSFETs Q1, Q2, and Q5, transistors Q2, Q3, and Q4, a terminal block J1, a terminal block JP1, diodes D1, D3, D4, D5, and D12, a rectifier diode D2, Zener diodes ZL1, ZL2, and ZL3, a varistor RV2, and resistors R3, R4, R16, R18, and R1... 1. Resistors R20, R21, R10, R24, R25, R23, R13, R28, R5, R9, R68, R1, R67, R69, R70, R66, R65, R64, R6, R71, R72, R73, R74, R63, R2, R12, R14; Capacitors C1, C13, C8, C9, C2, C16, C17, C14, C18, C12, C39; Capacitors CX1, CX2, CY1, and CY2. In this configuration, terminal 1 of terminal block JP1 is connected to terminal 1 of terminal block J1, terminal 2 of terminal block JP1 is connected to terminal 4 of terminal block J1, terminal 1 of terminal block JP1 is connected to terminal 4 of terminal block J1 via resistors R2 and R12 connected in series, terminal 1 of terminal block JP1 is connected to terminal 4 of terminal block J1 via fuse F1 and varistor RV2 connected in series, terminal 4 of terminal block J1 is connected to terminal 2 of common mode inductor L2, and the common terminal of fuse F1 and varistor RV2 is connected via... The diodes D1 and D5, connected in parallel, are connected to terminal 1 of the common-mode inductor L2. The common terminal of the fuse F1 and the varistor RV2 is also connected to terminal 2 of the common-mode inductor L2 through the capacitor CX1. Terminal 4 of the common-mode inductor L2 is connected to terminal 3 of the common-mode inductor L2 through the capacitors CY1 and CY2 connected in series. Terminal 4 of the common-mode inductor L2 is connected to terminal 1 of the common-mode inductor L3. Terminal 3 of the common-mode inductor L2 is connected to terminal 2 of the common-mode inductor L3. Terminal 4 of the common-mode inductor L2 is connected to terminal 3 of the common-mode inductor L2 through the capacitor CX2.Terminal 3 of the common-mode inductor L3 is connected to the drain of the MOSFET Q5 through resistor R63. Terminal 3 of the common-mode inductor L3 is connected to the source of the MOSFET Q5. Terminal 4 of the common-mode inductor L3 is connected to the gate of the MOSFET Q5 through resistors R71 and R72 connected in series. The gate of the MOSFET Q5 is connected to the source of the MOSFET Q5 through Zener diode ZL3. The gate of the MOSFET Q5 is connected to the anode of diode D12. The gate of the MOSFET Q5 is connected to the base of transistor Q4. The gate of the MOSFET Q5 is connected to the cathode of diode D12 through resistors R74, capacitor C39, and resistor R73 connected in series. The emitter of transistor Q4 is connected to the cathode of diode D12. The collector of transistor Q4 is connected to the common terminal of capacitor C39 and resistor R73. Pins 8, 9, and 7 of the transformer T1 are connected together and then connected to terminal 4 of the common-mode inductor L3 via capacitor C16. Pin 8 of the transformer T1 is connected to pin 9 of the transformer T1 via rectifier diode D2, capacitor C1, and resistor R3. Resistors R3 and R4 are connected in parallel. The common terminal of rectifier diode D2 and capacitor C1 is connected to the source of MOSFET Q1. The source of MOSFET Q1 is connected to the gate of MOSFET Q1 via resistor R16. The gate of MOSFET Q1 is connected to terminal 9 of terminal block P10 via resistor R18. The drain of transistor Q1 is connected to pin 8 of transformer T1. Pin 1 of transformer T1 is connected to pin 2 of transformer T1. Pin 3 of transformer T1 is connected to pin 4 of transformer T1. Pin 1 of transformer T1 is connected to the anode of diode D3. Pin 3 of transformer T1 is connected to terminal 4 of common-mode inductor L3. Pin 6 of transformer T1 is connected to terminal 4 of common-mode inductor L3 through capacitor C2. The cathode of diode D3 is connected to terminal 4 of common-mode inductor L3 through capacitor C3 and resistor R1 connected in parallel. Pin 5 of transformer T1 is connected to the anode of diode D4.Pin 7 of the power management chip U1 is connected to terminal 4 of the common-mode inductor L3. Pin 7 of the power management chip U1 is connected to the cathode of the diode D4 through the resistor R11. The capacitor C13 is connected in parallel with the diode D4. Pin 6 of the power management chip U1 is grounded through the parallel capacitors C9 and C8. Pin 5 of the power management chip U1 is connected to the source of the MOSFET Q2 through the resistor R20. The drain of the MOSFET Q2 is connected to the anode of the diode D3. The gate of the MOSFET Q2 is connected to the source of the MOSFET Q2 through the resistor R21. The gate of the MOSFET Q2 is grounded through the parallel resistors R24 and R25. The gate of the MOSFET Q2 is connected to pin 3 of the power management chip U1 through the resistor R23. Pin 3 of the power management chip U1 is grounded through the capacitor C17. Pin 3 of the power management chip U1 is connected to terminal 4 of the common mode inductor L3 through resistors R13, R9, and R5 in sequence. Pin 1 of the power management chip U1 is grounded through the parallel resistors R14 and C14. Pin 2 of the power management chip U1 is connected to the collector of the transistor Q3. The collector of transistor Q3 is connected to the base of transistor Q3 via resistor R28, capacitor C18, and resistor R68 connected in series. The base of transistor Q3 is connected to the common terminal of capacitor C18 and resistor R68 via Zener diode ZL1 and Zener diode ZL2 connected in series. Pin 1 of voltage reference chip U10 is connected to pin 3 of voltage reference chip U10 via Zener diode ZL2. Pin 2 of voltage reference chip U10 is connected to pin 3 of voltage reference chip U10 via capacitor C12, resistor R69, and resistor R70 connected in parallel. Pin 2 of voltage reference chip U10 is connected to terminal 4 of common mode inductor L3 via resistor R67 and resistor R66 connected in series. Pin 1 of voltage reference chip U10 is connected to terminal 4 of common mode inductor L3 via resistor R65 and resistor R64 connected in parallel.

[0030] In the above implementation, the NCP1271D65R2G power management chip U1 is used as the core, and AC220V / DC110V compatible input and efficient conversion are achieved through multi-dimensional circuit design. Specifically, terminal blocks J1 and JP1 support AC / DC dual input modes (such as AC220V or DC110V), and signal path switching is achieved through terminal interconnection. Fuse F1 and varistor RV2 form an overcurrent-overvoltage dual protection network. Fuse F1 blows when the input current exceeds the limit, and varistor RV2 absorbs transient high voltage (such as lightning strikes or power grid surges) to protect the downstream circuit. Common mode inductors L2 and L3, along with capacitors CX1, CX2, CY1, and CY2, form a two-stage EMI filter network to filter out common mode noise in the input signal (such as high-frequency harmonics generated by subway traction motors) and reduce conducted interference. Capacitors CX1 and CY2 are connected between the input line and ground to suppress differential-mode and common-mode noise, ensuring the purity of the input signal. Rectifier diodes D1 and D5 convert the AC input signal into pulsating DC, and work with capacitors C1 and C2 for primary filtering. MOSFETs Q1, Q2, and Q5 act as switching elements, controlled by the power management chip U1, to adjust the input current path and achieve wide voltage input adaptation. The power management chip U1 (NCP1271D65R2G) receives feedback signals from the resistor divider network (resistors R13 and R5) via pin 3, dynamically adjusting the gate drive signal of MOSFET Q2 (via resistors R23 and R21) to maintain stable output voltage. The voltage reference chip U10 provides a high-precision reference voltage (e.g., 2.5V), forming a reference source circuit with resistors R64 and R70, capacitor C12, etc., to ensure the control accuracy of the voltage regulation loop. Transformer T1 employs a multi-winding design to achieve electrical isolation between input and output (withstand voltage ≥3kV) and block common-mode interference conduction. The LLC resonant network, consisting of capacitor C16, transformer leakage inductance, and magnetizing inductance, forms a resonant cavity. Zero-voltage switching (ZVS) technology reduces switching losses and improves conversion efficiency. Transistors Q3 and Q4, along with Zener diodes ZL1, ZL2, and ZL3, constitute an overvoltage protection and dynamic compensation circuit. When the output voltage is abnormal, transistors Q3 and Q4 conduct, adjusting the feedback signal through components such as resistors R28 and R68, and capacitor C18, forcing the power management chip U1 to reduce the output.

[0031] In summary, the above implementation method, through the coordinated design of multi-level filtering protection, LLC resonant isolation conversion, and high-precision closed-loop voltage regulation, improves the input compatibility, anti-interference capability, and energy efficiency of the subway dynamic display screen driver power supply. Its complex and sophisticated circuit structure (such as common-mode inductor networks and dynamically compensated transistor arrays) directly addresses the pain points of electromagnetic interference, voltage fluctuations, and mechanical vibrations in the complex operating conditions of subways, achieving a revolutionary breakthrough in power supply stability and display quality, and providing a highly reliable power supply solution for the construction of intelligent rail transit.

[0032] Based on the aforementioned scheme, in some implementations of this application, the DC-DC converter module includes a FAN6204AMX chip U2, an XL6005E1 driver U7, an XL6005E1 driver U9, terminal blocks JC2, JP3, JP4, inductors L4, L5, L6, L7, and capacitors C15, C29, C30, C35, and C33. Capacitors C31, C32, C25, C26, C28, C23, C25, C34; Resistors R15, R17, R19, R22, R57, R50, R51, R52, R46, R47, R48, R37; Diodes D8A, D9A, D10A, D11A, D6, and D7A. Specifically, pin 1 of chip U2 is connected to pin 8 of chip U2 through resistor R22; pin 3 of chip U2 is connected to terminal 9 of terminal block P10; pin 4 of chip U2 is connected to pin 5 of chip U2 through capacitor C15; pin 5 of chip U2 is connected to pin 6 of chip U2 through resistors R15 and R17 connected in series; the common terminal of resistors R15 and R17 is connected to pin 7 of chip U2; and pin 8 of chip U2 is connected to pin 8 of transformer through resistor R19. Pin 5 of the driver U9 is connected to pin 2 of the power management chip U1. Pin 4 of the driver U9 is grounded through capacitors C30, C29, and C35 connected in parallel. Pin 4 of the driver U9 is connected to pin 4 of the driver U7 through inductors L7 and L6. Pin 4 of the driver U9 is connected to pin 3 of the driver U9 through inductor L5. Pin 2 of the driver U9 is connected to pin 1 of the driver U9 through capacitor C33. Pin 2 of the driver U9 is connected to terminal block P1 through resistor R57. Terminal 4 of terminal 0 is connected. Pin 3 of driver U9 is connected to terminal 2 of terminal block JP4 through diodes D8A and D9A connected in parallel. Terminal 2 of terminal block JP4 is grounded through capacitors C32 and C31 connected in parallel. Terminal 1 of terminal block JP4 is grounded through resistors R50, R51, R52 and diode D11A connected in parallel. Terminal 1 of terminal block JP4 is connected to terminal 1 of terminal block JC2. Terminal 2 of terminal block JP4 is connected to terminal 2 of terminal block JC2.Pin 4 of the driver U7 is connected to pin 2 of the power management chip U1. Pin 4 of the driver U7 is grounded through capacitors C34, C23, and C25 connected in parallel. Pin 4 of the driver U7 is connected to pin 3 of the driver U7 through inductor L4. Pin 2 of the driver U7 is connected to pin 1 of the driver U7 through capacitor C28. Pin 2 of the driver U7 is connected to terminal 2 of the terminal block P10 through resistor R37. Pin 3 of the driver U7 is connected through... The diodes D7A and D6, connected in parallel, are connected to terminal 2 of terminal block JP3. Terminal 2 of terminal block JP3 is grounded through capacitors C24 and C26 connected in parallel. Terminal 1 of terminal block JP3 is grounded through resistors R46, R47, and R48 connected in parallel and diode D10A. Terminal 1 of terminal block JP3 is connected to terminal 5 of terminal block JC2, and terminal 2 of terminal block JP3 is connected to terminal 6 of terminal block JC2.

[0033] In the above implementation, a dual-channel interleaved parallel LLC resonant topology is adopted. The FAN6204AMX controller and XL6005E1 driver work together, combining multi-stage filtering and synchronous rectification technology to achieve high-efficiency voltage conversion, ultra-low ripple output, and dynamic load response. Its core architecture is: converting the first voltage output from the input module (e.g., 24VDC) into a stable second voltage (e.g., 12VDC); blocking electromagnetic interference (EMI) conduction paths through high-frequency isolation design; and matching the instantaneous load changes of the dynamic display screen to ensure a flicker-free and image-free display.

[0034] It should be noted that the input signal of the DC-DC converter module is the DC voltage signal of the input module's drive platform, which is connected through terminal block JC2 and output through terminal blocks JP3 and JP4. The drive signals for the DC-DC converter module's operation come from U1-FB and U2-FB of the output control circuit. The U2-GATE signal is used to control the cooling fan, and outputs T1-8 are used to connect to the output fan.

[0035] Based on the aforementioned scheme, in some implementations of this application, the output control module includes a voltage reference chip U5 of model TL431AIDBZR, a voltage reference chip U6 of model TL431AIDBZR, an optocoupler U4, an optocoupler U3, resistors R27, R30, R31, R35, R36, R29, R26, R32, R33, R34, capacitors C20, C22, C19, and C21. In this configuration, pin 3 of optocoupler U4 is connected to pin 3 of optocoupler U3; pin 1 of optocoupler U4 is connected to pin 2 of optocoupler U4 via resistor R30; pin 1 of optocoupler U4 is connected to pin 12 of transformer T1 via resistor R27; pin 2 of optocoupler U4 is connected to pin 1 of voltage reference chip U6; pin 1 of voltage reference chip U6 is connected to pin 1 of voltage reference chip U5 via capacitor C20, resistor R31, resistor R32, and capacitor C19 in sequence; pin 2 of voltage reference chip U6 is grounded via capacitor C22, resistor R36, and resistor R35 connected in parallel; pin 2 of voltage reference chip U6 is connected to terminal 10 of terminal block P10; and pin 2 of voltage reference chip U6 is connected to the common terminal of capacitor C20 and resistor R31. Pin 1 of the optocoupler U3 is connected to pin 2 of the optocoupler U3 through resistor R29. Pin 1 of the optocoupler U3 is connected to pin 12 of the transformer T1 through resistor R26. Pin 2 of the optocoupler U3 is connected to pin 1 of the voltage reference chip U5. Pin 2 of the voltage reference chip U5 is grounded through the parallel connection of capacitor C21, resistor R33, and resistor R34. Pin 2 of the voltage reference chip U5 is connected to terminal 7 of the terminal block P10. Pin 2 of the voltage reference chip U5 is connected to the common terminal of capacitor C19 and resistor R32.

[0036] In the above implementation, a dual closed-loop feedback mechanism, optocoupler isolation, and dynamic compensation technology are used to achieve high-precision voltage output, fast load response, and enhanced anti-interference capabilities for the driving power supply of the dynamic display screen in subway vehicles. Its core architecture involves: precisely distributing the second voltage (e.g., 12VDC) output from the DC-DC converter module to each load unit of the display screen (backlight, driver board, etc.); dynamically adjusting the operating status of the front-end converter module by monitoring the output voltage deviation in real time through isolation feedback; and providing overvoltage and overcurrent protection functions to ensure safe system operation.

[0037] It should be noted that the output control module is responsible for driving and output control of the DC-DC converter module, and also interacts with the output brightness control device to drive U1-FB and U2-FB of the DC-DC converter module; the information interaction control comes from UCA and UCB of the control module.

[0038] This application also provides a driving power supply device for a dynamic display screen on a subway vehicle, which is the driving power supply circuit for a dynamic display screen on a subway vehicle as described above. It can be made into a driving power supply device for a dynamic display screen on a subway vehicle by encapsulating the circuit board containing the driving power supply circuit for the dynamic display screen in a housing, thereby facilitating user operation and providing convenience and speed.

[0039] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this application. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A driving power supply circuit for a dynamic display screen of a subway vehicle, characterized by, The input module, the DC-DC conversion module and the output control module are connected with the processor module in sequence; The input module includes an AC input terminal, a DC input terminal and a power management chip unit, an external AC signal connected with the AC input terminal and / or an external DC signal connected with the DC input terminal are converted into a first voltage by the power management chip unit; the DC-DC conversion module adopts a high-voltage isolation circuit structure and is used for converting the first voltage into a second voltage; the processor module adopts an ARM processing chip and controls the voltage output of the DC-DC conversion circuit through a PWM mode; the output control module is used for being connected with an external display screen and driving the second voltage output by the DC-DC conversion module.

2. The circuit of claim 1, wherein, The power management chip unit includes a power management chip of NCP1271D65R2G type.

3. The circuit of claim 1, wherein, The ARM processing chip is of NT68168BTG type.

4. The circuit of claim 1, wherein, The processor module includes a chip U26 of NT68168BTG type, a terminal row P10, a crystal oscillator Y1, a fuse A30, a triode Q10, resistors R25, R26, R23, R20, R22, R21, R27, R44, R42, R39, R36, R35, R40, R41, R43, R38, R28, R29, R30, R31, R34, R37, capacitors C31, C29, C25, C20, C21, C22, C32, C13, C12, C23, C71, C24, C26, C28, C30, C33 and C35. The chip U26 chip pin 51 is connected with external access power supply VCC1 through the fuse A30, the chip U26 chip pin 55 is connected with the chip U26 chip pin 56 in turn through the resistor R25 and the resistor R26, the chip U26 chip pin 55 is connected with the terminal 10 of the terminal row P10, the chip U26 chip pin 56 is connected with the terminal 7 of the terminal row P10, the common terminal of the resistor R25 and the resistor R26 is connected with external access power supply VCC1, the chip U26 chip pin 53 is connected with the chip U26 chip pin 52 in turn through the resistor R23 and the resistor R20, the chip U26 chip pin 53 is connected with the resistor R22, the chip U26 chip pin 52 is connected with the resistor R21, the chip U26 chip pin 59 is connected with the terminal 5 of the terminal row P10, the chip U26 chip pin 5 is grounded through the capacitor C25 and the resistor R39 in series, the chip U26 chip pin 8 is grounded through the capacitor C29 and the resistor R42 in series, the chip U26 chip pin 10 is grounded through the capacitor C31 and the resistor R44 in series, the chip U26 chip pin 63 is connected with the chip U26 chip pin 64 through the resistor R27, the chip U26 chip pin 63 is grounded through the capacitor C20, the chip U26 chip pin 64 is grounded through the capacitor C21, the crystal oscillator Y1 is connected with the resistor R27 in parallel, the chip U26 chip pin 50 is grounded, the chip U26 chip pin 2 is connected with the chip U26 chip pin 50 through the capacitor C23, the chip U26 chip pin 26 is connected with the chip U26 chip pin 50 through the capacitor C12, the chip U26 chip pin 18 is connected with external access power supply VCC1 through the resistor R37, the chip U26 chip pin 18 is connected with the collector of the triode Q10, the chip U26 chip pin 18 is connected with the emitter of the triode Q10 through the capacitor C35, the base of the triode Q10 is connected with external access power supply VCC1, the base of the triode Q10 is grounded through the capacitor C22, the capacitor C32 and the capacitor C13 which are connected in parallel two by two, the chip U26 chip pin 1 is connected with the chip U26 chip pin 23 through the resistor R34, the chip U26 chip pin 1 is connected with the chip U26 chip pin 27 through the resistor R31, the chip U26 chip pin 1 is connected with the chip U26 chip pin 28 through the resistor R30, the chip U26 chip pin 4 is grounded through the capacitor C24 and the resistor R38 in series,The pin 6 of the chip U26 chip is grounded through the capacitor C26 and the resistor R40 in series, the pin 4 of the chip U26 chip is grounded through the capacitor C28 and the resistor R41 in series, the pin 4 of the chip U26 chip is grounded through the capacitor C30 and the resistor R43 in series, the pin 16 of the chip U26 chip is connected with the terminal 3 of the terminal block P10, the pin 17 of the chip U26 chip is connected with the terminal 1 of the terminal block P10, the pin 19 of the chip U26 chip is connected with the terminal 7 of the terminal block P10, the pin 20 of the chip U26 chip is connected with the terminal 6 of the terminal block P10, the pin 15 of the chip U26 chip is connected with the terminal 4 of the terminal block P10 through the resistor R36, the pin 14 of the chip U26 chip is connected with the terminal 2 of the terminal block P10 through the resistor R35, the pin 15 of the chip U26 chip is grounded through the capacitor C71, the pin 15 of the chip U26 chip is grounded through the capacitor C33.

5. The circuit of claim 4, wherein, The input module includes voltage reference chip U10, power management chip U1 of NCP1271D65R2G type, fuse F1, transformer T1, common mode inductor L2, common mode inductor L3, MOS tube Q1, MOS tube Q2, MOS tube Q5, triode Q2, triode Q3, triode Q4, terminal block J1, terminal block JP1, diode D1, diode D3, diode D4, diode D5, diode D12, rectifier diode D2, voltage stabilizing diode ZL1, voltage stabilizing diode ZL2, voltage stabilizing diode ZL3, pressure sensitive resistor RV2, resistor R3, resistor R4, resistor R16, resistor R18, resistor R11, resistor R20, resistor R21, resistor R10, resistor R24, resistor R25, resistor R23, resistor R13, resistor R28, resistor R5, resistor R9, resistor R68, resistor R1, resistor R67, resistor R69, resistor R70, resistor R66, resistor R65, resistor R64, resistor R6, resistor R71, resistor R72, resistor R73, resistor R74, resistor R63, resistor R2, resistor R12, resistor R14, capacitor C1, capacitor C13, capacitor C8, capacitor C9, capacitor C2, capacitor C16, capacitor C17, capacitor C14, capacitor C18, capacitor C12, capacitor C39, capacitor CX1, capacitor CX2, capacitor CY1 and capacitor CY2; Wherein, the terminal 1 of the terminal block JP1 is connected with the terminal 1 of the terminal block J1, the terminal 2 of the terminal block JP1 is connected with the terminal 4 of the terminal block J1, the terminal 1 of the terminal block JP1 is connected with the terminal 4 of the terminal block J1 through the resistor R2 and the resistor R12 in series, the terminal 1 of the terminal block JP1 is connected with the terminal 4 of the terminal block J1 through the fuse F1 and the pressure sensitive resistor RV2 in series, the terminal 4 of the terminal block J1 is connected with the terminal 2 of the common mode inductor L2, the common terminal of the fuse F1 and the pressure sensitive resistor RV2 is connected with the terminal 1 of the common mode inductor L2 through the diode D1 and the diode D5 in parallel, the common terminal of the fuse F1 and the pressure sensitive resistor RV2 is also connected with the terminal 2 of the common mode inductor L2 through the capacitor CX1, the terminal 4 of the common mode inductor L2 is connected with the terminal 3 of the common mode inductor L2 through the capacitor CY1 and the capacitor CY2 in series, the terminal 4 of the common mode inductor L2 is connected with the terminal 1 of the common mode inductor L3, the terminal 3 of the common mode inductor L2 is connected with the terminal 2 of the common mode inductor L3, the terminal 4 of the common mode inductor L2 is connected with the terminal 3 of the common mode inductor L2 through the capacitor CX2; The terminal 3 of the common mode inductor L3 is connected with the drain of the MOS Q5 through the resistance R63, the terminal 3 of the common mode inductor L3 is connected with the source of the MOS Q5, the terminal 4 of the common mode inductor L3 is connected with the gate of the MOS Q5 through the resistance R71 and the resistance R72 in series, the gate of the MOS Q5 is connected with the source of the MOS Q5 through the voltage stabilizing diode ZL3, the gate of the MOS Q5 is connected with the anode of the diode D12, the gate of the MOS Q5 is connected with the base of the triode Q4, the gate of the MOS Q5 is connected with the cathode of the diode D12 through the resistance R74, the capacitor C39 and the resistance R73 in series, the emitter of the triode Q4 is connected with the cathode of the diode D12, the collector of the triode Q4 is connected with the common terminal of the capacitor C39 and the resistance R73; The pin 8, the pin 9 and the pin 7 of the transformer T1 are connected and then connected with the terminal 4 of the common mode inductor L3 through the capacitor C16, the pin 8 of the transformer T1 is connected with the pin 9 of the transformer T1 through the rectifier diode D2, the capacitor C1 and the resistance R3 in series, the resistance R3 and the resistance R4 are in parallel, the common terminal of the rectifier diode D2 and the capacitor C1 is connected with the source of the MOS Q1, the source of the MOS Q1 is connected with the gate of the MOS Q1 through the resistance R16, the gate of the MOS Q1 is connected with the terminal 9 of the terminal block P10 through the resistance R18, the drain of the MOS Q1 is connected with the pin 8 of the transformer T1, the pin 1 of the transformer T1 is connected with the pin 2 of the transformer T1, the pin 3 of the transformer T1 is connected with the pin 4 of the transformer T1, the pin 1 of the transformer T1 is connected with the anode of the diode D3, the pin 3 of the transformer T1 is connected with the terminal 4 of the common mode inductor L3, the pin 6 of the transformer T1 is connected with the terminal 4 of the common mode inductor L3 through the capacitor C2, the cathode of the diode D3 is connected with the terminal 4 of the common mode inductor L3 through the capacitor C3 and the resistance R1 in parallel, the pin 5 of the transformer T1 is connected with the anode of the diode D4; The pin 7 of the power management chip U1 is connected with the terminal 4 of the common mode inductor L3, the pin 7 of the power management chip U1 is connected with the cathode of the diode D4 through the resistor R11, the capacitor C13 is connected with the diode D4 in parallel, the pin 6 of the power management chip U1 is grounded through the capacitor C9 and the capacitor C8 in parallel, the pin 5 of the power management chip U1 is connected with the source electrode of the MOS tube Q2 through the resistor R20, the drain electrode of the MOS tube Q2 is connected with the anode of the diode D3, the gate electrode of the MOS tube Q2 is connected with the source electrode of the MOS tube Q2 through the resistor R21, the gate electrode of the MOS tube Q2 is grounded through the resistor R24 and the resistor R25 in parallel, the gate electrode of the MOS tube Q2 is connected with the pin 3 of the power management chip U1 through the resistor R23, the pin 3 of the power management chip U1 is grounded through the capacitor C17, the pin 3 of the power management chip U1 is connected with the terminal 4 of the common mode inductor L3 after the resistor R13, the resistor R9 and the resistor R5 in sequence, the pin 1 of the power management chip U1 is grounded through the resistor R14 and the capacitor C14 in parallel, the pin 2 of the power management chip U1 is connected with the collector electrode of the triode Q3; The collector electrode of the triode Q3 is connected with the base electrode of the triode Q3 after the resistor R28, the capacitor C18 and the resistor R68 in sequence, the base electrode of the triode Q3 is connected with the common terminal of the capacitor C18 and the resistor R68 after the zener diode ZL1 and the zener diode ZL2 in sequence, the pin 1 of the voltage reference chip U10 is connected with the pin 3 of the voltage reference chip U10 through the zener diode ZL2, the pin 2 of the voltage reference chip U10 is connected with the pin 3 of the voltage reference chip U10 after the capacitor C12, the resistor R69 and the resistor R70 in parallel, the pin 2 of the voltage reference chip U10 is connected with the terminal 4 of the common mode inductor L3 after the resistor R67 and the resistor R66 in sequence, the pin 1 of the voltage reference chip U10 is connected with the terminal 4 of the common mode inductor L3 through the resistor R65 and the resistor R64 in parallel.

6. The circuit of claim 5, wherein, The direct-current-direct-current conversion module includes a chip U2 of FAN6204AMX model, a driver U7 of XL6005E1 model, a driver U9 of XL6005E1 model, a terminal block JC2, a terminal block JP3, a terminal block JP4, an inductor L4, an inductor L5, an inductor L6, an inductor L7, a capacitor C15, a capacitor C29, a capacitor C30, a capacitor C35, a capacitor C33, a capacitor C31, a capacitor C32, a capacitor C25, a capacitor C26, a capacitor C28, a capacitor C23, a capacitor C25, a capacitor C34, a resistor R15, a resistor R17, a resistor R19, a resistor R22, a resistor R57, a resistor R50, a resistor R51, a resistor R52, a resistor R46, a resistor R47, a resistor R48, a resistor R37, a diode D8A, a diode D9A, a diode D10A, a diode D11A, a diode D6 and a diode D7A; The pin 1 of the chip U2 is connected with the pin 8 of the chip U2 through the resistor R22, the pin 3 of the chip U2 is connected with the terminal 9 of the terminal block P10, the pin 4 of the chip U2 is connected with the pin 5 of the chip U2 through the capacitor C15, the pin 5 of the chip U2 is connected with the pin 6 of the chip U2 after the resistor R15 and the resistor R17 in series, the common terminal of the resistor R15 and the resistor R17 is connected with the pin 7 of the chip U2, and the pin 8 of the chip U2 is connected with the pin 8 of the transformer through the resistor R19. The pin 5 of the driver U9 is connected with the pin 2 of the power management chip U1, the pin 4 of the driver U9 is grounded through the capacitor C30, the capacitor C29 and the capacitor C35 connected in parallel in pairs, the pin 4 of the driver U9 is connected with the pin 4 of the driver U7 in sequence after the inductor L7 and the inductor L6, the pin 4 of the driver U9 is connected with the pin 3 of the driver U9 through the inductor L5, the pin 2 of the driver U9 is connected with the pin 1 of the driver U9 through the capacitor C33, the pin 2 of the driver U9 is connected with the terminal 4 of the terminal block P10 through the resistor R57, the pin 3 of the driver U9 is connected with the terminal 2 of the terminal block JP4 through the diode D8A and the diode D9A connected in parallel, the terminal 2 of the terminal block JP4 is grounded through the capacitor C32 and the capacitor C31 connected in parallel, the terminal 1 of the terminal block JP4 is grounded through the resistor R50, the resistor R51, the resistor R52 and the diode D11A connected in parallel in pairs, the terminal 1 of the terminal block JP4 is connected with the terminal 1 of the terminal block JC2, and the terminal 2 of the terminal block JP4 is connected with the terminal 2 of the terminal block JC2. Pin 4 of the driver U7 is connected with pin 2 of the power management chip U1, pin 4 of the driver U7 is grounded through the capacitors C34, C23 and C25 connected in parallel in twos, pin 4 of the driver U7 is connected with pin 3 of the driver U7 through the inductor L4, pin 2 of the driver U7 is connected with pin 1 of the driver U7 through the capacitor C28, pin 2 of the driver U7 is connected with terminal 2 of the terminal block P10 through the resistor R37, pin 3 of the driver U7 is connected with terminal 2 of the terminal block JP3 through the diode D7A and the diode D6 connected in parallel, terminal 2 of the terminal block JP3 is grounded through the capacitor C24 and the capacitor C26 connected in parallel, terminal 1 of the terminal block JP3 is grounded through the resistor R46, the resistor R47, the resistor R48 and the diode D10A connected in parallel in twos, terminal 1 of the terminal block JP3 is connected with terminal 5 of the terminal block JC2, terminal 2 of the terminal block JP3 is connected with terminal 6 of the terminal block JC2.

7. The circuit of claim 6, wherein, The output control module comprises a voltage reference chip U5 of TL431AIDBZR model, a voltage reference chip U6 of TL431AIDBZR model, an optocoupler U4, an optocoupler U3, a resistor R27, a resistor R30, a resistor R31, a resistor R35, a resistor R36, a resistor R29, a resistor R26, a resistor R32, a resistor R33, a resistor R34, a capacitor C20, a capacitor C22, a capacitor C19 and a capacitor C21; Pin 3 of the optocoupler U4 is connected with pin 3 of the optocoupler U3, pin 1 of the optocoupler U4 is connected with pin 2 of the optocoupler U4 through the resistor R30, pin 1 of the optocoupler U4 is connected with pin 12 of the transformer T1 through the resistor R27, pin 2 of the optocoupler U4 is connected with pin 1 of the voltage reference chip U6, pin 1 of the voltage reference chip U6 is connected with pin 1 of the voltage reference chip U5 in sequence through the capacitor C20, the resistor R31, the resistor R32 and the capacitor C19, pin 2 of the voltage reference chip U6 is grounded through the capacitor C22, the resistor R36 and the resistor R35 connected in parallel, pin 2 of the voltage reference chip U6 is connected with terminal 10 of the terminal block P10, pin 2 of the voltage reference chip U6 is connected with the common terminal of the capacitor C20 and the resistor R31; The pin 1 of the optocoupler U3 is connected with the pin 2 of the optocoupler U3 through the resistor R29, the pin 1 of the optocoupler U3 is connected with the pin 12 of the transformer T1 through the resistor R26, the pin 2 of the optocoupler U3 is connected with the pin 1 of the voltage reference chip U5, the pin 2 of the voltage reference chip U5 is grounded through the capacitor C21, the resistor R33 and the resistor R34 in parallel, the pin 2 of the voltage reference chip U5 is connected with the terminal 7 of the terminal block P10, the pin 2 of the voltage reference chip U5 is connected with the common terminal of the capacitor C19 and the resistor R32.

8. A driving power supply device for a dynamic display screen on subway vehicles, characterized in that, A driving power supply circuit of a dynamic display screen of a subway vehicle comprising a circuit as claimed in any one of claims 1 to 7.

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