Test fixture and test equipment suitable for semiconductor module with symmetrical shape

Abstract

The utility model provides a test fixture and test equipment suitable for a semiconductor module with a symmetrical shape. The test fixture comprises a test substrate, a test assembly and an auxiliary test assembly. A test circuit and an auxiliary function layer used for triggering the test circuit to be turned off are integrated in the test substrate. The test assembly and the auxiliary test assembly are both connected to the test substrate and are electrically isolated from each other. The test assembly includes a plurality of test probes connected to the test circuit. The plurality of test probes are arranged corresponding to a plurality of pins of the semiconductor module. The auxiliary test assembly is electrically connected with the auxiliary function layer. And when the semiconductor module is positively arranged, each pin is in contact with the corresponding test probe, and the test circuit is conducted. When the semiconductor module is reversely arranged, at least one pin is in contact with the test assembly, and the test circuit is disconnected. The testing jig can automatically stop testing when the semiconductor module is reversely arranged, testing errors or testing accidents caused by reverse connection are avoided, the testing cost can be reduced, and the testing efficiency can be improved.

Description

Technical Field

[0001] This utility model belongs to the field of semiconductor test fixture technology, and relates to a test fixture and test equipment suitable for symmetrical semiconductor modules. Background Technology

[0002] With the continuous advancement of semiconductor technology, wide-bandgap semiconductor materials such as gallium nitride (GaN) and silicon carbide (SiC) are widely used in the field of power electronic devices. Among them, silicon carbide metal oxide semiconductor field-effect transistors (SiCMOSFETs) have become core devices for high-power applications such as electric vehicles and renewable energy systems due to their high temperature resistance, high frequency performance and high power density characteristics.

[0003] Because the core applications of power semiconductor devices require stable operation under extreme conditions such as high voltage, high current, and high-frequency switching, rigorous testing of their dynamic characteristics is typically necessary to accurately evaluate their switching losses, transient response capabilities, and thermal characteristics. For example, double-pulse testing effectively assesses the voltage and current characteristics and switching losses of devices during switching. Similarly, short-circuit testing is used to analyze the transient response and thermal characteristics of devices under extreme conditions. These testing methods help engineers optimize product design, improve product quality, and reduce failure rates.

[0004] However, during the testing of power semiconductor devices, misconnection or reverse connection problems occur frequently, significantly impacting testing efficiency and costs. This is especially true for symmetrical power semiconductor devices, where frequent misconnection or reverse connection issues can lead to test failures, device damage, equipment failure, and even production line shutdowns, resulting in severe economic losses.

[0005] Therefore, how to provide a test fixture and test equipment suitable for symmetrical semiconductor modules to meet the high-efficiency and low-cost testing requirements of symmetrical semiconductor modules has become an important technical problem that needs to be solved by those skilled in the art.

[0006] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Utility Model Content

[0007] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a test fixture and test equipment suitable for symmetrical semiconductor modules, so as to solve the problem of test efficiency and cost being affected by incorrect or reverse connection of devices when testing symmetrical power semiconductor devices in the prior art.

[0008] To achieve the above and other related objectives, this utility model provides a test fixture suitable for symmetrical semiconductor modules. The test fixture includes a test substrate, test components, and auxiliary test components. The test substrate integrates a test circuit for performing preset tests on the semiconductor module, and an auxiliary functional layer for triggering the test circuit to shut down.

[0009] The test component is connected to the test substrate and electrically connected to the test circuit. The test component includes multiple test probes, which are configured to correspond to multiple pins in the semiconductor module, respectively.

[0010] The auxiliary test component is connected to the test substrate and electrically connected to the auxiliary functional layer, and the auxiliary test component is electrically isolated from the test component;

[0011] When the semiconductor module is in the upright position, each pin is in contact with the corresponding test probe, and the test circuit is turned on; when the semiconductor module is in the reverse position, at least one pin is in contact with the auxiliary test component to be electrically connected to the auxiliary functional layer, and the test circuit is turned off.

[0012] In one embodiment, the semiconductor module has at least two target pins, each of which has the same definition;

[0013] The test component includes at least two target test probes, which are matched with at least two target pins, and the at least two target tests are arranged in a first array.

[0014] The auxiliary testing component includes at least two auxiliary testing probes arranged in a second array, which is symmetrical about the center of the test substrate to the first array.

[0015] In one embodiment, the auxiliary functional layer constitutes a detection circuit, and one end of at least one of the auxiliary test probes is connected to the detection circuit. The detection circuit detects the change in electrical signal generated when the at least one auxiliary test probe contacts the target pin, and triggers the test circuit to shut down.

[0016] In one embodiment, the auxiliary functional layer includes a ground layer, and at least one of the auxiliary test probes is electrically connected to the ground layer. When the at least one of the auxiliary test probes contacts the target pin, an electrical signal change is generated, triggering the test circuit to automatically shut down.

[0017] In one embodiment, the target pin includes either a ground pin or a power pin.

[0018] In one embodiment, the test component is detachably connected to the test substrate; and / or, the auxiliary test component is detachably connected to the test substrate.

[0019] In one embodiment, the test substrate is provided with a plurality of test holes and at least two auxiliary test holes, the test probe extends into the test holes to be electrically connected to the test circuit, and the auxiliary test probe extends into the auxiliary test holes to be connected to the test substrate.

[0020] In one embodiment, the test probe includes a spring probe; and / or, the auxiliary test probe includes a spring probe.

[0021] In one embodiment, the semiconductor module includes a power device module, and the package of the semiconductor module includes one of EASY1B, EASY2B, EASY3B and flow NPC E3BP.

[0022] This utility model also provides a testing device, which includes the testing fixture as described above, and a lifting platform for supporting and fixing a semiconductor module. The lifting platform is located on the side of the testing fixture where the test probe extends. The semiconductor module is moved by the lifting platform so that the test probe contacts the pin.

[0023] As described above, the test fixture and test equipment of this utility model, applicable to symmetrical semiconductor modules, have the following beneficial effects:

[0024] Based on the auxiliary test probes, testing can automatically stop when the semiconductor module is reversed, effectively avoiding erroneous tests caused by reverse connection of the semiconductor module to the test fixture, thus helping to ensure the reliability of test results. Simultaneously, based on accurate identification of the reversed state, damage to devices or test equipment caused by reverse connection of the semiconductor module can be avoided. Engineers do not need to pay extra attention to whether the semiconductor module is correctly positioned, simplifying the testing process and improving test safety and efficiency. Compared to existing test fixtures, this test fixture effectively achieves reverse connection protection through the configuration of auxiliary test components, without relying on complex automation programs and circuits, helping to reduce testing, production, and maintenance costs. Furthermore, this test fixture and test equipment are applicable to reverse connection protection of semiconductor modules in various package types, exhibiting broad applicability. Attached Figure Description

[0025] Figure 1 A simplified bottom view of a test fixture for a symmetrical semiconductor module provided in an embodiment of this application;

[0026] Figure 2 For based on Figure 1 The semiconductor module being tested using the test fixture shown;

[0027] Figure 3 A schematic diagram illustrating the contact between the semiconductor module and the test fixture when the semiconductor module is upright, as provided in an embodiment of this application.

[0028] Figure 4 for Figure 3 A top view of the semiconductor module;

[0029] Figure 5 for Figure 3 A bottom view of the test fixture;

[0030] Figure 6 A schematic diagram illustrating the contact between the semiconductor module and the test fixture when the semiconductor module is reversed, as provided in an embodiment of this application.

[0031] Figure 7 for Figure 6 A top view of the semiconductor module;

[0032] Figure 8 for Figure 6 A bottom view of the test fixture;

[0033] Figure 9 This is a top view of a semiconductor module in EASY1B package.

[0034] Figure 10 This is a top view of a semiconductor module in EASY2B package.

[0035] Figure 11 This is a top view of a semiconductor module in EASY3B package.

[0036] Explanation of reference numerals in the attached figures:

[0037] 10-Test fixture, 11-Test substrate, 111-Test circuit, 112-Auxiliary functional layer, 12-Test component, 121-Test probe, 121a-Target test probe, 13-Auxiliary test component, 131-Auxiliary test probe;

[0038] 20 - Semiconductor module, 21 - Pin, 21a - Target pin. Detailed Implementation

[0039] To make the above-mentioned objects, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a full understanding of this utility model. However, this utility model can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this utility model. Therefore, this utility model is not limited to the specific embodiments disclosed below.

[0040] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0041] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0042] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0043] In this utility model, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0044] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0045] Please see Figures 1 to 11 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this utility model. Therefore, the drawings only show the components related to this utility model and are not drawn according to the actual number, shape and size of the components. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0046] In response to the problem mentioned in the background art that testing efficiency and cost are affected by misconnection or reverse connection of symmetrical power semiconductor devices, related technologies have proposed methods (e.g., automated contact detection) to avoid test accidents caused by human error. Although these methods can reduce the risk of misconnection, they rely on complex circuits or tightly packed detection modules, which significantly increases the cost of test fixtures and equipment. This makes it difficult to meet the requirements of high-efficiency and low-cost testing and is not suitable for actual production line applications.

[0047] For example, patent CN113899999A proposes a mistake-proofing mechanism based on marker devices. This mechanism constructs a mistake-proofing loop using an excitation source and a measurement unit, comparing the measured value with the calibrated value to determine the connection status. However, this method is highly dependent on the selection of marker devices (such as resistors and inductors), and not all scenarios are suitable for a single device type. Furthermore, device characteristics are easily affected by factors such as temperature drift and aging, leading to inaccurate calibrated values ​​and the risk of misjudgment. In addition, this method requires an independent excitation source and measurement unit for each mistake-proofing object, significantly increasing system complexity and hardware cost as the test scale expands. Another example is patent CN220064167U, which uses a series loop combined with optocoupler isolation technology to detect terminal contact status. While this simplifies the detection process and supports dense terminal layouts, its signal transmission architecture relying on optocouplers and NPN transistors has inherent drawbacks: the optocoupler response speed is slow, making it difficult to meet high-frequency testing requirements; the integration of multi-stage power supplies and optocouplers requires complex electrical isolation design, and insufficient isolation can easily lead to noise interference or electrical faults, affecting detection accuracy and system stability. Therefore, current reverse connection protection test solutions all rely on complex automated procedures and additional detection circuits, and generally suffer from limitations such as high testing costs, insufficient reliability or adaptability, and cannot meet the actual needs of low-cost and high-efficiency testing.

[0048] This application provides a test fixture 10 suitable for symmetrical semiconductor modules. Please refer to [link to relevant documentation]. Figure 1 , Figure 1 A simplified bottom view of the test fixture is shown. The test fixture 10 includes a test base plate 11, a test assembly 12, and an auxiliary test assembly 13. Please refer to the attached diagram. Figure 2 , Figure 2 It shows the basis Figure 1 The test fixture shown is used to test a semiconductor module. It should be noted that, in this article, "symmetric semiconductor module" refers to a semiconductor module whose external outline is symmetrical, including axial symmetry and centrosymmetry.

[0049] Specifically, the test substrate 11 integrates a test circuit 111 for performing preset tests on the semiconductor module 20, and an auxiliary functional layer 112 for triggering the test circuit 111 to shut down. The test component 12 is connected to the test substrate 11 and electrically connected to the test circuit 111. The test component 12 includes multiple test probes 121, each configured to correspond to a plurality of pins 21 in the semiconductor module 20. The auxiliary test component 13 is connected to the test substrate 11 and electrically connected to the auxiliary functional layer 112, and is electrically isolated from the test component 12. When the semiconductor module 20 is upright, each pin 21 contacts the corresponding test probe 121, and the test circuit 111 is turned on. When the semiconductor module 20 is reversed, at least one pin 21 contacts the auxiliary test component 13 to be electrically connected to the auxiliary functional layer 112, and the test circuit 111 is turned off. The term "semiconductor module 20 upright" refers to the semiconductor module 20 being correctly positioned, without any left-right or front-back reversal. When testing the semiconductor module 20 using the test fixture 10, multiple test probes 121 and multiple pins 21 are in contact with each other. Conversely, "semiconductor module 20 reversed" refers to the semiconductor module 20 being upside down or reversed, resulting in some test probes 121 incorrectly contacting some pins 21, or some test probes 121 being suspended and multiple pins 21 being unused.

[0050] In this embodiment, the test substrate 11 is a PCB board with multiple structural layers integrated internally. These structural layers include multiple structures constituting the test circuit 111, as well as the auxiliary functional layer 112. Multiple test probes 121 are electrically connected to different locations within the test circuit 111 to form a test loop with the internal electrical structures of the semiconductor module when the semiconductor module is upright, thereby enabling the testing of the semiconductor module's preset performance. Further, the preset test includes at least one of a double-pulse test and a short-circuit test.

[0051] In some embodiments, such as Figure 2 As shown, the semiconductor module 20 has at least two target pins 21a, and each target pin 21a has the same definition. Figure 1As shown, the test assembly 12 includes at least two target test probes 121a, which match at least two target pins 21a, and the at least two target test probes are arranged in a first array. The auxiliary test assembly 13 includes at least two auxiliary test probes 131, which are arranged in a second array, and the second array and the first array are symmetrically distributed about the center of the test substrate 11. That is, in the upright position, the two auxiliary test probes 131 correspond to the regions in the semiconductor module 20 where the two target pins 21a are located (…). Figure 2 Region A shown is a centrally symmetrical region. Figure 2 (Area A' shown). In practical applications, based on the operation manual of the semiconductor module 20 to be tested, at least two target pins 21a with the same definition can be found. Then, the positions in the semiconductor module 20 that are centrally symmetrical with the at least two target pins 21a can be located. Based on this location, the auxiliary test probe 131 can be set at the corresponding position on the test substrate 11.

[0052] In this embodiment, the first array composed of at least two test probes 121 and the second array composed of at least two auxiliary test probes 131 are configured to be centrally symmetrical about the test substrate 120 to accommodate the reversible connection identification requirements of the symmetrically shaped semiconductor module 20. The number of auxiliary test probes 131 is set to at least two to facilitate rapid identification. It should be noted that since the positions of the auxiliary test probes 131 are set based on the centrally symmetrical position of the target pin 21a, when determining the target pin, it is necessary to select a pin whose centrally symmetrical position has no other pins as the target pin; otherwise, the corresponding position on the test substrate cannot be used to accommodate the auxiliary test probes.

[0053] In some embodiments, the target pin 21a includes either a ground pin 21 or a power pin 21. Selecting either a power pin 21 or a ground pin 21 as the target pin 21a allows for a more significant change in the output electrical signal even under reverse connection conditions. This is more effective than other types of pins 21, ensuring the reliability of the test fixture 10 and the semiconductor module 20.

[0054] In this embodiment, the auxiliary function layer 112 used to trigger the test circuit 111 to shut down includes the following two implementation schemes:

[0055] Option 1: The auxiliary functional layer 112 constitutes a detection circuit. At least one end of the auxiliary test probe 131 is connected to the detection circuit (i.e., the auxiliary test probe 131 is connected to the detection circuit). The detection circuit detects the change in electrical signal generated when at least one auxiliary test probe 131 contacts the target pin 21a, triggering the test circuit 111 to shut down. That is, when the target pin 21a (e.g., power pin 21) contacts the auxiliary test probe 131, the detection circuit identifies an abnormal electrical signal (e.g., current / voltage change), and then triggers the test circuit 111 to shut down.

[0056] Option 2: The auxiliary functional layer 112 includes a ground layer, and at least one of the auxiliary test probes 131 is electrically connected to the ground layer (i.e., the auxiliary test probe 131 is directly grounded). When at least one of the auxiliary test probes 131 contacts the target pin 21a, an electrical signal change is generated, triggering the test circuit 111 to automatically shut down. That is, when reversed, the target pin 21a (e.g., power pin 21) contacts the grounded auxiliary test probe 131, forming a short-circuit signal, triggering the test circuit 111 to protectively shut down.

[0057] In some embodiments, at least one of the auxiliary test probes 131 may be directly electrically connected to the ground layer, or indirectly electrically connected. In the case of indirect electrical connection, the auxiliary functional layer 112 further includes a protection circuit layer (including a current-limiting resistor or an isolation element), which is connected between the auxiliary test probe 131 and the ground layer.

[0058] In the embodiments of this application, please refer to Figure 3 , Figure 3 This diagram illustrates the contact between the semiconductor module and the test fixture when the semiconductor module 20 is upright. With the semiconductor module 20 upright, the multiple test probes 121 in the test fixture 10 are in contact with the multiple pins 21 on the semiconductor module 20. At this time, each target pin 21a is in contact with its corresponding target test probe 121a. No pins 21 are provided in the area of ​​the semiconductor module 20 corresponding to the auxiliary test probe 131; each auxiliary test probe 131 is suspended. That is, when the semiconductor module 20 is upright, the auxiliary test probe 131 does not affect the test circuit 111, and the test circuit 111 conducts normally, allowing the test process to proceed normally. Please refer to [reference needed]. Figure 4 and Figure 5 , Figure 4 It shows Figure 3 A top view of the semiconductor module in the diagram, wherein, Figure 4 Area A shown is the region where the target pin is located. Figure 4Region A' shown is a region that is symmetrical to the center of region A. Figure 4 Can be regarded as Figure 2 (Simplified top view of the semiconductor module when it is upright). Figure 5 It shows Figure 3 A bottom view of the test fixture, in which... Figure 5 The area B shown is the opposite direction. Figure 4 The region A shown is... Figure 5 The area B' shown is the opposite direction. Figure 4 The region shown is area A'.

[0059] Please refer to the embodiments in this application. Figure 6 , Figure 6 This diagram illustrates the contact between the semiconductor module and the test fixture when the semiconductor module 20 is reversed. In the reversed state, the multiple test probes 121 in the test fixture 10 no longer correspond to the multiple pins 21 on the semiconductor module 20. Each target pin 21a contacts an auxiliary test probe 131 that is centrally symmetrical to the target test probe 121a. The area of ​​the semiconductor module 20 originally corresponding to the auxiliary test probe 131 does not have a pin 21, and each target test probe 121a is suspended. That is, the target pin 21a is not correctly connected to the test module, but is in contact with the auxiliary functional layer 112 (e.g., the target pin 21a is grounded, or the target pin 21a is connected to the detection circuit). The potential change is different compared to when the target pin 21a is connected to the test circuit 111, thereby triggering the test circuit 111 to disconnect, automatically stopping the test process. Furthermore, the semiconductor module 20 and the test fixture 10 themselves will not experience impact or damage due to reverse connection or misinterpretation. Figure 7 It shows Figure 6 A top view of the semiconductor module in the diagram, wherein, Figure 7 Area A shown is the region where the target pin is located. Figure 7 Region A' shown is a region that is symmetrical to the center of region A. Figure 7 Can be regarded as Figure 2 (Simplified top view of the semiconductor module when it is reversed). Figure 8 It shows Figure 6 A bottom view of the test fixture, in which... Figure 8 The area B shown is the opposite direction. Figure 7 The region A shown is... Figure 8 The area B' shown is the opposite direction. Figure 7 The region shown is region A'. Wherein, Figure 3 and Figure 6 This can also be considered as the semiconductor module 20 contacting the test fixture in either the upright or reversed position, along... Figure 1 A cross-sectional view along the I-I' direction.

[0060] In some embodiments, the test component 12 is detachably connected to the test substrate 11; and / or, the auxiliary test component 13 is detachably connected to the test substrate 11. The detachable connection of the test component 12 and the auxiliary test component 13 to the test substrate 11 allows for quick replacement or repair of the test component 12 and the auxiliary test component 13, reducing the maintenance cost of the test fixture 10. Of course, without considering the test fixture 10 and testing costs, the test component 12 and the auxiliary test component 13 can also be fixedly connected to the test substrate 11, for example, by welding, which ensures reliable connection.

[0061] In some embodiments, the test substrate 11 is provided with a plurality of test holes (not shown) and at least two auxiliary test holes (not shown). The test probe 121 extends into the test hole to be electrically connected to the test circuit 111, and the auxiliary test probe 131 extends into the auxiliary test hole to be connected to the test substrate 11. The probes can be quickly replaced or repaired by inserting them into the holes.

[0062] In some embodiments, the test probe 121 includes a spring probe. And / or, the auxiliary test probe 131 includes a spring probe. The spring probe can be easily and conveniently replaced, which helps improve the convenience and efficiency of maintenance of the test fixture 10. Furthermore, as a mature component for realizing electrical connections, the spring probe has various needle shapes and sizes to choose from, which can adapt to the testing of semiconductor modules 20 with different types (shapes, sizes) of test points (i.e., pins 21). Moreover, the elastic force of the spring probe allows multiple probes (including the test probe 121 and the auxiliary test probe 131) to maintain close contact with the corresponding pins 21 even when there are manufacturing tolerances in different pins 21 of the semiconductor module 20, achieving stability and reliability of the electrical connection. The specific dimensions or shapes of the test probe 121 and the auxiliary test probe 131 can be adjusted based on the dimensions and shapes of the pins 21 in the semiconductor module 20 to be tested. For example, the needle diameter of the test probe 121 and the auxiliary test probe 131 is 2mm, which is not specifically limited here.

[0063] In some embodiments, the semiconductor module 20 includes a power device module, and the package form of the semiconductor module 20 includes one of EASY1B, EASY2B, EASY3B, and flow NPC E3BP. Please refer to [link / reference]. Figures 9 to 11 The diagram shows top views of semiconductor modules in EASY1B, EASY2B, and EASY3B packages, respectively. Figure 2 The semiconductor module 20 shown adopts a flow NPC E3BP package. Based on Figure 2 , Figures 9-11 It is known that the semiconductor modules 20 packaged using the above-mentioned packaging methods all have a symmetrical shape, which also means they have a higher probability of incorrect or reverse connection during testing. Of course, besides the packaging methods mentioned above, the semiconductor module 20 can also be a semiconductor module with other packaging methods and a symmetrical shape, which will not be listed here. Therefore, the test fixture provided in this application embodiment is applicable to high-efficiency, low-cost testing of semiconductor modules with different packaging types, and has strong significance for widespread application.

[0064] This application embodiment also provides a testing device, which includes a testing fixture 10 as described above, and a lifting platform for supporting and fixing a semiconductor module 20. The lifting platform is located on the side of the testing fixture 10 where the testing probe 121 extends. The semiconductor module 20 is moved by the lifting platform so that the testing probe 121 contacts the pin 21.

[0065] In summary, the test fixture and test equipment provided in this application, based on the setting of auxiliary test probes, can automatically stop testing when the semiconductor module is reversed, effectively avoiding erroneous testing caused by the reverse connection of the semiconductor module to the test fixture, thus helping to ensure the reliability of test results. Simultaneously, based on accurate identification of the reversed state, damage to devices or test equipment caused by reverse connection of the semiconductor module can be avoided. Engineers do not need to pay extra attention to whether the semiconductor module is correctly positioned, simplifying the testing process and improving testing safety and efficiency. Compared with existing test fixtures, the test fixture can effectively achieve reverse connection protection through the setting of auxiliary test components, without relying on complex automation programs and complex circuits, which helps to reduce testing, production, and maintenance costs. Furthermore, this test fixture and test equipment can be applied to reverse connection protection of semiconductor modules with various package types, exhibiting wide applicability. Therefore, this utility model effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0066] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A test fixture suitable for symmetrical semiconductor modules, characterized in that: The test fixture includes a test substrate, test components, and auxiliary test components. The test substrate integrates a test circuit for performing preset tests on the semiconductor module, and an auxiliary functional layer for triggering the test circuit to shut down. The test component is connected to the test substrate and electrically connected to the test circuit. The test component includes multiple test probes, which are configured to correspond to multiple pins in the semiconductor module. The auxiliary test component is connected to the test substrate and electrically connected to the auxiliary functional layer, and the auxiliary test component is electrically isolated from the test component; When the semiconductor module is in the upright position, each pin is in contact with the corresponding test probe, and the test circuit is turned on; when the semiconductor module is in the reverse position, at least one pin is in contact with the auxiliary test component to be electrically connected to the auxiliary functional layer, and the test circuit is turned off.

2. The test fixture for symmetrical semiconductor modules according to claim 1, characterized in that: The semiconductor module has at least two target pins, and each of the target pins has the same definition; The test component includes at least two target test probes, which are matched with at least two target pins, and the at least two target tests are arranged in a first array. The auxiliary testing component includes at least two auxiliary testing probes arranged in a second array, which is symmetrical about the center of the test substrate to the first array.

3. The test fixture for symmetrical semiconductor modules according to claim 2, characterized in that: The auxiliary functional layer constitutes a detection circuit. At least one end of the auxiliary test probe is connected to the detection circuit. The detection circuit detects the change in electrical signal generated when the at least one auxiliary test probe contacts the target pin, and triggers the test circuit to shut down.

4. The test fixture for symmetrical semiconductor modules according to claim 2, characterized in that: The auxiliary functional layer includes a ground layer, and at least one of the auxiliary test probes is electrically connected to the ground layer. When at least one of the auxiliary test probes contacts the target pin, an electrical signal change is generated, triggering the test circuit to automatically shut down.

5. The test fixture for symmetrical semiconductor modules according to claim 2, characterized in that: The target pin includes either a ground pin or a power pin.

6. The test fixture for symmetrical semiconductor modules according to claim 2, characterized in that: The test component is detachably connected to the test substrate; and / or, the auxiliary test component is detachably connected to the test substrate.

7. The test fixture for symmetrical semiconductor modules according to claim 6, characterized in that: The test substrate is provided with multiple test holes and at least two auxiliary test holes. The test probe extends into the test hole to be electrically connected to the test circuit, and the auxiliary test probe extends into the auxiliary test hole to be connected to the test substrate.

8. The test fixture for symmetrical semiconductor modules according to claim 2, characterized in that: The test probe includes a spring probe; and / or, the auxiliary test probe includes a spring probe.

9. The test fixture for symmetrical semiconductor modules according to claim 1, characterized in that: The semiconductor module includes a power device module, and the package form of the semiconductor module includes one of EASY1B, EASY2B, EASY3B and flow NPC E3BP.

10. A testing device, characterized in that: The testing equipment includes a test fixture as described in any one of claims 1-9, and a lifting platform for supporting and fixing a semiconductor module. The lifting platform is located on the side of the test fixture where the test probe extends. The semiconductor module is moved by the lifting platform so that the test probe contacts the pin.

Images