Detection system for preventing module from being reversely installed

Abstract

The utility model relates to the technical field of detection, in particular to a detection system for preventing reverse installation of a module, which is used for detecting a communication module and comprises a test fixture, the test fixture comprises an MCU (Microprogrammed Control Unit) module, a power supply interface, a signal interface and a power supply interface, the power supply interface and the signal interface are respectively connected with the communication module, and the MCU module is connected with the power supply interface. The MCU module is provided with an ADC interface and an analog switch connected with the power supply interface, the MCU module is connected with the power supply interface through the analog switch, and the analog switch is used for controlling input of input voltage. The ADC interface is configured to detect a first ADC value of the communication module placed in the test fixture at a first angle and a second ADC value of the communication module placed in the test fixture at a second angle. The communication module can be prevented from being reversely placed, and the situation that the communication module is damaged due to electrical overstress damage caused by the communication module is avoided.

Description

Technical Field

[0001] This utility model relates to the field of detection technology, and in particular to a module reversibility detection system. Background Technology

[0002] In modern communication technologies, 4G and 5G communication modules are widely used in various devices. These modules typically employ a symmetrical rectangular design to facilitate integration and adaptation across different products. However, this symmetrical design can cause some inconveniences during actual production, particularly in identifying the front and back of the module. Due to the symmetrical shape, operators often find it difficult to clearly distinguish the front and back of the module, leading to errors during production testing.

[0003] During the production of communication modules, these modules need to be placed in test fixtures for functional testing. However, due to a lack of clear markings, there is a problem with the 0° and 180° placement orientation during testing, meaning the same module may be placed in different orientations within the fixture. This reverse placement can cause Electrical Over Stress (EOS) damage to the module, leading to module failure. Utility Model Content

[0004] The main purpose of this invention is to propose a module reverse installation detection system, which aims to solve the problem that reverse installation can cause electrical overstress damage to the module, leading to module destruction.

[0005] To achieve the above objectives, this utility model proposes an anti-reverse module installation detection system for detecting communication modules. The anti-reverse module installation detection system includes a test fixture, which includes an MCU module, a power supply interface, a signal interface, and a power interface. The power interface and the signal interface are respectively connected to the communication module. The MCU module is equipped with an ADC interface and an analog switch connected to the power supply interface. The MCU module is connected to the power supply interface through the analog switch. The analog switch is used to control the input voltage. The ADC interface is used to detect a first ADC value when the communication module is placed in the test fixture at a first angle and a second ADC value when the communication module is placed in the test fixture at a second angle.

[0006] In one embodiment, the anti-reverse module installation detection system includes: a first communication interface connected to the MCU module; the MCU module receives a first communication signal from the anti-reverse module installation detection system through the first communication interface.

[0007] In one embodiment, the anti-reverse module installation detection system includes: an expansion module and a second communication interface connected to the communication module; the expansion module is connected to the MCU module and the second communication interface, and the communication module receives the second communication signal of the anti-reverse module installation detection system from the second communication interface through the expansion module.

[0008] In one embodiment, the expansion module includes: a USB HUB chip and a filtering circuit connected to the USB HUB chip; the filtering circuit is connected to the second communication interface.

[0009] In one embodiment, the model of the USB HUB chip includes: GL852GT-OHG12.

[0010] In one embodiment, the MCU module is provided with a voltage divider circuit connected to the ADC interface.

[0011] In one embodiment, the voltage divider circuit includes: a first resistor and a second resistor; one end of the first resistor is connected to the ADC interface and one end of the second resistor, the other end of the first resistor is connected to the MCU module, and the other end of the second resistor is connected to the power supply voltage.

[0012] In one embodiment, the anti-reverse module detection system further includes a crystal oscillator circuit; the crystal oscillator circuit is connected to the MCU module.

[0013] In one embodiment, the crystal oscillator circuit includes: a crystal oscillator unit, a first capacitor, and a second capacitor; one end of the crystal oscillator unit is connected to the crystal oscillator input terminal of the MCU module and one end of the first capacitor, respectively; the other end of the crystal oscillator unit is connected to the crystal oscillator output terminal of the MCU module and one end of the second capacitor, respectively; the first capacitor and the second capacitor are connected in parallel; and the other ends of the first capacitor and the second capacitor are both grounded.

[0014] In one embodiment, the crystal oscillator circuit is an active crystal oscillator circuit.

[0015] This invention employs a power supply interface to power the MCU module and a power supply interface to power the communication module. The MCU module uses a continuous power supply mode, isolating its power supply from that of the communication module. Before the ADC interface detects that the communication module is correctly placed, the signal interface, power interface, and other peripheral interfaces are not powered on. This prevents damage to the communication module due to EOS (Effective Oscillation) caused by voltage issues on the signal and power interfaces, thus improving production yield. Before the communication module is powered on, the ADC interface of the MCU module is used to check the correctness of the communication module's placement orientation. The orientation of the communication module is distinguished by the first ADC value when the communication module is placed at a first angle in the test fixture and the second ADC value when the communication module is placed at a second angle. This prevents the communication module from being placed backwards and avoids electrical overstress damage that could lead to its destruction. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0017] Figure 1 This is a diagram illustrating the EOS (Effective Loss) situation that occurs in the module.

[0018] Figure 2 Schematic diagram of the anti-reverse module detection system;

[0019] Figure 3 This is the circuit diagram for the MCU module.

[0020] Figure 4 This is a circuit diagram for simulating a switch.

[0021] Figure 5 This is the circuit diagram for the expansion module.

[0022] Explanation of icon numbers:

[0023] 1. Communication module; 2. Test fixture; 3. MCU module; 4. Power supply interface; 51. Signal interface; 52. Power supply interface; 31. ADC interface; Q2. Analog switch; 6. First communication interface; 7. Expansion module; 8. Second communication interface; U7. USB HUB chip; 71. Filter circuit; 9. Voltage divider circuit; R21. First resistor; R27. Second resistor; 10. Crystal oscillator circuit; Y2. Crystal oscillator unit; C38. First capacitor; C39. Second capacitor.

[0024] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0026] It should be noted that if the embodiments of this utility model involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0027] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, if the word "and / or" appears throughout the text, it means including three parallel solutions; for example, "A and / or B" includes solution A, solution B, or a solution that simultaneously satisfies A and B. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0028] In actual production testing of communication module 1, interfaces such as USB and serial port are used. The characteristics of USB interface and serial port signals are as follows: USB interface has a VCHG 5V voltage signal, and serial port has a 3.3V / 1.8V voltage signal, which is a high active signal. Since 4G and 5G communication module 1 adopts a single SOC design, many signal pins are directly connected from the module's pins without protection. Serial port and USB interface belong to this category.

[0029] like Figure 1As shown, in actual production practice, the inability to power down the serial port and USB VCHG power supply will cause EOS damage to the module, leading to module failure. Based on the module's signal pin definitions, the white pin represents VCHG (5V) without power. If communication module 1 is reversed, 5V will be applied to the yellow SDC2_CMD pin. Furthermore, SMC2_CMD, SDC2_DATA2, UART2_RX_GPS, and UART2_TX_GPS are adjacent modules within the communication module. Therefore, the failure symptom is that one of the four pins has an open circuit in one of its impedances.

[0030] Therefore, this utility model proposes a module reversibility detection system.

[0031] In the embodiments of this utility model, such as Figure 2 , Figure 3 , Figure 4 As shown, the anti-reverse module installation detection system is used to detect communication module 1. The anti-reverse module installation detection system includes a test fixture 2, which includes an MCU module 3, a power supply interface 4, a signal interface 51, and a power interface 52. The power interface 52 and the signal interface 51 are respectively connected to the communication module 1. The MCU module 3 is provided with an ADC interface 31 and an analog switch Q2 connected to the power supply interface 4. The MCU module 3 is connected to the power supply interface 4 through the analog switch Q2. The analog switch Q2 is used to control the input of the input voltage. The ADC interface 31 is used to detect the first ADC value of the communication module 1 placed in the test fixture 2 at a first angle and the second ADC value of the communication module 1 placed in the test fixture 2 at a second angle.

[0032] This invention utilizes a power supply interface 4 to power the MCU module 3 and a power supply interface 52 to power the communication module 1. The MCU module 3 employs a continuous power supply mode, isolating its power supply from that of the communication module 1. Before the ADC interface 31 detects that the communication module 1 is correctly positioned, peripheral interfaces such as the signal interface 51 and power interface 52 are not powered on, preventing damage to the communication module 1 due to EOS (Effect of Optical Surface) caused by voltage issues on the signal interface 51 and power interface 52, thus improving production yield. Before the communication module 1 is powered on, the test fixture 2 is pressed down to detect the correct placement of the communication module using the ADC interface 31 of the MCU module 3. The orientation of the communication module is distinguished based on the first ADC value and the second ADC value detected by the ADC interface 31 when the communication module 1 is placed in the test fixture 2 at a first angle. The first angle is defined as 0° and the second angle as 180°. The transformation from the first angle to the second angle is obtained through planar rotation transformation. Figure 1As indicated by the arrow, signal interface 51 transmits clamp pressure detection signals and module orientation detection signals to MCU module 3 to prevent reverse placement of communication module 1 and avoid electrical overstress damage to communication module 1, which could lead to its destruction.

[0033] Analog switch Q2 is turned on for 100ms, allowing the signal to pass through. MCU module 3 instantaneously captures the detected voltage. The 12-bit resolution of MCU module 3 divides the 0-1.2V range into 4096 levels (LSB = 0.8mV). The input voltage is compared successively with the reference voltage generated by the internal DAC of MCU module 3 using a binary search method, and the digital conversion is completed after 12 clock cycles. Simultaneously, considering the necessary ESD protection on ADC interface 31, a digital anti-jitter TC resistor is added to correct the reference voltage offset in real time. Capacitors of varying sizes can also be added to the detection circuit of ADC interface 31 to address the instability of ADC interface 31 detection. Furthermore, multiple sampling and averaging are used to eliminate jitter in the detected value.

[0034] This circuit utilizes the high-precision quantization characteristics of the ADC, which can distinguish differences of 0.8mV at the 12-bit resolution of MCU module 3. The analog and digital power supplies are laid out independently, and the analog / digital grounds are isolated by 0Ω resistors or ferrite beads. The input signal path can be configured with an RC low-pass filter circuit 71 to suppress high-frequency noise. For dynamic scenarios such as vibration signals, piezoelectric or capacitive MEMS sensors can be used in combination with shielded cable design to avoid electromagnetic interference.

[0035] Real-time parameter estimation: Kalman filtering is used to process sensor dynamic errors, and a three-level switching strategy is combined to reduce the impact of capacitor mismatch, such as the dynamic noise shaping SAR ADC scheme in ISSCC 2025 combined with adaptive compensation. For temperature drift, multi-temperature point calibration and linear interpolation correction are employed, achieving temperature drift suppression of <10ppm / ℃ in the range of -40℃ to 125℃, while maintaining a recognition accuracy of >99.9% even in complex environments such as industrial vibration and temperature and humidity changes. In practical applications, it is necessary to maintain contact cleanliness and perform regular three-point calibration: zero point, positive reference, and reverse reference, to maintain long-term stability.

[0036] In this embodiment, a module power input interface can also be provided to power the communication module 1. This anti-reverse module detection system is applicable to all industrial AP modules with symmetrical design. Before using this device, the production defect rate was approximately 4‰ to 5‰, and the interface failure and chip burnout defect rates were even higher in subsequent processes due to multi-station testing.

[0037] To verify the effectiveness of this anti-reverse module installation detection system, 10,000 production data points were collected:

[0038] The first work order involved 1500 pieces of chip with poor impedance, and 1 piece of chip was replaced.

[0039] The second work order involved a total of 6200 pieces of work, with 2 defective chips being replaced.

[0040] Total: 7700 pieces, with the defect rate per chip decreasing from 4‰ to 0.39‰. The defect rate has been significantly reduced.

[0041] The anti-reverse module installation detection system includes: a first communication interface 6 connected to the MCU module 3; the MCU module 3 receives a first communication signal from the anti-reverse module installation detection system through the first communication interface 6. The first communication signal comes from the status information, detection signals, etc. of the anti-reverse module installation detection system, and records the MCU module 3's judgment on whether the communication module 1 has been installed backwards.

[0042] The anti-reverse module installation detection system includes: an expansion module 7 and a second communication interface 8 connected to the communication module 1; the expansion module 7 is connected to the MCU module 3 and the second communication interface 8, and the communication module 1 receives a second communication signal from the anti-reverse module installation detection system through the expansion module 7 and the second communication interface 8. The first communication interface 6 and the second communication interface 8 are USB interfaces, the expansion module 7 is used to expand the interfaces, and the second communication signal contains information from the communication module 1, allowing the anti-reverse module installation detection system to further confirm the placement status of the communication module 1.

[0043] like Figure 5 As shown, the expansion module 7 includes: a USB HUB chip U7 and a filtering circuit 71 connected to the USB HUB chip U7; the filtering circuit 71 is connected to the second communication interface 8. The model of the USB HUB chip U7 includes: GL852GT-OHG12.

[0044] The USB hub chip U7 provides more communication interfaces, allowing multiple external devices to connect to the system via the USB interface. The filter circuit 71 is used to eliminate noise or interference, ensuring signal quality and stability. Here, the filter circuit 71 may be used to filter high-frequency noise, voltage fluctuations, or interference in the USB signal, preventing these noises from affecting the normal operation of the system.

[0045] The filter circuit 71 is connected to the USB HUB chip U7 and also to the second communication interface 8, ensuring that the signal from the USB HUB chip U7 to the second communication interface 8 remains stable and clear.

[0046] The MCU module 3 is provided with a voltage divider circuit 9 connected to the ADC interface 31. The voltage divider circuit 9 includes a first resistor R21 and a second resistor R27. One end of the first resistor R21 is connected to the ADC interface 31 and one end of the second resistor R27, respectively. The other end of the first resistor R21 is connected to the MCU module 3, and the other end of the second resistor R27 is connected to the power supply voltage.

[0047] The voltage divider circuit 9 converts the input supply voltage into a voltage value suitable for reading by the ADC interface 31 through resistor division. By using the first resistor R21 and the second resistor R27, a higher voltage is reduced to a lower voltage, allowing the ADC interface 31 of the MCU module 3 to read a safe and appropriate voltage signal. By adjusting the resistor values, the relationship between the input voltage and the ADC input voltage can be precisely controlled, thereby ensuring the normal operation of the anti-reverse module installation detection system.

[0048] When selecting the symmetrical pins of the communication module, you can choose the GND pin or the non-GND signal pin that is symmetrical to the GND pin. Utilize the ADC interface 31 detection function of the MCU module 3, using an input voltage of 1.8V and the voltage divider circuit 9 for detection. When the communication module is correctly placed, the ADC interface 31 detects a voltage of 1.0V. The signal pin is connected to the functional pin of the communication module, and its internal resistance is relatively large. The detected voltage is the voltage divider value of the pull-up voltage of 1.8V. When the communication module is in the reverse position, it is the ground pin. At this time, the ADC interface 31 detects 0V. Use the two clearly distinguishable ADC detection values ​​to distinguish the positive and negative positions of the module.

[0049] The anti-reverse module installation detection system further includes a crystal oscillator circuit 10; the crystal oscillator circuit 10 is connected to the MCU module 3. The crystal oscillator circuit 10 includes a crystal oscillator unit Y2, a first capacitor C38, and a second capacitor C39; one end of the crystal oscillator unit Y2 is connected to the crystal oscillator input terminal of the MCU module 3 and one end of the first capacitor C38, and the other end of the crystal oscillator unit Y2 is connected to the crystal oscillator output terminal of the MCU module 3 and one end of the second capacitor C39, the first capacitor C38 and the second capacitor C39 are connected in parallel, and the other ends of the first capacitor C38 and the second capacitor C39 are both grounded. The crystal oscillator circuit 10 is an active crystal oscillator circuit 10.

[0050] Crystal oscillator unit Y2 is responsible for generating a stable clock signal (frequency signal). The clock signal is a crucial signal used in electronic systems to synchronize various operations; MCU module 3 relies on it for precise time control. The first capacitor C38 and the second capacitor C39 stabilize the operation of crystal oscillator unit Y2, ensuring its output signal is stable and has the correct frequency. The crystal oscillator input and output terminals of MCU module 3: the crystal oscillator signal receives the clock signal through the MCU's crystal oscillator input terminal and then transmits it to other parts of the system (output terminals) as needed. The other ends of the first capacitor C38 and the second capacitor C39 are connected to ground to ensure proper circuit operation and prevent signal interference and noise.

[0051] MCU module 3 requires a precise clock signal for data processing and control operations, and crystal oscillator circuit 10 ensures that the provided clock signal is accurate.

[0052] The above description is merely a preferred embodiment of this utility model and is not intended to limit the scope of this utility model. For those skilled in the art, this utility model can have various modifications, combinations, and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of the claims of this utility model.

Claims

1. A module reversibility detection system, characterized in that, The anti-reverse module detection system for testing communication modules includes a test fixture. The test fixture includes an MCU module, a power supply interface, a signal interface, and a power interface. The power interface and the signal interface are respectively connected to the communication module. The MCU module is equipped with an ADC interface and an analog switch connected to the power supply interface. The MCU module is connected to the power supply interface through the analog switch. The analog switch is used to control the input voltage. The ADC interface is used to detect a first ADC value when the communication module is placed in the test fixture at a first angle and a second ADC value when the communication module is placed in the test fixture at a second angle.

2. The anti-reverse module installation detection system as described in claim 1, characterized in that, The anti-reverse module installation detection system includes: a first communication interface connected to the MCU module; the MCU module receives a first communication signal from the anti-reverse module installation detection system through the first communication interface.

3. The anti-module reverse installation detection system as described in claim 2, characterized in that, The anti-reverse module installation detection system includes: an expansion module and a second communication interface connected to the communication module; the expansion module is connected to the MCU module and the second communication interface, and the communication module receives the second communication signal of the anti-reverse module installation detection system from the second communication interface through the expansion module.

4. The anti-module reverse installation detection system as described in claim 3, characterized in that, The expansion module includes: a USB HUB chip and a filtering circuit connected to the USB HUB chip; the filtering circuit is connected to the second communication interface.

5. The anti-module reverse installation detection system as described in claim 4, characterized in that, The model of the USB HUB chip includes: GL852GT-OHG12.

6. The anti-reverse module installation detection system as described in claim 1, characterized in that, The MCU module is equipped with a voltage divider circuit connected to the ADC interface.

7. The anti-module reverse installation detection system as described in claim 6, characterized in that, The voltage divider circuit includes a first resistor and a second resistor; one end of the first resistor is connected to the ADC interface and one end of the second resistor, the other end of the first resistor is connected to the MCU module, and the other end of the second resistor is connected to the power supply voltage.

8. The anti-module reverse installation detection system as described in claim 1, characterized in that, The anti-reverse module installation detection system also includes a crystal oscillator circuit; the crystal oscillator circuit is connected to the MCU module.

9. The anti-module reverse installation detection system as described in claim 8, characterized in that, The crystal oscillator circuit includes: a crystal oscillator unit, a first capacitor, and a second capacitor; one end of the crystal oscillator unit is connected to the crystal oscillator input terminal of the MCU module and one end of the first capacitor, respectively; the other end of the crystal oscillator unit is connected to the crystal oscillator output terminal of the MCU module and one end of the second capacitor, respectively; the first capacitor and the second capacitor are connected in parallel; and the other ends of the first capacitor and the second capacitor are both grounded.

10. The anti-module reverse installation detection system as described in claim 8, characterized in that, The crystal oscillator circuit is an active crystal oscillator circuit.

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