Control circuit based on PayGo mode

Abstract

The utility model provides a control circuit based on a PayGo mode, the control circuit is embedded in an electronic device, the electronic device is provided with a processor, the processor is used for generating and managing an authorization code according to payment information, the authorization code has time information, the time information represents the newly-added use duration of the electronic device, the control circuit comprises a PayGo module, the PayGo module comprises a manager, and the manager is connected with the PayGo module. The interface is coupled with the manager, the interface comprises a power supply interface and a communication interface, and the manager is coupled with the processor through the communication interface, receives the authorization code from the processor and obtains a first power supply voltage provided by the electronic equipment through the power supply interface; the timer is coupled with the manager and is used for updating the use duration according to the authorization code; the manager is further suitable for reading the use duration in the timer and outputting a trigger signal to lock the electronic equipment when the use duration is lower than the preset duration. By adopting the technical scheme, off-line operation can be supported, and the user experience is improved.

Description

Technical Field

[0001] This utility model relates to the field of installment payment technology, and in particular to a control circuit based on the PayGo model. Background Technology

[0002] In current consumer and commercial scenarios for electronic and energy products, traditional payment methods have many limitations.

[0003] Taking televisions as an example, traditionally, televisions were mainly sold through retail stores with a one-time payment or via credit card installment payments. However, this approach has significant drawbacks. Televisions are high-value consumer electronics products, and for consumers in economically disadvantaged areas, the purchasing power threshold for a one-time payment is too high, preventing them from experiencing the lifestyle benefits of watching a television. Furthermore, while credit card installment payments can alleviate the pressure of a one-time payment, many people cannot apply for or are unable to apply for credit cards, and using credit cards is inconvenient in economically disadvantaged areas.

[0004] For the reasons mentioned above, the PAYGO (Pay As You Go) payment model emerged. From a business model perspective, PAYGO payment is convenient for users. After the expiration of the usage period, the product can be reactivated and continued to be used by renewing the subscription.

[0005] However, since users only pay the initial installment, there's a possibility of unauthorized use if they don't renew, which would cause significant losses for the merchant. Currently, most PAYGO products on the market are implemented via remote network control, supporting 4G / WIFI. The product's functionality can be remotely disabled upon expiration and remotely reactivated upon user renewal.

[0006] This approach has limitations, being constrained by the network environment. For example, if the product's network functionality is blocked, uncontrollable situations may arise; or if users have already renewed their subscriptions but cannot immediately use the product due to network issues, it will negatively impact the user experience. Utility Model Content

[0007] In view of this, the present invention provides a control circuit based on the PayGo mode, which can support offline operation and improve user experience.

[0008] This utility model provides a control circuit based on the PayGo model. The control circuit is embedded in an electronic device, which has a processor. The processor generates and manages authorization codes based on payment information. The authorization codes have time information, which represents the newly added usage time of the electronic device. The control circuit includes:

[0009] The PayGo module includes: a manager, and an interface coupled to the manager, the interface including a power supply interface and a communication interface. The manager is coupled to the processor through the communication interface and receives an authorization code from the processor, and obtains a first power supply voltage provided by the electronic device through the power supply interface. Coupled with the manager, the manager is used to update a timer for usage duration based on the authorization code. The manager is also adapted to read the usage duration in the timer and output a trigger signal to lock the electronic device when the usage duration is lower than a preset duration.

[0010] Optionally, the control circuit further includes: a power supply module and a selection module, wherein:

[0011] The power supply module is coupled to the gating module and is used to provide a second power supply voltage to the gating module; the gating module is coupled to the power supply interface and the manager respectively and is used to output the larger of the second power supply voltage and the first power supply voltage to the manager;

[0012] When the control circuit is online, the first power supply voltage is greater than the second power supply voltage.

[0013] Optionally, the selection module includes: a first diode and a second diode, wherein a first end of the first diode is coupled to the power supply module, and a second end of the first diode is coupled to the manager and a second end of the second diode, respectively; the first end of the second diode is coupled to the power supply interface.

[0014] Optionally, the power supply module includes: a battery, a voltage divider composed of a first voltage divider resistor and a second voltage divider resistor, wherein a first end of the first voltage divider resistor is coupled to the battery, a second end of the first voltage divider resistor is coupled to a first end of the second voltage divider resistor and the gating module, respectively; and a second end of the second voltage divider resistor is grounded.

[0015] Optionally, the control circuit further includes:

[0016] A voltage regulator module, coupled between the power supply interface and the electronic device, includes: a transformer, an output unit, a first feedback branch, a second feedback branch, and a voltage regulator chip, wherein:

[0017] The transformer has a primary winding, a secondary winding, and a feedback winding; the first end of the primary winding is connected to the initial supply voltage, and the second end of the primary winding is coupled to the second feedback branch; the first end of the feedback winding is coupled to the first feedback branch and the power supply terminal of the voltage regulator chip respectively; the secondary winding is coupled to the output unit to provide the controller with a first supply voltage with a preset amplitude;

[0018] The first feedback branch is adapted to divide the transformer voltage through the feedback winding and output the resulting feedback voltage to the voltage feedback terminal of the voltage regulator chip.

[0019] The second feedback branch is adapted to generate a feedback current to the current feedback terminal of the voltage regulator chip based on the voltage value provided by the primary winding when it is in the selected state.

[0020] The voltage regulator chip is used to generate a control signal with a duty cycle based on the feedback current, the feedback voltage, and a preset reference voltage, and output the signal to the second feedback branch through the output terminal to change the selection state of the second feedback branch.

[0021] Optionally, the voltage regulator module satisfies at least one or more of the following:

[0022] The first feedback branch includes: a first rectifier diode and a voltage divider unit composed of a first feedback resistor and a second feedback resistor, wherein: the first end of the first rectifier diode is coupled to the first end of the feedback winding and the power supply terminal respectively; the second end of the first rectifier diode is coupled to the first end of the first feedback resistor; the second end of the first feedback resistor is coupled to the first end of the second feedback resistor and the voltage feedback terminal respectively; and the second end of the second feedback resistor is grounded.

[0023] The second feedback branch includes: a Zener diode, a second rectifier diode, a transistor, a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein: the first end of the Zener diode is coupled to the first end of the primary winding; the second end of the Zener diode is coupled to the second end of the second rectifier diode; the first end of the second rectifier diode is coupled to the second end of the primary winding and the first end of the transistor; the control terminal of the transistor is coupled to the output terminal through the first resistor; the second end of the transistor is coupled to the first end of the second resistor and the first end of the fourth resistor; the first end of the first resistor is coupled to the first end of the third resistor; the second end of the third resistor is coupled to the second end of the second resistor and grounded; and the second end of the fourth resistor is coupled to the current feedback terminal.

[0024] Optionally, the output module includes: a third rectifier diode, an energy storage capacitor, and a filter capacitor, wherein the first end of the third rectifier diode is coupled to the first end of the secondary winding, and the second end of the third rectifier diode is coupled to the first end of the energy storage capacitor and the first end of the filter capacitor, respectively, wherein the energy storage capacitor is used to output the first supply voltage;

[0025] The voltage regulator chip further includes: a compensation terminal, and a compensation resistor and a compensation capacitor coupled to the compensation terminal, wherein a first end of the compensation resistor and a first end of the compensation capacitor are coupled and connected to the compensation terminal, and a second end of the compensation resistor and two ends of the compensation capacitor are coupled and connected to the voltage feedback terminal.

[0026] Optionally, the communication interface is a hardware interface UART, and the manager and the processor communicate encrypted through the hardware interface UART;

[0027] The processor includes a first MCU; the manager includes a hardware security chip, the hardware security chip includes a second MCU, and the timer is set in the second MCU.

[0028] Optionally, the processor is also adapted to communicate with the manager via the communication interface to obtain and display the remaining usage time in the timer.

[0029] Optionally, the electronic device includes a television set and a washing machine.

[0030] Compared with the prior art, the technical solution of this utility model embodiment has the following advantages:

[0031] The control circuit based on the PayGo mode provided by this invention enables a processor in the electronic device to respond to payment information, generate and manage authorization codes, and ensure that the authorization codes contain time information, thereby determining the usage time of the electronic device. The processor forwards the authorization code to the manager, allowing the manager to update the usage time in the timer based on the authorization code. This extends the usage time of the electronic device when it expires or during normal use. Furthermore, the manager reads the usage time in the timer and outputs a trigger signal to lock the electronic device when the usage time falls below a preset duration. In other words, even when offline, the remaining usage time of the electronic device can be obtained, improving the user experience. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments of this utility model or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a control circuit for a PayGo mode in the first embodiment of the present invention;

[0034] Figure 2This is a schematic diagram of the structure of a manager in one embodiment of the present invention;

[0035] Figure 3 This is an interactive schematic diagram of the control circuit in one embodiment of the present invention;

[0036] Figure 4 This is a schematic diagram of the structure of a control circuit in the second embodiment of the present invention;

[0037] Figure 5 This is a schematic diagram of a voltage regulator module in one embodiment of the present invention. Detailed Implementation

[0038] As described in the background section, due to network limitations, such as the product's network function being blocked, uncontrollable situations may occur; or users may have renewed their subscriptions but cannot use the product immediately due to network problems, affecting user experience.

[0039] To address the aforementioned technical problems, this invention provides a control circuit for PayGo mode. A processor installed in the electronic device responds to payment information, generates and manages an authorization code, and this authorization code contains time information, thereby determining the usage duration of the electronic device. The processor forwards the authorization code to a manager, allowing the manager to update the usage duration in a timer based on the authorization code. This extends the usage duration of the electronic device when it expires or during normal use. Furthermore, by having the manager read the usage duration in the timer and output a trigger signal when the usage duration falls below a preset duration, the electronic device is locked. In other words, even when offline, the remaining usage duration of the electronic device can be obtained, improving the user experience.

[0040] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, specific embodiments of this utility model will be described below with reference to the accompanying drawings.

[0041] See Figure 1 The diagram shown below illustrates the structure of a control circuit based on the PayGo mode in the first embodiment of this utility model. Figure 1 As shown, the control circuit based on the PayGo model (not shown in the figure) can be embedded into an electronic device (not shown in the figure).

[0042] In some embodiments, the electronic device has a processor 10A, which is used to generate and manage an authorization code based on payment information. The authorization code has time information, which indicates the newly added usage time of the electronic device.

[0043] In some embodiments, the electronic device may be a television, washing machine, or other device that supports installment payments.

[0044] In some embodiments, the PayGo payment method is used, allowing users to make one or more payments to extend the usage time of electronic devices.

[0045] More specifically, the payment information specifies the time information corresponding to the authorization code at the time of payment, and the processor 10A can update the usage time of the electronic device based on this time information.

[0046] In some embodiments, "update" can refer to initial setting, an overlay operation on top of the original setting, or a reset setting.

[0047] In some embodiments, the authorization code generation process may be as follows: extract payment information (e.g., electronic device ID, renewal duration, geofence, etc.), then add anti-replay attack parameters to obtain encapsulated data; next, encrypt the encapsulated data, for example, using a dual method of AES-GCM encryption and ECDSA signature to achieve layered encryption; then, generate a transmittable string through Base64URL encoding and push it to the electronic device or generate a QR code / SMS for user input.

[0048] It should be noted that the process of generating the authorization code can also refer to the mature solutions in the existing schemes, and this utility model does not limit it in this regard.

[0049] In some embodiments, payment information can be input to the processor 10A via either key input or Bluetooth APP input.

[0050] In some embodiments, the processor 10A can communicate with a control circuit based on the PayGo mode to achieve information exchange.

[0051] In some embodiments, the processor 10A may be a first MCU.

[0052] Accordingly, the control circuit based on the PayGo model may include:

[0053] PayGo module 110 includes: a manager 112 and an interface 114 coupled to the manager 112. The interface includes a power supply interface (not shown) and a communication interface (not shown). The manager 112 is coupled to the processor 110A through the communication interface and receives an authorization code from the processor 110A. It also obtains a first power supply voltage provided by the electronic device through the power supply interface. The manager 112 is coupled to the manager 112 and is used to update a timer 116 for usage duration according to the authorization code. The manager 112 is also adapted to read the usage duration in the timer 116 and output a trigger signal to lock the electronic device when the usage duration is lower than a preset duration.

[0054] In some embodiments, the processor 110A can use a communication interface to forward the received authorization code to the manager 112. The manager 112 can verify the authorization code and, if it determines that the authorization code meets the verification conditions, transmit the authorization code to the timer 116. The authorization code contains time information, so the timer 116 can update the usage duration based on the authorization code to extend the usage time of the electronic device.

[0055] In some embodiments, upon receiving an authorization code, the manager 112 can perform a data parsing process, decoding the authorization code based on Base64 to restore it to binary data, and extracting information such as encrypted data, authentication tags, and digital signatures through field splitting. Next, it decrypts the data using a key, verifies the integrity of the ciphertext, and verifies the signature using a preset public key to confirm the legality of the data source. Then, it checks whether the electronic device ID in the authorization code matches the hardware unique identifier, confirms that the authorization time has not expired or rolled back, and verifies that the device location matches the authorized area, thus determining the usability of the authorization code. If the authorization code verification is successful, it is provided to the timer 116.

[0056] In some embodiments, the manager 112 may include a hardware security chip, such as an NXP SE050 security chip. Accordingly, the verification process of the manager 112 can be implemented through the hardware security chip.

[0057] In some embodiments, the communication interface is a hardware interface UART, and the manager 112 and the processor 10A communicate encryptedly through the hardware interface UART.

[0058] The encryption protocol can use TLS 1.3 Simplified Version, SM4 national standard encryption algorithm, etc., and each session includes dynamic key negotiation (such as ECDH exchange).

[0059] In some embodiments, the hardware security chip may include a second MCU, and correspondingly, the timer 116 may be set within the second MCU.

[0060] For example, see Figure 2 The diagram shown is a structural schematic of a manager in one embodiment of the present invention. Figure 2 As shown, the manager 112 can be an N32G031F8S7 chip, including: a communication circuit, a power supply interface and a communication interface. Among them, 3V3_IN is the power supply from the electronic device to the manager 112, that is, the first power supply voltage.

[0061] More specifically, the power supply interface PA0 (port 6) of the manager 112 is connected to the power supply interface of the electronic device to provide a first power supply voltage; in addition, the manager 112 also has power supply interfaces PA2 to PA14 (corresponding to ports 7 to 13, 17 to 20).

[0062] In some embodiments, the manager 112 has a port 5 (VDDA) through which a voltage value of 3V3 can be supplied to the manager 112.

[0063] In some embodiments, port 18 (PA10) of the manager 112 can be used as UART_RX, and port 17 (PA9) can be used as UART_TX. By setting ports 18 and 17, the data transmission process between the manager 112 and the processor 110A is realized.

[0064] Specifically, a receiving resistor R2 is set on port 18, and a transmitting resistor R3 is set on port 17.

[0065] In some embodiments, port 15 (VSS) of manager 112 is grounded, while port 16 (VDD) is grounded through capacitor C1, and port 1 (BOOTO) is grounded through resistor R1.

[0066] It should be noted that, firstly, more details about the manager 112 can be found in existing solutions; secondly, the manager 112 can also be other types of chips, and the above only lists one possible solution, which does not mean that this utility model can only use one type of chip.

[0067] In some embodiments, the manager 112 is also adapted to read the usage duration in the timer 116 and output a trigger signal to lock the electronic device when the usage duration is lower than a preset duration.

[0068] "Locking down an electronic device" refers to causing the electronic device to temporarily lose its basic functions.

[0069] For example, if the electronic device is a television, it cannot play programs; if the electronic device is a washing machine, the washing machine cannot start.

[0070] In some embodiments, the preset duration may refer to 0 hours. In other words, when the timer in timer 116 becomes 0, it means that the current usage time of the electronic device has expired, and the corresponding service cannot be provided unless payment is made again.

[0071] In this solution, when the control circuit is in online mode, the usage time of the electronic device can be updated by obtaining the authorization code; while in offline mode, the usage time in the timer can still be read to achieve the effect of making the electronic device unusable when the time expires.

[0072] In some embodiments, see Figure 3 The diagram shown is an interactive schematic of the control circuit in one embodiment of the present invention. Figure 3 As shown, the electronic device inputs payment information to the processor. Based on the payment information, the processor sends an authorization code that matches the payment information to the manager via UART. The manager performs decoding and verification operations, and after successful verification, reads the current timestamp (i.e., the current remaining usage time) from the timer.

[0073] The manager determines the expiration time based on the current timestamp and the time information in the authorization code, and writes the expiration time to the timer via the I2C bus, and the timer performs an update operation.

[0074] The timer then sends a write confirmation signal to the manager, which can then return a success code to indicate that the write operation has been completed.

[0075] In some embodiments, see next. Figure 3 The processor is also adapted to communicate with the manager via the communication interface to obtain and display the remaining usage time in the timer.

[0076] In some embodiments, a completely offline mode is used, where the timer's timing process continues to run. Therefore, when the electronic device is powered off, power needs to continue to be supplied to the counter to ensure the accuracy of the timing function.

[0077] Combination Figure 1 and Figure 2 See Figure 4 The schematic diagram of a control circuit in the second embodiment of this utility model is shown below. Figure 4 As shown, the control circuit may further include: a power supply module 120 and a gating module 130, wherein:

[0078] The power supply module 120 is coupled to the gating module 130 and is used to provide a second power supply voltage to the gating module 130; the gating module 130 is coupled to the power supply interface J1 and the manager 112 respectively and is used to output the larger of the second power supply voltage and the first power supply voltage to the manager 112.

[0079] In some embodiments, this solution incorporates a backup power supply (i.e., power supply module 120) in the control circuit, so that the power supply module 120 can still supply power to the controller when the electronic device is in a power-off state.

[0080] In some embodiments, when the control circuit is online, the first supply voltage is greater than the second supply voltage.

[0081] Specifically, the fact that the control circuit is online indicates that the electronic equipment is not powered off, and the controller can be powered by an external circuit, thereby reducing the power consumption of the power supply module and extending the offline power supply time of the control circuit.

[0082] In some embodiments, the gating module 130 may include: a first diode D1 and a second diode D2, wherein the first end of the first diode D1 is coupled to the power supply module 120, the second end of the first diode D1 is coupled to the manager 112 and the second end of the second diode D2 respectively; the first end of the second diode D2 is coupled to the power supply interface J1.

[0083] By coupling the second end of the first diode D1 to the second end of the second diode D2, the first diode D1 and the second diode D2 are turned on in a time-sharing manner, thereby realizing the time-sharing operation of the first supply voltage and the second supply voltage.

[0084] In some embodiments, the power supply module 120 may include: a battery BAT, a voltage divider consisting of a first voltage divider resistor R4 and a second voltage divider resistor R5, wherein the first end of the first voltage divider resistor R4 is coupled to the battery BAT, the second end of the first voltage divider resistor R4 is coupled to the first end of the second voltage divider resistor R5 and the gating module 130 respectively; and the second end of the second voltage divider resistor R5 is grounded.

[0085] In some embodiments, when online, the first supply voltage provided through power interface J1 is 3.3V, and the voltage output through the second terminal of the first voltage divider resistor R4 is 3V. Therefore, the second diode D2 is turned on, and the first diode D1 is turned off, thereby selecting the power supply path from power interface J1 to the controller. When offline, the first supply voltage provided through power interface J1 is 0V, and the voltage output through the second terminal of the first voltage divider resistor R4 is 3V. Therefore, the first diode D1 is turned on, and the second diode D2 is turned off, thereby selecting the power supply path from power module 120 to the controller.

[0086] In some embodiments, to improve the working stability of the controller, a voltage regulator module can be provided between the power supply interface and the controller to provide a stable first power supply voltage for the controller.

[0087] For details, see Figure 5 The diagram shown is a structural schematic of a voltage regulator module according to an embodiment of the present invention. Figure 5 As shown, the control circuit also includes: a voltage regulator module, coupled between the power supply interface and the electronic device, comprising: a transformer T, an output unit, a first feedback branch, a second feedback branch, and a voltage regulator chip U1, wherein:

[0088] The transformer T has a primary winding W1, a secondary winding W2, and a feedback winding W3; the first end of the primary winding W1 is connected to the initial supply voltage, and the second end of the primary winding W1 is coupled to the second feedback branch; the first end of the feedback winding W3 is coupled to the first feedback branch and the power supply terminal VCC of the voltage regulator chip U1; the secondary winding W2 is coupled to the output unit to provide the manager with a first supply voltage with a preset amplitude;

[0089] The first feedback branch is adapted to divide the transformer voltage through the feedback winding W3 and output the resulting feedback voltage to the voltage feedback terminal VFB of the voltage regulator chip U1.

[0090] The second feedback branch is adapted to generate a feedback current to the current feedback terminal ISEN of the voltage regulator chip U1 based on the voltage value provided by the primary winding W1 when it is in the selected state.

[0091] The voltage regulator chip U1 is used to generate a control signal with a duty cycle based on the feedback current, the feedback voltage, and a preset reference voltage, and output the signal to the second feedback branch through the output terminal to change the selection state of the second feedback branch.

[0092] In some embodiments, the primary winding W1 and the feedback winding W3 are located on the same side, and the first end of the primary winding W1 and the first end of the secondary winding W2 are the same end, and the first end of the secondary winding W2 and the second end of the feedback winding W3 are the same end.

[0093] In some embodiments, the number of turns of the primary winding W1 is greater than the number of turns of the feedback winding W3, thereby enabling a step-down operation.

[0094] More specifically, a change in the voltage on any one of the primary winding W1, secondary winding W2, and feedback winding W3 will cause changes in the voltage and / or current on the other coils. These voltage and / or current changes will act on the first and second feedback branches, thereby altering the control signal output by the voltage regulator chip U1, which in turn changes the conduction time of the second feedback branch, thus outputting a stable first supply voltage.

[0095] In some embodiments, the voltage regulator chip can be a power management chip, such as a pulse width modulation controller chip.

[0096] In some embodiments, the first feedback branch may include: a first rectifier diode D3, a voltage divider unit composed of a first feedback resistor R6 and a second feedback resistor R7, wherein: the first end of the first rectifier diode D3 is coupled to the first end of the feedback winding W3 and the power supply terminal VCC, respectively; the second end of the first rectifier diode D3 is coupled to the first end of the first feedback resistor R6; the second end of the first feedback resistor R6 is coupled to the first end of the second feedback resistor R7 and the voltage feedback terminal VFB, respectively; and the second end of the second feedback resistor R7 is grounded.

[0097] In some embodiments, based on the turns ratio of the feedback winding W3 to the secondary winding W2, the voltage divider can reflect the amplitude of the first supply voltage.

[0098] In some embodiments, the first feedback branch may include: a first feedback capacitor C2 and a second feedback capacitor C3, wherein the first end of the first feedback capacitor C2 is coupled to the first end of the second feedback capacitor C3 and the second end of the first rectifier diode D3, respectively, and the second end of the first feedback capacitor C2 is coupled to the second end of the second feedback capacitor C3 and grounded.

[0099] In some embodiments, the second feedback branch may include: a Zener diode D4, a second rectifier diode D5, a transistor M, a first resistor R8, a second resistor R9, a third resistor R10, and a fourth resistor R11, wherein: the first terminal of the Zener diode D4 is coupled to the first terminal of the primary winding W1, and the second terminal of the Zener diode D4 is coupled to the second terminal of the second rectifier diode D5; the first terminal of the second rectifier diode D5 is coupled to the second terminal of the primary winding W1 and the first terminal of the transistor M; the control terminal of the transistor M is coupled to the output terminal OUT through the first resistor R8; the second terminal of the transistor M is coupled to the first terminal of the second resistor R10 and the first terminal of the fourth resistor R11; the first terminal of the first resistor R8 is coupled to the first terminal of the third resistor R9; the second terminal of the third resistor R9 is coupled to the second terminal of the second resistor R8 and grounded; and the second terminal of the fourth resistor R11 is coupled to the current feedback terminal ISEN.

[0100] In some embodiments, the Zener diode D4 functions as a voltage regulator. When the second rectifier diode D5 is turned on, the second terminal of the Zener diode D4 is coupled to the first terminal of the transistor M, thereby turning on the transistor M. Based on the first resistor R8, the second resistor R9, the third resistor R10, and the fourth resistor R11, as well as the voltage from the Zener diode D4, a feedback current value can be provided to the current feedback terminal ISEN.

[0101] In some embodiments, the output module may include: a third rectifier diode D6, an energy storage capacitor C5, and a filter capacitor C6, wherein the first end of the third rectifier diode D6 is coupled to the first end of the secondary winding W2, and the second end of the third rectifier diode D6 is coupled to the first end of the energy storage capacitor C5 and the first end of the filter capacitor C6, respectively, wherein the energy storage capacitor C5 is used to output the first supply voltage.

[0102] In other words, when the secondary winding W2 receives the transformed voltage, it can form a charging circuit of W2-D6-C5, thereby enabling the output of a first supply voltage with a preset amplitude (e.g., 3.3V) through the power supply interface J1.

[0103] In some embodiments, the voltage regulator chip U1 may further include: a compensation terminal COMP, and a compensation resistor R12 and a compensation capacitor C4 coupled to the compensation terminal COMP, wherein the first end of the compensation resistor R12 and one end of the compensation capacitor C4 are coupled and connected to the compensation terminal CMP, and the second end of the compensation resistor R12 and the two ends of the compensation capacitor C4 are coupled and connected to the voltage feedback terminal VFB.

[0104] In some embodiments, the voltage regulator chip U1 may further include: a ground terminal GND and a reference terminal VREF, and the ground terminal GND and the reference terminal VREF are grounded through a grounding capacitor C7.

[0105] In some embodiments, the voltage regulator chip U1 may further include: an RT / CT terminal, and an oscillation capacitor C6 and an oscillation resistor R13 coupled to the RT / CT terminal, wherein the first end of the oscillation capacitor C6 is coupled to the first end of the oscillation resistor R13 and connected to the RT / CT terminal, and the second end of the oscillation capacitor C6 is grounded; the second end of the oscillation resistor R13 is connected to the grounded capacitor C7.

[0106] In addition, the voltage regulator chip U1 can also be coupled to the capacitor C5 at the current feedback terminal ISEN.

[0107] Therefore, by embedding control circuits based on the PayGo model into electronic products, it is possible to meet the market demand for installment sales of products.

[0108] It should be noted that the above description describes multiple embodiments of the present invention. The optional methods described in each embodiment can be combined and cross-referenced without conflict, thereby extending to a variety of possible embodiments. These can all be considered as embodiments of the present invention.

[0109] It should be noted that the term "an embodiment" or "embodiment" in this utility model refers to a specific feature, structure, or characteristic that can be included in at least one implementation of this utility model. Furthermore, in the description of this utility model, terms such as "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with terms such as "first," "second," etc., may explicitly or implicitly include one or more of that feature. Moreover, terms such as "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or indicate importance. It is understood that such terms can be interchanged where appropriate so that the embodiments of this utility model described herein can be implemented in a sequence other than that shown in the illustrations or description.

[0110] While the embodiments of this utility model have been disclosed above, this utility model is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this utility model; therefore, the scope of protection of this utility model should be determined by the scope defined in the claims.

Claims

1. A control circuit based on the PayGo model, characterized in that, The control circuit is embedded in an electronic device, which has a processor for generating and managing authorization codes based on payment information. The authorization codes contain time information representing the newly added usage time of the electronic device. The control circuit includes: The PayGo module includes: a manager, and an interface coupled to the manager, the interface including a power supply interface and a communication interface. The manager is coupled to the processor through the communication interface and receives an authorization code from the processor, and obtains a first power supply voltage provided by the electronic device through the power supply interface. Coupled with the manager, the manager is used to update a timer for usage duration based on the authorization code. The manager is also adapted to read the usage duration in the timer and output a trigger signal to lock the electronic device when the usage duration is lower than a preset duration.

2. The control circuit according to claim 1, characterized in that, The control circuit further includes: a power supply module and a selection module, wherein: The power supply module is coupled to the gating module and is used to provide a second power supply voltage to the gating module; the gating module is coupled to the power supply interface and the manager respectively and is used to output the larger of the second power supply voltage and the first power supply voltage to the manager; When the control circuit is online, the first power supply voltage is greater than the second power supply voltage.

3. The control circuit according to claim 2, characterized in that, The selection module includes a first diode and a second diode, wherein the first end of the first diode is coupled to the power supply module, the second end of the first diode is coupled to the manager and the second end of the second diode respectively; and the first end of the second diode is coupled to the power supply interface.

4. The control circuit according to claim 2, characterized in that, The power supply module includes: a battery and a voltage divider composed of a first voltage divider resistor and a second voltage divider resistor, wherein the first end of the first voltage divider resistor is coupled to the battery, the second end of the first voltage divider resistor is coupled to the first end of the second voltage divider resistor and the gating module respectively; the second end of the second voltage divider resistor is grounded.

5. The control circuit according to claim 1, characterized in that, The control circuit also includes: A voltage regulator module, coupled between the power supply interface and the electronic device, includes: a transformer, an output unit, a first feedback branch, a second feedback branch, and a voltage regulator chip, wherein: The transformer has a primary winding, a secondary winding, and a feedback winding; the first end of the primary winding is connected to the initial supply voltage, and the second end of the primary winding is coupled to the second feedback branch; the first end of the feedback winding is coupled to the first feedback branch and the power supply terminal of the voltage regulator chip respectively; the secondary winding is coupled to the output unit to provide the manager with a first supply voltage with a preset amplitude; The first feedback branch is adapted to divide the transformer voltage through the feedback winding and output the resulting feedback voltage to the voltage feedback terminal of the voltage regulator chip. The second feedback branch is adapted to generate a feedback current to the current feedback terminal of the voltage regulator chip based on the voltage value provided by the primary winding when it is in the selected state. The voltage regulator chip is used to generate a control signal with a duty cycle based on the feedback current, the feedback voltage, and a preset reference voltage, and output the signal to the second feedback branch through the output terminal to change the selection state of the second feedback branch.

6. The control circuit according to claim 5, characterized in that, The voltage regulator module satisfies at least one or more of the following: The first feedback branch includes: a first rectifier diode and a voltage divider unit composed of a first feedback resistor and a second feedback resistor, wherein: the first end of the first rectifier diode is coupled to the first end of the feedback winding and the power supply terminal respectively; the second end of the first rectifier diode is coupled to the first end of the first feedback resistor; the second end of the first feedback resistor is coupled to the first end of the second feedback resistor and the voltage feedback terminal respectively; and the second end of the second feedback resistor is grounded. The second feedback branch includes: a Zener diode, a second rectifier diode, a transistor, a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein: the first end of the Zener diode is coupled to the first end of the primary winding; the second end of the Zener diode is coupled to the second end of the second rectifier diode; the first end of the second rectifier diode is coupled to the second end of the primary winding and the first end of the transistor; the control terminal of the transistor is coupled to the output terminal through the first resistor; the second end of the transistor is coupled to the first end of the second resistor and the first end of the fourth resistor; the first end of the first resistor is coupled to the first end of the third resistor; the second end of the third resistor is coupled to the second end of the second resistor and grounded; and the second end of the fourth resistor is coupled to the current feedback terminal.

7. The control circuit according to claim 5, characterized in that, The output module includes a third rectifier diode, an energy storage capacitor, and a filter capacitor. The first end of the third rectifier diode is coupled to the first end of the secondary winding, and the second end of the third rectifier diode is coupled to the first end of the energy storage capacitor and the first end of the filter capacitor, respectively. The energy storage capacitor is used to output the first supply voltage. The voltage regulator chip further includes: a compensation terminal, and a compensation resistor and a compensation capacitor coupled to the compensation terminal, wherein a first end of the compensation resistor and a first end of the compensation capacitor are coupled and connected to the compensation terminal, and a second end of the compensation resistor and two ends of the compensation capacitor are coupled and connected to the voltage feedback terminal.

8. The control circuit according to claim 1, characterized in that, The communication interface is a hardware interface UART, and the manager and the processor communicate encryptedly through the hardware interface UART. The processor includes a first MCU; the manager includes a hardware security chip, the hardware security chip includes a second MCU, and the timer is set in the second MCU.

9. The control circuit according to claim 1, characterized in that, The processor is also adapted to communicate with the manager via the communication interface to obtain and display the remaining usage time in the timer.

10. The control circuit according to claim 1, characterized in that, The electronic devices include televisions and washing machines.

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