Surge suppression circuit controlled by hard switch of MOS (Metal Oxide Semiconductor) tube

Abstract

The utility model discloses an MOS tube hard switch control surge suppression circuit, which belongs to the technical field of power electronics, and comprises a control circuit, a drive circuit and a power switch circuit, the power switch circuit is composed of a high-power suppression resistor, a first MOS tube and a second MOS tube, the first MOS tube and the second MOS tube are connected in parallel, the source electrode of the MOS tube is connected with the positive electrode of the output power supply through the high-power suppression resistor, and the drain electrode of the MOS tube is connected with the negative electrode of the output power supply. Compared with the prior art, the control circuit of the circuit can automatically detect the voltage and change the conducting state of the triode based on the change of the voltage so as to control the on-off state of the MOS tube, when the voltage is too large, the high-power suppression resistor will intervene in the circuit to consume the voltage spike, it is ensured that the rear-end power supply voltage is stable, and the purpose of protecting rear-end equipment is achieved.

Description

TECHNICAL FIELD

[0001] The utility model belongs to power electronics technical field especially relates to a MOS pipe hard switch control surge suppression circuit. BACKGROUND

[0002] In power electronics system, surge voltage / current is one of the key factors leading to equipment damage. Especially in switching power supply, motor drive, inverter and other scenes, MOS tube as the core switching device, its hard switch operation can cause transient voltage peak due to parasitic parameters (such as inductance, capacitance). For example, the initial charging process of large-capacity filter capacitor can produce a surge current as high as tens of times, and the rapid turn-off of inductive load can cause high-voltage pulse due to reverse electromotive force. The existing surge suppression circuit relies on imported integrated chip, and the traditional RC delay or relay scheme cannot adapt to voltage changes in real time, which is prone to misoperation or delayed protection, and is difficult to meet the needs of high-frequency scenes.

[0003] In military power supply components, military standard requirements are strict, and dependence on foreign special integrated chips should be reduced as much as possible. Therefore, how to design a MOS tube hard switch control surge suppression circuit to solve the above technical problems has long plagued the technical personnel in the field. SUMMARY

[0004] In view of the above technical problems, the utility model provides a MOS tube hard switch control surge suppression circuit, which solves the above problems through the following technical means:

[0005] A MOS tube hard switch control surge suppression circuit, characterized by comprising a control circuit, a driving circuit and a power switch circuit, wherein: the control circuit is composed of a three-terminal voltage regulator and an optoelectronic coupling element, the positive electrode of an input power supply is connected to the control end of the three-terminal voltage regulator through a first voltage dividing circuit, the anode of the three-terminal voltage regulator is connected to the negative electrode of the input power supply, the cathode of the three-terminal voltage regulator is connected to the second port of the optoelectronic coupling element, the first port of the optoelectronic coupling element is connected to the positive electrode of the input power supply through the series connection of a first voltage stabilizing tube and a second voltage stabilizing tube, and the third port of the optoelectronic coupling element is connected to the negative electrode of the input power supply; the driving circuit comprises a triode, one way of the base of the triode is connected to the fourth port of the optoelectronic coupling element, the other way of the base of the triode is connected to the positive electrode of the input power supply through a second voltage dividing circuit, one way of the collector of the triode is connected to the positive electrode of the input power supply through the series connection of a seventh resistor and an eighth resistor, the other way of the collector of the triode is connected to the gate of a first MOS tube and the gate of a second MOS tube through a ninth resistor, and the emitter of the triode is connected to the negative electrode of the input power supply; the power switch circuit is composed of a high-power suppression resistor, the first MOS tube and the second MOS tube, the first MOS tube and the second MOS tube are connected in parallel to each other, the source of the MOS tube is connected to the positive electrode of an output power supply through the high-power suppression resistor, and the drain of the MOS tube is connected to the negative electrode of the output power supply.

[0006] Preferably, the first voltage dividing circuit further comprises a second resistor, an eleventh resistor, a twelfth resistor and a thirteenth resistor connected in series between the positive input power supply terminal and the negative input power supply terminal, and a voltage dividing point is arranged between the second resistor and the eleventh resistor.

[0007] Preferably, the second voltage dividing circuit further comprises a third resistor, a fourth resistor, a fifth resistor and a sixth resistor connected in series between the positive input power supply terminal and the negative input power supply terminal, and a voltage dividing point is arranged between the fifth resistor and the sixth resistor.

[0008] Preferably, the circuit further comprises a fourth diode connected in parallel with the high-power suppression resistor.

[0009] Preferably, the circuit further comprises a bottom shell and a cover plate for mounting the circuit, wherein: the bottom shell is composed of a square cavity and a semicircular cavity which are in communication with each other, a plurality of connecting platforms are symmetrically arranged at the inner edge of the bottom shell, a through hole is arranged in the middle of the bottom shell, a sealing ring is arranged at the edge of the through hole, and a plurality of groups of heat dissipation fins are arranged on the arc surface of the semicircular cavity; the cover plate is provided with connecting holes corresponding to the connecting platforms, a center connecting pipe is arranged on the cover plate, the center connecting pipe is consistent in size with the through hole, and the end edge of the center connecting pipe can be sealingly inserted into the through hole; a plurality of bottom shells and cover plates can be stacked with each other.

[0010] The MOS tube hard switch control surge suppression circuit has the following beneficial effects:

[0011] The circuit can automatically detect voltage, change the conduction state of the triode based on the change of the voltage, control the switching state of the MOS tube, consume the voltage peak through the high-power suppression resistor when the voltage is too large, ensure the stability of the back-end power supply voltage, achieve the purpose of protecting the back-end equipment, can adapt to voltage changes in real time, does not exist easy misoperation or delay protection, and can meet the demand of high-frequency scene. In addition, the circuit can use a plurality of domestic discrete devices to reduce the dependence of the circuit on foreign special power supply chips. The special shell used in the circuit has the advantages of compact structure, good sealing performance, good heat dissipation performance and mutual stacking, and is particularly suitable for use in a small space of a missile. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the technical scheme of the present application, the following will briefly introduce the drawings needed in the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creating laborious work.

[0013] Fig. 1 is a schematic diagram of the overall circuit of the present application;

[0014] Fig. 2 is a mounting schematic diagram of the present application;

[0015] Fig. 3 is a heat dissipation fin structure schematic diagram of the utility model;

[0016] Fig. 4 is a center connecting pipe structure schematic diagram of the utility model.

[0017] Wherein, 1 - bottom shell, 101 - square cavity, 102 - semicircular cavity, 103 - connecting table, 104 - through hole, 105 - heat dissipation fin, 2 - cover plate, 201 - connecting hole, 202 - center connecting pipe. DETAILED DESCRIPTION

[0018] In the description of the utility model, it is understood that the orientation or position relationship indicated by the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the utility model. The terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features. In the description of the utility model, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0019] The utility model will be described in detail below in combination with the drawings.

[0020] As shown in Figure 1, the MOS hard switch control surge suppression circuit includes a control circuit, a drive circuit and a power switch circuit, wherein: the control circuit is composed of a three-terminal voltage regulator U1 and an optoelectronic coupling element U2, the input power supply positive Vin+ is connected to the control end of the three-terminal voltage regulator U1 through a first voltage dividing circuit, the anode of the three-terminal voltage regulator U1 is connected to the input power supply negative Vin-, the cathode of the three-terminal voltage regulator U1 is connected to the second port of the optoelectronic coupling element U2, the first port of the optoelectronic coupling element U2 is connected to the input power supply positive Vin+ through the first voltage stabilizing tube D1 and the second voltage stabilizing tube D2 in series, and the third port of the optoelectronic coupling element U2 is connected to the input power supply negative Vin-; the drive circuit includes a triode Q1, one path of the base of the triode Q1 is connected to the fourth port of the optoelectronic coupling element U2, the other path of the base of the triode Q1 is connected to the input power supply positive Vin+ through a second voltage dividing circuit, one path of the collector of the triode Q1 is connected to the input power supply positive Vin+ through the seventh resistor R7 and the eighth resistor R8 in series, the other path of the collector of the triode Q1 is connected to the gate of the first MOS Q1 and the gate of the second MOS Q2 through the ninth resistor R9, and the emitter of the triode Q1 is connected to the input power supply negative Vin-; the power switch circuit is composed of a large power suppression resistor R15, the first MOS Q1 and the second MOS Q2, the first MOS Q1 and the second MOS Q2 are connected in parallel to each other, the source of the MOS is connected to the output power supply positive Vout+ through the large power suppression resistor R15, and the drain of the MOS is connected to the output power supply negative Vout-.

[0021] In the embodiment, the first voltage dividing circuit includes the second resistor R2, the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13 connected in series between the input power supply positive Vin+ and the input power supply negative Vin-, and the voltage dividing point is arranged between the second resistor R2 and the eleventh resistor R11. The second voltage dividing circuit includes the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 connected in series between the input power supply positive Vin+ and the input power supply negative Vin-, and the voltage dividing point is arranged between the fifth resistor R5 and the sixth resistor R6. The fourth diode D4 is connected in parallel to the large power suppression resistor R15.

[0022] In specific work, the resistance R11 to R13 and R2 are calculated, and the work of U1 is controlled to control the work and shutdown of U2; after the power supply voltage is powered on, the voltage does not reach the set value, and U2 does not work; Q1 starts by R6 voltage division to connect Q2 gate to ground, and Q2 does not work; after the voltage exceeds the set value, U1 works to control U2 to turn on, the base voltage of Q1 is pulled down to be not conductive, Q2 / Q3 is conductive through R10 voltage division, and forms a loop with R15 to consume voltage spikes, ensures the stability of the back-end power supply voltage, and achieves the purpose of protecting the back-end equipment.

[0023] It should be noted that the circuit can automatically detect the voltage, change the conduction state of the transistor based on the change of the voltage, control the switching state of the MOS tube, when the voltage is too large, the large power resistor is inserted into the circuit to consume the voltage spike, ensures the smoothness of the back-end power supply voltage, realizes the purpose of protecting the back-end equipment, can adapt to voltage changes in real time, there is no easy misoperation or delayed protection, can meet the demand of high frequency scene.

[0024] As shown in Figures 2-4, it also includes a bottom shell 1 and a cover plate 2 for installing the circuit, wherein: the bottom shell 1 is composed of a square cavity 101 and a semicircular cavity 102 which are in communication with each other, a plurality of connection tables 103 are symmetrically arranged at the inner edge of the bottom shell 1, a through hole 104 is arranged at the middle of the bottom shell 1, a sealing ring is arranged at the edge of the through hole 104, and a plurality of heat dissipation fins 105 are arranged on the arc surface of the semicircular cavity 102; the cover plate 2 is provided with a plurality of connection holes 201 corresponding to the connection tables 103, and a center connection pipe 202 is arranged on the cover plate 2, the center connection pipe 202 is consistent with the size of the through hole 104, and the end edge of the center connection pipe 202 can be sealingly inserted into the through hole 104; the sealing shell composed of a plurality of bottom shells 1 and cover plates 2 can be arranged in a stacked manner.

[0025] In practical application, the circuit can reduce the dependence on foreign special power supply chips by using a plurality of domestic discrete devices, the special shell used by the circuit has compact structure, good sealing performance and good heat dissipation performance, and can be stacked, and is particularly suitable for missile-borne narrow space.

[0026] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A MOSFET hard-switching control surge suppression circuit, characterized in that, It includes control circuits, drive circuits, and power switching circuits, among which: The control circuit consists of a three-terminal Zener diode (U1) and an optocoupler (U2). The positive terminal (Vin+) of the input power supply is connected to the control terminal of the three-terminal Zener diode (U1) through a first voltage divider circuit. The anode of the three-terminal Zener diode (U1) is connected to the negative terminal (Vin-) of the input power supply. The cathode of the three-terminal Zener diode (U1) is connected to the second port of the optocoupler (U2). The first port of the optocoupler (U2) is connected to the positive terminal (Vin+) of the input power supply through a series connection of a first Zener diode (D1) and a second Zener diode (D2). The third port of the optocoupler (U2) is connected to the negative terminal (Vin-) of the input power supply. The driving circuit includes a transistor (Q1). One path of the base of the transistor (Q1) is connected to the fourth port of the optocoupler (U2). The other path of the base of the transistor (Q1) is connected to the positive terminal of the input power supply (Vin+) through a second voltage divider circuit. One path of the collector of the transistor (Q1) is connected to the positive terminal of the input power supply (Vin+) through a series connection of a seventh resistor (R7) and an eighth resistor (R8). The other path of the collector of the transistor (Q1) is connected to the gate of the first MOSFET (Q1) and the gate of the second MOSFET (Q2) through a ninth resistor (R9). The emitter of the transistor (Q1) is connected to the negative terminal of the input power supply (Vin-). The power switching circuit consists of a high-power suppression resistor (R15), a first MOSFET (Q1), and a second MOSFET (Q2). The first MOSFET (Q1) and the second MOSFET (Q2) are connected in parallel. The source of the MOSFET is connected to the positive terminal (Vout+) of the output power supply through the high-power suppression resistor (R15), and the drain of the MOSFET is connected to the negative terminal (Vout-) of the output power supply.

2. The MOS transistor hard-switching control surge suppression circuit according to claim 1, characterized in that, It also includes a first voltage divider circuit comprising a second resistor (R2), an eleventh resistor (R11), a twelfth resistor (R12), and a thirteenth resistor (R13) connected in series between the positive terminal (Vin+) and the negative terminal (Vin-) of the input power supply, with the voltage divider point set between the second resistor (R2) and the eleventh resistor (R11).

3. The MOS transistor hard-switching control surge suppression circuit according to claim 1, characterized in that, It also includes a second voltage divider circuit consisting of a third resistor (R3), a fourth resistor (R4), a fifth resistor (R5), and a sixth resistor (R6) connected in series between the positive terminal (Vin+) and the negative terminal (Vin-) of the input power supply, with the voltage divider point set between the fifth resistor (R5) and the sixth resistor (R6).

4. The MOS transistor hard-switching control surge suppression circuit according to claim 1, characterized in that, It also includes a fourth diode (D4) connected in parallel with the high-power suppression resistor (R15).

5. The MOS transistor hard-switching control surge suppression circuit according to claim 1, characterized in that, It also includes a base (1) and a cover plate (2) for mounting the circuit, wherein: The bottom shell (1) is composed of interconnected square cavities (101) and semi-circular cavities (102). Multiple connecting platforms (103) are symmetrically arranged at the inner edge of the bottom shell (1). A through hole (104) is provided in the middle of the bottom shell (1). A sealing ring is installed on the edge of the through hole (104). Multiple sets of heat dissipation fins (105) are provided on the arc surface of the semi-circular cavity (102). The cover plate (2) is provided with a connecting hole (201) corresponding to the connecting platform (103), and a central connecting pipe (202) is provided on the cover plate (2). The central connecting pipe (202) is the same size as the through hole (104), and the end edge of the central connecting pipe (202) can be sealed and inserted into the through hole (104). The sealed housing consisting of multiple bottom shells (1) and cover plates (2) can be stacked on top of each other.

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