Printed circuit board and electronic product
By employing a coaxially distributed shielding and signal via design in the printed circuit board, combined with the use of a shielding filler layer and an electroplating layer, the problems of poor shielding effect of signal vias and low interconnection efficiency of multilayer boards are solved, achieving stable transmission of high-frequency signals and improving production efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-15
- Publication Date
- 2026-04-07
AI Technical Summary
Existing high-density interconnect printed circuit boards have limited shielding hole sizes around signal holes, resulting in high signal loss, long processing cycles, high costs, and low interconnection efficiency.
The design employs coaxially distributed shielding and signal holes, with the annular gap filled with a shielding filler layer and an electroplated layer. A sintered layer is also provided on the end face of the sub-board to achieve interconnection. The shielding filler layer suppresses signal leakage, the electroplated layer ensures stable signal transmission, and the sintered layer improves interconnection efficiency.
It achieves comprehensive shielding and stable transmission of high-frequency signals, shortens the production cycle, reduces costs, and improves product yield and production efficiency.
Smart Images
Figure CN224097899U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the field of printed circuit board especially relates to a printed circuit board and electronic product. BACKGROUND
[0002] With the rapid development of communication electronic technology, high frequency microwave products and high speed digital equipment put forward higher requirements to the integration, miniaturization and signal stability of printed circuit board. In order to reduce signal loss in the transmission process of signal hole, the existing high density interconnection (HDI) board usually sets a circle of closely arranged shielding holes around the signal hole, that is, a plurality of shielding holes are drilled around, similar to plum blossom shape. However, due to the size limitation (usually not less than 0.25 millimeter) of closely arranged shielding holes, there is a certain hole wall, and affected by material performance and processing technology, the possibility of breaking through the size of the existing hole wall is very low, which has been unable to meet the transmission of higher frequency band signals. In addition, the interlayer interconnection of multilayer high density interconnection board usually adopts layer-by-layer stacking process, which needs to repeatedly carry out drilling, electroplating and pressing and other processes, resulting in long processing period and high manufacturing cost.
[0003] Therefore, how to realize the omnidirectional signal shielding of signal hole and improve the interconnection efficiency of multistage high density interconnection board has become a problem to be solved. SUMMARY
[0004] The utility model provides a kind of printed circuit board and electronic product to solve the omnidirectional signal shielding effect of existing signal hole is poor and the interconnection efficiency of multistage high density interconnection board is low.
[0005] To solve the above problems, the utility model adopts the following technical solutions:
[0006] First, a kind of printed circuit board is provided, and the printed circuit board comprises:
[0007] First subboard is provided with coaxially distributed shielding hole and signal hole, the diameter of the signal hole is less than the diameter of the shielding hole, to form annular gap between the shielding hole and the signal hole, shielding filling layer and first electroplated layer in contact with the shielding filling layer are provided in the annular gap;
[0008] Sintered layer is arranged on the upper and lower end faces of the first subboard, for realizing interconnection between adjacent subboards.
[0009] In an embodiment, the first subboard includes a second electroplated layer.
[0010] The second electroplated layer is attached to the first electroplated layer and the shielding filling layer.
[0011] In an embodiment, the thickness of the second electroplated layer and the first electroplated layer is 15 ~80 .
[0012] In an embodiment, the thickness of the shielding filling layer ranges from 20 ~100 .
[0013] In an embodiment, the material of the shielding filling layer comprises polytetrafluoroethylene resin, epoxy resin, BT resin, via resin or via ink.
[0014] In an embodiment, the first sub-board further comprises a first copper clad layer and a second copper clad layer.
[0015] The lower surface of the first copper clad layer is attached to the upper end surface of the first electroplated layer and covers the upper port of the signal hole.
[0016] The upper surface of the second copper clad layer is attached to the lower end surface of the first electroplated layer and covers the lower port of the signal hole.
[0017] In an embodiment, the printed circuit board further comprises a second sub-board and a third sub-board, and the sintering layer comprises a first sintering layer and a second sintering layer.
[0018] The first sintering layer is arranged on the upper surface of the first copper clad layer, and the second sintering layer is arranged on the lower surface of the second copper clad layer.
[0019] The lower end surface of the second sub-board is attached to the first sintering layer, and the upper end surface of the third sub-board is attached to the second sintering layer.
[0020] In an embodiment, the first sub-board comprises a one-level high-density interconnection sub-board or a multi-level high-density interconnection sub-board, the second sub-board comprises a one-level high-density interconnection sub-board or a multi-level high-density interconnection sub-board, and / or the third sub-board comprises a one-level high-density interconnection sub-board or a multi-level high-density interconnection sub-board.
[0021] In an embodiment, the sintering layer is made of any of the following materials: copper paste, silver paste or a mixture of copper core ball and silver paste.
[0022] In a second aspect, an electronic product is provided, which comprises the printed circuit board of the first aspect.
[0023] The utility model provides a kind of printed circuit board and electronic product, the printed circuit board includes: first subboard, it is equipped with coaxial distribution's shield hole and signal hole, the diameter of the signal hole is less than the diameter of the shield hole, to form annular gap between the shield hole and the signal hole, shielding filler layer and the first electroplated layer being in contact with the shielding filler layer are equipped in the annular gap;Sintering layer is arranged in the upper and lower end surface of the first subboard, for realizing interconnection between adjacent subboard. In the embodiment, by setting coaxial distribution's shield hole and signal hole on first subboard, annular gap is formed between the two and is filled with shielding material and electroplated material respectively, shielding filler layer and the first electroplated layer are formed, effectively inhibit high-frequency signal leakage and electromagnetic interference by shielding filler layer, effectively guarantee the stable transmission of high-frequency band signal by the first electroplated layer, realize the dual function of electromagnetic shielding and signal transmission;And sintering layer is arranged in the upper and lower end surface of the first subboard, realizes electrical interconnection and mechanical fixation between adjacent subboard, effectively improves the interconnection efficiency of multilayer circuit board, shortens production cycle, effectively reduces time and cost in traditional layer-by-layer stacking processing, improves product yield and production efficiency. BRIEF DESCRIPTION OF DRAWINGS
[0024] In order to more clearly illustrate the technical scheme of the embodiments of the utility model, the following will be briefly introduced the drawings needed to be used in the description of the embodiments of the utility model, obviously, the drawings in the following description only some embodiments of the utility model, for those skilled in the art, under the premise of not paying the creative labor, other drawings can also be obtained according to these drawings.
[0025] Figure 1 It is a schematic diagram of printed circuit board in an embodiment of the utility model;
[0026] Figure 2 It is a raw schematic diagram of first subboard in an embodiment of the utility model;
[0027] Figure 3 It is a processing schematic diagram of first subboard in an embodiment of the utility model;
[0028] Figure 4 It is another processing schematic diagram of first subboard in an embodiment of the utility model;
[0029] Figure 5 It is another processing schematic diagram of first subboard in an embodiment of the utility model;
[0030] Figure 6 It is another processing schematic diagram of first subboard in an embodiment of the utility model;
[0031] Figure 7 It is another processing schematic diagram of first subboard in an embodiment of the utility model;
[0032] Figure 8 is another processing schematic view of the first sub-board in an embodiment of the utility model;
[0033] Figure 9 is a processing completed schematic view of the first sub-board in an embodiment of the utility model.
[0034] Among them, each reference sign is as follows:
[0035] 1, first sub-board;11, shielding filling layer;12, first electroplating layer;13, signal hole;14, second electroplating layer;15, first copper-clad layer;16, second copper-clad layer;17, first sintering layer;18, second sintering layer;19, shielding hole;
[0036] 2, second sub-board;3, third sub-board. DETAILED DESCRIPTION
[0037] The technical scheme in the embodiments of the utility model will be described clearly and completely below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.
[0038] In the description of the utility model, it is understood that the orientation or position relationship indicated by the terms "longitudinal", "radial", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like is the orientation or position relationship shown in the drawings, and is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the utility model. In the description of the utility model, unless otherwise specified, the meaning of "a plurality of" is two or more.
[0039] In the description of the utility model, it is necessary to point out that, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected;It can be mechanically connected, or it can be electrically connected;It can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.
[0040] In order to thoroughly understand the utility model, please refer toFigures 1 to 9 The detailed structure and steps are proposed in the following description, so as to explain the technical solutions proposed by the utility model. The preferred embodiments of the utility model are described in detail as follows, however, in addition to these detailed descriptions, the utility model can also have other implementation manners.
[0041] In a first aspect, as shown in the drawings, a printed circuit board is provided, comprising: a first sub-board 1, provided with coaxially distributed shield holes 19 and signal holes 13, the diameter of the signal holes 13 being smaller than the diameter of the shield holes 19, so as to form an annular gap between the shield holes 19 and the signal holes 13, the annular gap being provided with a shield filling layer 11 and a first electroplated layer 12 in contact with the shield filling layer 11; a sintering layer, arranged on the upper and lower end faces of the first sub-board 1, for realizing interconnection between adjacent sub-boards. Figure 1 As an example, the diameter of the shield holes 19 can be set to a range of 0.3mm~4.0mm, preferably, the diameter of the shield holes 19 can be 0.5mm, 1.0mm, 2.0mm or 3.0mm; the diameter of the signal holes 13 can be set to a range of 0.1mm~3.0mm, preferably, the diameter of the signal holes 13 can be set to 0.2mm, 0.5mm, 1.0mm or 2.0mm, which is only an example and does not constitute a limitation to the utility model.
[0042] For example, the diameter of the shield holes 19 can be set to 0.5mm, and the diameter of the signal holes 13 can be set to 0.2mm, both of which are coaxially arranged, and the diameter of the signal holes 13 is smaller than the diameter of the shield holes 19, so as to form an annular gap therebetween.
[0043] The annular gap is provided with the shield filling layer 11 and the first electroplated layer 12 in contact with the shield filling layer 11, that is, the shield material can be filled in the annular gap first, and after solidification, the shield filling layer 11 is formed by using a drilling process, and then a first electroplated layer 12 is electroplated on one side of the formed shield filling layer 11 by using an integrated electroplating process, the first electroplated layer 12 is tightly combined with the shield filling layer 11, so as to form the shield filling layer 11 and the first electroplated layer 12 in contact with the shield filling layer 11 in the annular gap.
[0044]
[0045] The shielding material includes non-conductive materials such as polytetrafluoroethylene resin, epoxy resin, BT resin, plug resin, or plug ink. The material of the shielding filling layer 11 includes non-conductive materials such as polytetrafluoroethylene resin, epoxy resin, BT resin, plug resin, or plug ink. The above-mentioned materials can be selected according to the shielding requirements of the target frequency band (such as 1 GHz-100 GHz). For example, polytetrafluoroethylene resin material can be selected for the 5G millimeter wave frequency band (24 GHz-100 GHz) to reduce loss.
[0046] The sintering layer is arranged on the upper and lower end faces of the first sub-plate 1 to realize interconnection with adjacent sub-plates. It can be understood that any of the following materials can be selected to manufacture the sintering layer on the upper and lower end faces of the first sub-plate 1 with a hole-in-hole structure: copper paste, silver paste, or a mixed material of copper core ball and silver paste. Then, the sintering layer can realize interconnection with adjacent sub-plates through preheating and high-temperature sintering.
[0047] Through the above arrangement, the continuous transmission of signals is ensured, and signal leakage and electromagnetic interference caused by the limited size of the hole wall are effectively prevented. The interconnection efficiency of the multi-layer sub-plate is effectively improved, the production cycle is shortened, the time and cost in the traditional layer-by-layer stacking process are effectively reduced, and the yield and production efficiency of the product are improved.
[0048] In an embodiment, the first sub-plate 1 includes a second electroplated layer 14; the second electroplated layer 14 is attached to the first electroplated layer 12 and the shielding filling layer 11.
[0049] As an example, the outer end face of the second electroplated layer 14 can be attached to the inner end face of the first electroplated layer 12 and the first side end face of the shielding filling layer 11, so as to realize the close attachment of the second electroplated layer 14 to the first electroplated layer 12 and the shielding filling layer 11. By arranging the second electroplated layer 14, a complete metal shell is formed relative to the shielding filling layer 11. Even if the transmitted signal escapes to the outside through the shielding filling layer 11, it will be reflected into the signal hole 13 when it encounters the second electroplated layer 14, further realizing the all-around signal shielding of the signal hole 13, and being suitable for high-frequency signal shielding.
[0050] In an embodiment, the thickness of the second electroplated layer 14 and the first electroplated layer 12 is in the range of 15 ~80 .
[0051] As an example, the thickness of the second electroplated layer 14 and the first electroplated layer 12 can be 20 , 30 , 40 , 50 , 60 , or 70 The thickness of the second electroplating layer 14 can be set as 20 The thickness of the first electroplating layer 12 can be set as 30 The thickness setting can ensure the close adhesion between the layers and form a high-quality interlayer contact interface, effectively shorten the signal transmission path, and improve the impedance matching accuracy.
[0052] In an embodiment, the thickness of the shielding filling layer 11 can range from 20 to 100 .
[0053] Preferably, the thickness of the shielding filling layer 11 can be 30 , 40 , 50 , 60 , 70 , 80 , or 90 . The above thickness range of the shielding filling layer 11 can ensure good electromagnetic shielding effectiveness, effectively improve the overall mechanical strength and signal transmission performance of the printed circuit board.
[0054] It should be understood that the thickness of the shielding filling layer 11 is reasonably selected to reduce signal crosstalk and improve electromagnetic compatibility, thereby meeting the requirements of high-speed signal transmission and multi-band applications, which does not constitute a limitation on the utility model.
[0055] In an embodiment, the first sub-board 1 further comprises a first copper-clad layer 15 and a second copper-clad layer 16; the lower surface of the first copper-clad layer 15 is attached to the upper end surface of the first electroplating layer 12 and covers the upper port of the signal hole 13; the upper surface of the second copper-clad layer 16 is attached to the lower end surface of the first electroplating layer 12 and covers the lower port of the signal hole 13.
[0056] As an example, the first copper-clad layer 15 can be firmly combined with the upper end surface of the first electroplating layer 12 by hot pressing or chemical bonding process, and the size is sufficient to completely cover the upper port of the signal hole 13; similarly, the second copper-clad layer 16 is tightly attached to the lower end surface of the first electroplating layer 12 by the same process and covers the lower port of the signal hole 13. Through the above setting, the first sub-board 1 is connected with the adjacent sub-boards.
[0057] In an embodiment, as Figure 1As shown, the printed circuit board further comprises a second sub-board 2 and a third sub-board 3, and the sintering layer comprises a first sintering layer 17 and a second sintering layer 18; the first sintering layer 17 is arranged on the upper end surface of the first sub-board 1, and the second sintering layer 18 is arranged on the lower end surface of the first sub-board 1; the lower end surface of the second sub-board 2 is attached to the first sintering layer 17, and the upper end surface of the third sub-board 3 is attached to the second sintering layer 18.
[0058] As an example, by arranging the first sintering layer 17 and the second sintering layer 18 on the upper end surface and the lower end surface of the first sub-board 1 respectively, and attaching the lower end surface of the second sub-board 2 to the first sintering layer 17 and attaching the upper end surface of the third sub-board 3 to the second sintering layer 18, the structure realizes sintering bonding between adjacent sub-boards, realizes interconnection of any sub-board, optimizes the previous scheme of high multi-layer, complex routing and via layout into a special interconnection scheme, saves the space of the printed circuit board and improves the utilization rate, and also effectively reduces the contact resistance between the layers of the printed circuit board, improves the signal transmission performance, and helps to improve the stability and durability of the printed circuit board in a high temperature or high vibration environment. In addition, the integrated pressing process also simplifies the alignment and bonding process of the traditional multi-layer sub-board, shortens the production cycle, and further improves the yield of the product.
[0059] In an embodiment, the first sub-board comprises a one-order high-density interconnection sub-board or a multi-order high-density interconnection sub-board, the second sub-board comprises a one-order high-density interconnection sub-board or a multi-order high-density interconnection sub-board, and / or the third sub-board comprises a one-order high-density interconnection sub-board or a multi-order high-density interconnection sub-board. That is, the first sub-board 1 can be a one-order high-density interconnection sub-board or a multi-order high-density interconnection sub-board, the second sub-board 2 can be a one-order high-density interconnection sub-board or a multi-order high-density interconnection sub-board, and / or the third sub-board 3 can be a one-order high-density interconnection sub-board or a multi-order high-density interconnection sub-board, which is only an example and does not constitute a limitation to the present application.
[0060] Among them, the one-order high-density interconnection (HDI) sub-board refers to a high-density interconnection sub-board comprising one layer of laser blind hole; and the multi-order high-density interconnection sub-board refers to a high-density interconnection sub-board comprising two or more layers of laser blind hole and / or mechanical buried hole combination.
[0061] For example, Figure 1 As shown, the second sub-board 2 and the third sub-board 3 are three-order high-density interconnection sub-boards. Among them, the second sub-board 2 comprises a first laser blind hole 21, a first mechanical buried hole 23 and a second laser blind hole 22; the third sub-board 3 comprises a third laser blind hole 31, a second mechanical buried hole 33 and a fourth laser blind hole 32, which is only an example and does not constitute a limitation to the present application.
[0062] It should be understood that multi-level high-density interconnect sub-boards include second-level high-density interconnect sub-boards, third-level high-density interconnect sub-boards, sixth-level high-density interconnect sub-boards, and even higher-level high-density interconnect sub-boards, which will not be listed here.
[0063] In one embodiment, the sintered layer is made of any of the following materials: copper paste, silver paste, or a mixture of copper core spheres and silver paste. By using the above materials, the sintered layer can form a low-resistance, high-thermal-conductivity metal bonding layer after high-temperature sintering. It should be understood that the above materials are merely examples, and other materials may also be used, which does not constitute a limitation of this utility model.
[0064] In a second aspect, an electronic product is provided, the electronic product comprising the printed circuit board described in the first aspect above.
[0065] Thirdly, a method for manufacturing a printed circuit board is provided, comprising the following steps: First, for a first sub-board 1 (e.g., Figure 2 Drilling is performed to form a first through hole (as shown). Figure 3 (As shown); then, the first through hole is sequentially subjected to hole formation and electroplating to obtain the following result. Figure 4 As shown, the first sub-board 1 with the second electroplated layer 14 is fabricated; then, the first sub-board 1 with the second electroplated layer 14 is filled and leveled to obtain the first sub-board 1 with the shielding hole 19 fabricated (as shown). Figure 5 (As shown); further, the first sub-board 1, after the shielding hole 19 has been fabricated, is drilled with signal holes 13 (as shown). Figure 6 As shown), and further perforation and electroplating (such as) are performed on signal hole 13. Figure 7 (as shown), plug signal hole 13 and scrape (as shown) Figure 8 As shown), thus forming coaxially distributed shielding holes 19 and signal holes 13 on the first daughter board 1 (as shown). Figure 8 (As shown); Next, the graphic is created and copper plating is applied to obtain the first sub-board 1 with the hole-in-hole structure completed (as shown). Figure 9 (As shown); furthermore, copper paste, silver paste, or a mixture of copper core spheres and silver paste are used to form sintered layers on the upper and lower surfaces of the first sub-board 1 through a sintering process. Finally, the first sub-board 1 is precisely aligned and bonded to the second sub-board 2 and the third sub-board 3, and a high-temperature sintering process is used to fully bond the sintered layer with the conductive layer of the adjacent sub-boards, thereby completing the manufacturing of the printed circuit board (e.g. Figure 1 (As shown). Through the above method, not only are the dual functions of electromagnetic shielding and signal transmission achieved, but it also helps to improve the yield of multi-level printed circuit boards (especially sixth-level and above printed circuit boards), shorten the processing time and the spatial layout of printed circuit boards, and improve the utilization rate of printed circuit board space.
[0066] The above-described embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.
Claims
1. A printed circuit board, characterized in that, The printed circuit board includes: The first sub-board has coaxially distributed shielding holes and signal holes. The diameter of the signal holes is smaller than the diameter of the shielding holes, so as to form an annular gap between the shielding holes and the signal holes. The annular gap is provided with a shielding filling layer and a first electroplated layer in contact with the shielding filling layer. A sintered layer is disposed on the upper and lower end faces of the first sub-board and is used to interconnect with adjacent sub-boards.
2. The printed circuit board according to claim 1, characterized in that, The first sub-board includes a second electroplated layer; The second electroplated layer is bonded to the first electroplated layer and the shielding filler layer.
3. The printed circuit board according to claim 2, characterized in that, The thickness range of both the second electroplated layer and the first electroplated layer is... ~ .
4. The printed circuit board according to claim 1, characterized in that, The thickness range of the shielding filler layer is: ~ .
5. The printed circuit board according to claim 1, characterized in that, The material of the shielding filling layer includes polytetrafluoroethylene resin, epoxy resin, BT resin, pore-filling resin, or pore-filling ink.
6. The printed circuit board according to claim 1, characterized in that, The first sub-board also includes a first copper clad layer and a second copper clad layer; The lower surface of the first copper-clad layer is attached to the upper surface of the first electroplated layer and covers the upper port of the signal hole; The upper surface of the second copper-clad layer is attached to the lower end face of the first electroplated layer and covers the lower port of the signal hole.
7. The printed circuit board according to claim 6, characterized in that, The printed circuit board further includes a second sub-board and a third sub-board, and the sintering layer includes a first sintering layer and a second sintering layer; The first sintered layer is disposed on the upper surface of the first copper-clad layer, and the second sintered layer is disposed on the lower surface of the second copper-clad layer; The lower end face of the second sub-plate is bonded to the first sintered layer, and the upper end face of the third sub-plate is bonded to the second sintered layer.
8. The printed circuit board according to claim 7, characterized in that, The first sub-board includes a first-order high-density interconnect sub-board or a multi-order high-density interconnect sub-board, the second sub-board includes a first-order high-density interconnect sub-board or a multi-order high-density interconnect sub-board, and / or the third sub-board includes a first-order high-density interconnect sub-board or a multi-order high-density interconnect sub-board.
9. The printed circuit board according to any one of claims 1 to 8, characterized in that, The sintered layer is made of any of the following materials: copper paste, silver paste, or a mixture of copper core spheres and silver paste.
10. An electronic product, characterized in that, The electronic product includes the printed circuit board as described in any one of claims 1 to 9.