Cleaner and display panel manufactured using same

Abstract

The utility model relates to a cleaner and a display panel manufactured using the same. The cleaner includes: a main body portion including a groove recessed toward an interior of the main body portion; the first inclined part extends from the main body part, is connected to the groove and forms a first inclined angle with the ground, and the first inclined angle is an obtuse angle; and a second inclined portion connected to the first inclined portion and forming a second inclined angle with the ground, the second inclined angle being smaller than the first inclined angle. The cleaner planarizes an upper surface of the conductive material used in the bonding process.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2024-0002030, filed with the Korean Intellectual Property Office (KIPO) on January 5, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of this disclosure relate to a cleaner, a display panel manufactured using the cleaner, and a method of manufacturing the display panel. Background Technology

[0004] With the development of information technology, display devices, as the connection medium between users and information, are becoming increasingly important. In response, the use of display devices (such as liquid crystal displays and organic light-emitting diode displays) is increasing.

[0005] For example, a display panel can be formed by transferring light-emitting elements onto a substrate on which thin-film transistors are formed. A display device comprising a display panel formed in this manner can be used.

[0006] In the process of manufacturing a display panel as described above, a process of using conductive materials to bond light-emitting elements can be performed to reduce the resistance in the area where the thin-film transistors and light-emitting elements are connected to each other. Utility Model Content

[0007] The embodiments provide a cleaner capable of planarizing the upper surface of a conductive material used in a bonding process, a display panel manufactured using the cleaner, and a method for manufacturing the display panel.

[0008] According to embodiments of the present disclosure, the cleaner may include: a main body portion including a groove recessed toward the interior of the main body portion; a first inclined portion extending from the main body portion, connected to the groove, and forming a first inclined angle with the ground, the first inclined angle being an obtuse angle; and a second inclined portion connected to the first inclined portion and forming a second inclined angle with the ground, the second inclined angle being less than the first inclined angle.

[0009] The elastic modulus of the first inclined portion can be less than that of the second inclined portion.

[0010] The first inclined portion may be made of either rubber or silicone, and the second inclined portion may also be made of either rubber or silicone. The elastic modulus of the material constituting the first inclined portion may be less than the elastic modulus of the material constituting the second inclined portion.

[0011] The first inclined portion may include a wedge shape forming a first inclined angle with the ground, and the second inclined portion may include a wedge shape forming a second inclined angle with the ground.

[0012] The main body may also include a sub-groove that is further recessed from the groove to extend in the horizontal direction, and a second inclined portion that can be positioned in the horizontal direction from the first inclined portion.

[0013] The distance between the first inclined section and the ground can be equal to the distance between the second inclined section and the ground.

[0014] The distance between the first inclined section and the ground can be greater than the distance between the second inclined section and the ground.

[0015] According to embodiments of this disclosure, a display panel may include: a thin-film transistor layer located on a substrate, and a pixel circuit including at least one transistor disposed in the thin-film transistor layer; a pixel electrode located on the thin-film transistor layer and connected to the pixel circuit; a common electrode located on the thin-film transistor layer, and a first power supply voltage is applied to the common electrode; a dam located on at least a portion of the common electrode and at least a portion of the pixel electrode; a conductive material located on the common electrode and the pixel electrode in a region surrounded by the dam; and a light-emitting element connected to the common electrode and the pixel electrode in a region surrounded by the dam, wherein the conductive material is interposed between the light-emitting element and the common electrode and between the light-emitting element and the pixel electrode. The conductive material on the dam can be removed by a first inclined portion of a cleaner and planarized by a second inclined portion of the cleaner.

[0016] The first residue of conductive material removed by the first inclined portion can be accommodated in the groove of the cleaner, and the groove of the cleaner can be connected to the first inclined portion of the cleaner.

[0017] The second residue corresponding to the upper surface of the conductive material from which the first residue has been removed can be flattened by the second inclined portion.

[0018] The embankment can have a tapered shape in a sectional view.

[0019] The embankment can have an inverted cone shape in a sectional view.

[0020] According to embodiments of the present disclosure, a method for manufacturing a display panel may include: providing plasma to a common electrode and a pixel electrode located in a region surrounded by a dam on a substrate using a plasma providing device; providing conductive material on the common electrode, the pixel electrode, and the dam using a conductive material providing device; removing and containing the conductive material on the dam using a cleaner, and planarizing the upper surface of the conductive material using a cleaner; and evaporating at least a portion of the conductive material in the region surrounded by the dam using a heater.

[0021] When plasma is supplied to the common electrode and pixel electrode on the substrate in the region surrounded by the dam via a plasma supply device, a mask for blocking the plasma can be located on the dam, and the opening of the mask can be positioned to correspond to the region surrounded by the dam.

[0022] Removing and accommodating conductive material on the embankment by a cleaner and flattening the upper surface of the conductive material by the cleaner may include: scraping and removing a portion of the conductive material by a first inclined portion of the cleaner; accommodating a first residue corresponding to the conductive material scraped by the first inclined portion in a groove of the cleaner; and flattening the upper surface of the conductive material from which the first residue has been removed by a second inclined portion of the cleaner.

[0023] The second inclined portion can be positioned horizontally from the first inclined portion, and when the first residue corresponding to the conductive material scraped by the first inclined portion is contained in the groove of the cleaner, the first residue can be further contained in a sub-groove extending horizontally from the groove.

[0024] The first tilt angle formed by the first tilted portion and the ground can be an obtuse angle. The first tilt angle can be greater than the second tilt angle formed by the second tilted portion and the ground.

[0025] The distance between the first inclined section and the ground can be equal to the distance between the second inclined section and the ground.

[0026] The dike may have a tapered shape in cross-section when at least a portion of the conductive material in the area surrounded by the dike is evaporated by a heater.

[0027] When at least a portion of the conductive material in the area surrounded by the dike is evaporated by a heater, the dike may have an inverted conical shape in cross-section. Attached Figure Description

[0028] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the specification, serve to explain the principles of the present disclosure.

[0029] Figure 1 This is a plan view showing a display device according to an embodiment of the present disclosure.

[0030] Figure 2 It is shown Figure 1 A schematic diagram illustrating the implementation of the pixel method.

[0031] Figure 3 It is shown Figure 1 A schematic diagram of another implementation of the pixels.

[0032] Figure 4 It shows along Figure 3 A schematic cross-sectional view of an embodiment of the display device, taken by line A-A'.

[0033] Figure 5 This is a plan view illustrating a splicing display device including multiple display devices according to an embodiment of the present disclosure.

[0034] Figure 6 It is shown Figure 5 A magnified plan view of region AR1.

[0035] Figure 7 It shows along Figure 6 A schematic cross-sectional view of an embodiment of a splicing display device, taken from line B-B'.

[0036] Figure 8 It is shown Figure 5 A magnified plan view of region AR2.

[0037] Figure 9 It shows along Figure 8 A schematic cross-sectional view of an embodiment of a splicing display device, taken by line F-F'.

[0038] Figure 10 This is a block diagram illustrating a splicing display device according to an embodiment of the present disclosure.

[0039] Figure 11 This is a schematic cross-sectional view illustrating the process of transferring the light-emitting element.

[0040] Figure 12 This is a schematic cross-sectional view illustrating an embodiment where the light-emitting element is transferred onto a backing substrate.

[0041] Figure 13 This is a schematic cross-sectional view illustrating an embodiment of the steps of providing plasma to the common electrode and the pixel electrode.

[0042] Figure 14 This is a schematic cross-sectional view illustrating an embodiment of the steps of providing conductive material on the common electrode and the pixel electrode.

[0043] Figure 15 This is a schematic cross-sectional view illustrating an embodiment of the steps for removing a portion of the conductive material using a cleaner.

[0044] Figure 16 This is a schematic cross-sectional view showing an embodiment in which a portion of the conductive material is removed by a cleaner.

[0045] Figure 17This is a schematic cross-sectional view illustrating an embodiment of the step of removing a portion of the conductive material using a heater.

[0046] Figure 18 This is a schematic cross-sectional view of a cleaner according to an embodiment.

[0047] Figure 19 This is a schematic cross-sectional view of a cleaner according to another embodiment.

[0048] Figure 20 This is a schematic cross-sectional view showing the angle formed by the first and second inclined portions with the ground in a cleaner according to an embodiment of the present disclosure.

[0049] Figure 21A This is a schematic cross-sectional view showing the distance between the first and second inclined portions and the ground according to an embodiment of the present disclosure.

[0050] Figure 21B This is a schematic cross-sectional view showing the distance between the first and second inclined portions and the ground according to an embodiment of the present disclosure.

[0051] Figure 22 This is a schematic cross-sectional view illustrating another embodiment of the steps of providing plasma to the common electrode and pixel electrode.

[0052] Figure 23 This is a schematic cross-sectional view illustrating another embodiment of the steps of providing conductive material on the common electrode and pixel electrode.

[0053] Figure 24 This is a schematic cross-sectional view illustrating another embodiment of the steps for removing a portion of the conductive material using a cleaner.

[0054] Figure 25 This is a schematic cross-sectional view showing another embodiment in which a portion of the conductive material is being removed by a cleaner.

[0055] Figure 26 This is a schematic cross-sectional view illustrating another embodiment of the step of removing a portion of the conductive material using a heater. Detailed Implementation

[0056] In the following, various embodiments of this disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can readily implement this disclosure. This disclosure can be implemented in various different forms and is not limited to the embodiments described herein.

[0057] For clarity in describing this disclosure, irrelevant details have been omitted, and the same or similar reference numerals are used throughout the specification to denote the same or similar parts. Therefore, the reference numerals described above may also be used in other figures.

[0058] Furthermore, for ease of description, the dimensions and thicknesses of each component shown in the accompanying drawings are arbitrarily depicted, and therefore this disclosure is not necessarily limited to those shown in the drawings. In the drawings, thicknesses may be exaggerated to clearly represent layers and regions.

[0059] In this specification, the term "identical" may mean "substantially identical." That is, it is similar enough to convince a person skilled in the art that they are identical. In other expressions, "substantially" may be omitted.

[0060] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element. In this disclosure, unless the context clearly indicates otherwise, singular expressions are intended to include plural expressions as well.

[0061] When a component or layer is referred to as being "on" another component or layer, "connected" to another component or layer, or "attached" to another component or layer, it can be directly on, directly connected to, or directly attached to the other component or layer, or there may be an intervening component or layer. However, when a component or layer is referred to as being "directly on" another component or layer, "directly connected" to, or "directly attached" to another component or layer, there is no intervening component or layer. Therefore, the term "connection" can refer to a physical, electrical, and / or fluid connection with or without an intervening component. Furthermore, when a component is referred to as "in contact" or "in contact" with another component, the component can be in "electrical contact" or "physical contact" with the other component, or in "indirect contact" or "direct contact" with the other component.

[0062] Spatial relative terms such as “beneath,” “below,” “under,” “lower,” “above,” “upper,” “over,” “higher,” and “side” (e.g., as in “sidewall”) may be used herein for descriptive purposes and thus to describe the relationship of one element to another(s) as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, spatial relative terms are intended to cover different orientations of the device in use, operation, and / or manufacture. For example, if the device in the drawings is flipped, an element described as “below” or “under” other elements or features will then be oriented “above” other elements or features. Thus, the exemplary term “below” can cover both above and below orientations. Furthermore, the device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and thus the spatial relative descriptive terms used herein shall be interpreted accordingly.

[0063] Taking into account the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), the terms “about” or “approximately” as used herein include the value and mean within an acceptable deviation range of the particular value as determined by one of ordinary skill in the art. For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value.

[0064] In the specification and claims, for the purposes of their meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group consisting of...". For example, "at least one of A and B" can be understood to mean "A, B, or A and B". In the specification and claims, for the purposes of their meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in the sense of conjunctions or antonymous conjunctions and can be understood to be equivalent to "and / or".

[0065] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms as used herein. Furthermore, when used in this specification, the terms “comprising,” “including,” “including,” and / or “comprising” indicate the presence of stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0066] Unless otherwise specified or implied herein, all terms used (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms, such as those defined in common dictionaries, shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and shall not be interpreted as having an ideal or overly formal meaning unless clearly defined in the specification.

[0067] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0068] Figure 1 This is a plan view showing a display device 10 according to an embodiment of the present disclosure. Figure 2 It is shown Figure 1 A schematic diagram illustrating an implementation of the pixel PX. Figure 3 It is shown Figure 1 A schematic diagram of another implementation of the pixel PX.

[0069] refer to Figure 1 The display device 10 can be a device for displaying moving or still images. The display device 10 can be used as a display screen for various products such as televisions, laptops, monitors, billboards and Internet of Things (IoT) devices, as well as portable electronic devices such as mobile phones, smartphones, tablet PCs, smartwatches, watch phones, mobile communication terminals, e-notebooks, e-books, portable multimedia players (PMPs), navigators and UMPCs (ultra-mobile PCs).

[0070] The display panel 100 can be formed as a rectangular plate having a long side in a first direction DR1 and a short side in a second direction DR2 intersecting the first direction DR1. The corner where the long side in the first direction DR1 and the short side in the second direction DR2 intersect can be rounded to have a curvature, or it can be formed as a right angle. The shape of the display panel 100 in a plan view is not limited to a rectangular shape, but can be formed as other polygonal shapes, circular shapes, or elliptical shapes. The display panel 100 can be flat, but this disclosure is not limited thereto. For example, the display panel 100 may include curved portions formed at the left and right ends and having constant or varying curvature. In another embodiment, the display panel 100 can be flexible, such that it can be curved, bent, folded, or rolled up.

[0071] The display panel 100 may include pixels PX for displaying images, scan lines extending in a first direction DR1, and data lines extending in a second direction DR2. The pixels PX may be arranged in a matrix in the first direction DR1 and the second direction DR2. The first direction DR1 and the second direction DR2 may be orthogonal to each other (e.g., like a horizontal axis and a vertical axis), but this disclosure is not limited thereto.

[0072] like Figure 2 and Figure 3 As shown, pixel PX can include multiple sub-pixels SPX1, SPX2 and SPX3. Figure 2 and Figure 3 An embodiment is shown in which pixel PX includes three sub-pixels SPX1, SPX2 and SPX3 (e.g., first sub-pixel SPX1, second sub-pixel SPX2 and third sub-pixel SPX3), but this disclosure is not limited thereto.

[0073] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be electrically connected to one of a plurality of data lines and can be electrically connected to at least one of a plurality of scan lines.

[0074] In the planar diagram, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can have a rectangular shape, a square shape, or a rhombus shape. For example, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be as follows: Figure 2 As shown in the plan view, it has a rectangular shape with a short side in the first direction DR1 and a long side in the second direction DR2. In another embodiment, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be as follows: Figure 3 The diagram shows a square or rhombus shape with sides of equal length in the first direction DR1 and the second direction DR2.

[0075] like Figure 2 As shown, the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be arranged on the first direction DR1.

[0076] In another embodiment, one of the second sub-pixel SPX2 and the third sub-pixel SPX3 may be arranged with the first sub-pixel SPX1 in a first direction DR1, and the other of the second sub-pixel SPX2 and the third sub-pixel SPX3 may be arranged with the first sub-pixel SPX1 in a second direction DR2. For example, as Figure 3As shown, the first sub-pixel SPX1 and the second sub-pixel SPX2 can be arranged on the first direction DR1, and the first sub-pixel SPX1 and the third sub-pixel SPX3 can be arranged on the second direction DR2. In another embodiment, one of the first sub-pixel SPX1 and the third sub-pixel SPX3 can be arranged on the first direction DR1 with the second sub-pixel SPX2, and the other of the first sub-pixel SPX1 and the third sub-pixel SPX3 can be arranged on the second direction DR2 with the second sub-pixel SPX2. In yet another embodiment, one of the first sub-pixel SPX1 and the second sub-pixel SPX2 can be arranged on the first direction DR1 with the third sub-pixel SPX3, and the other of the first sub-pixel SPX1 and the second sub-pixel SPX2 can be arranged on the second direction DR2.

[0077] The first sub-pixel SPX1 can emit a first light, the second sub-pixel SPX2 can emit a second light, and the third sub-pixel SPX3 can emit a third light. In an embodiment, the first light can be light in the red wavelength band, the second light can be light in the green wavelength band, and the third light can be light in the blue wavelength band. The red wavelength band can be a wavelength band in the range of about 600 nanometers (nm) to 750 nm, the green wavelength band can be a wavelength band in the range of about 480 nm to 560 nm, and the blue wavelength band can be a wavelength band in the range of about 370 nm to 460 nm, but this disclosure is not limited thereto.

[0078] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be a light-emitting element that emits light and may include an inorganic light-emitting element having inorganic semiconductors. For example, the inorganic light-emitting element may be a flip-chip micro-light-emitting diode (hereinafter referred to as a micro-LED), but this disclosure is not limited thereto.

[0079] like Figure 2 and Figure 3 As shown, the areas of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be substantially the same in the planar diagram, but this disclosure is not limited thereto. At least one of the areas of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be different from the others. In another embodiment, two of the areas of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be substantially the same, and the remaining one can be different from the two. In another embodiment, the areas of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be different from each other.

[0080] Figure 4It shows along Figure 3 The display device 10 is intercepted by line A-A' (see Figure 1 A schematic cross-sectional view of an embodiment of the invention.

[0081] refer to Figure 4 The thin-film transistor layer (TFTL) can be disposed on the substrate (SUB). The TFTL can be a layer in which the thin-film transistor TFTs are formed.

[0082] The thin-film transistor layer (TFTL) may include an active layer (ACT), a first gate layer (GTL1), a second gate layer (GTL2), a first data metal layer (DTL1), and a second data metal layer (DTL2). The TFTL may also include a buffer film (BF), a first gate insulating film (131), a second gate insulating film (132), an interlayer insulating film (140), a first planarization film (160), a first insulating film (161), a second planarization film (170), and a second insulating film (171).

[0083] The substrate SUB can be used to support the display device 10 (see...) Figure 1 The substrate or base component of the substrate SUB. The substrate SUB can be a rigid substrate made of glass. In another embodiment, the substrate SUB can be a flexible substrate that can be bent, folded, rolled, etc., and the substrate SUB can include an insulating material, such as a polymer resin including polyimide (PI).

[0084] A buffer film (BF) can be disposed on the surface of the substrate (SUB). The buffer film (BF) can be a membrane that prevents air or moisture penetration. The buffer film (BF) can be composed of multiple inorganic films stacked alternately on top of each other. For example, the buffer film (BF) can be formed as a multilayer in which one or more inorganic films selected from the group consisting of silicon nitride layers, silicon oxynitride layers, silicon oxide layers, titanium oxide layers, and aluminum oxide layers are stacked alternately on top of each other. The buffer film (BF) can be omitted.

[0085] The active layer ACT can be disposed on the buffer film BF. The active layer ACT can include silicon semiconductors such as polycrystalline silicon, monocrystalline silicon, low-temperature polycrystalline silicon, and amorphous silicon, or it can include oxide semiconductors.

[0086] The active layer ACT may include a channel TCH of a thin-film transistor (TFT), a first electrode TS, and a second electrode TD. The channel TCH of the TFT may be a region on a third-direction DR3 that overlaps with the gate electrode TG of the TFT, where DR3 is the thickness direction of the substrate SUB. The first electrode TS of the TFT may be disposed on one side of the channel TCH, and the second electrode TD may be disposed on the other side of the channel TCH. The first electrode TS and the second electrode TD of the TFT may be regions on the third-direction DR3 that do not overlap with the gate electrode TG. The first electrode TS and the second electrode TD of the TFT may be ion-doped semiconductors (e.g., silicon semiconductors, oxide semiconductors, etc.) and may be conductive regions.

[0087] The first gate insulating film 131 may be disposed on the active layer ACT. For example, the first gate insulating film 131 may be an inorganic film and may be formed from at least one of, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0088] The first gate layer GTL1 may be disposed on the first gate insulating film 131. The first gate layer GTL1 may include the gate electrode TG of the thin-film transistor TFT and the first capacitor electrode CAE1. The first gate layer GTL1 may be formed as a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0089] The second gate insulating film 132 may be disposed on the first gate layer GTL1. For example, the second gate insulating film 132 may be an inorganic film and may be formed from at least one of, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0090] A second gate layer GTL2 may be disposed on the second gate insulating film 132. The second gate layer GTL2 may include a second capacitor electrode CAE2. The second gate layer GTL2 may be formed as a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys. The second capacitor electrode CAE2 and the second capacitor electrode CAE2 may be configured with a capacitor Cst.

[0091] Interlayer insulating film 140 may be disposed on the second gate layer GTL2. Interlayer insulating film 140 may be an inorganic film and may be formed from at least one of, for example, silicon nitride layer, silicon oxynitride layer, silicon oxide layer, titanium oxide layer and aluminum oxide layer.

[0092] A first data metal layer DTL1, including the first connecting electrode CE1, can be disposed on the interlayer insulating film 140. The first data metal layer DTL1 can be formed as a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0093] The first connection electrode CE1 can be connected (e.g., electrically connected) to the first electrode TS or the second electrode TD of the thin-film transistor TFT through the first contact hole CT1 that penetrates the first gate insulating film 131, the second gate insulating film 132 and the interlayer insulating film 140.

[0094] A first planarization film 160 may be formed on a first data metal layer DTL1 to planarize the step difference caused by the active layer ACT, the first gate layer GTL1, the second gate layer GTL2, and the first data metal layer DTL1. The first planarization film 160 may be formed of an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0095] The first insulating film 161 may be disposed on the first planarization film 160. The first insulating film 161 may be an inorganic film and may be formed of, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0096] The second data metal layer DTL2 can be formed on the first insulating film 161. The second data metal layer DTL2 may include a second connection electrode CE2 and a first power line VSL. The second connection electrode CE2 can be connected to the first connection electrode CE1 through a second contact hole CT2 that penetrates the first insulating film 161 and the first planarization film 160. The second data metal layer DTL2 can be formed as a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0097] The second planarization film 170 can be formed on the second data metal layer DTL2 to planarize the step differences. The second planarization film 170 can be formed of an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin and polyimide resin.

[0098] The second insulating film 171 may be disposed on the second planarization film 170. The second insulating film 171 may be an inorganic film and may be formed of, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0099] A light-emitting element layer (EML) may be disposed on the second insulating film 171. The EML may include a pixel electrode (PXE), a common electrode (CE), and a light-emitting element (LE). A third data metal layer (DTL3) may include the pixel electrode (PXE) and the common electrode (CE). Each of the first sub-pixel (SPX1), second sub-pixel (SPX2), and third sub-pixel (SPX3) described above may include a light-emitting element (LE) connected to the pixel electrode (PXE) and the common electrode (CE). The pixel electrode (PXE) may be one of the anode and cathode electrodes connected to the light-emitting element (LE) (e.g., an anode electrode). The common electrode (CE) may be the other of the anode and cathode electrodes connected to the light-emitting element (LE) (e.g., a cathode electrode).

[0100] The pixel electrode PXE and the common electrode CE can be disposed on the second insulating film 171. The pixel electrode PXE can be connected (e.g., electrically connected) to the second connection electrode CE2 through a third contact hole CT3 penetrating the second insulating film 171 and the second planarization film 170. The pixel electrode PXE can be electrically connected to the first electrode TS or the second electrode TD of the thin-film transistor TFT through the first connection electrode CE1 and the second connection electrode CE2. Therefore, a pixel voltage or anode voltage controlled by the thin-film transistor TFT can be applied to the pixel electrode PXE.

[0101] The common electrode CE can be connected to the first power line VSL through the fourth contact hole CT4 that penetrates the second insulating film 171 and the second planarization film 170. The first power supply voltage of the first power line VSL can be applied to the common electrode CE.

[0102] The pixel electrode (PXE) and common electrode (CE) can include highly reflective metallic materials, such as a stacked structure of aluminum (Al) and titanium (Ti) (Ti / Al / Ti), a stacked structure of aluminum (Al) and indium tin oxide (ITO) (ITO / Al / ITO), an APC (Ag-Pd-Cu) alloy, and a stacked structure of APC alloy and ITO (ITO / APC / ITO). The APC alloy can be an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0103] Figure 4The illustration schematically depicts an embodiment of a flip-chip microLED, wherein a first contact electrode CTE1 and a second contact electrode CTE2 are arranged facing the pixel electrode PXE and the common electrode CE. The light-emitting element LE may comprise an inorganic material, such as gallium nitride (GaN). In the light-emitting element LE, the lengths along the first direction DR1, the second direction DR2, and the third direction DR3 can range from several micrometers (μm) to hundreds of micrometers. For example, in the light-emitting element LE, the lengths along the first direction DR1, the second direction DR2, and the third direction DR3 can be less than or equal to approximately 100 μm.

[0104] The light-emitting element (LE) can be formed by growing on a semiconductor substrate such as a silicon wafer. The LE can be transferred directly from the silicon wafer to the pixel electrode (PXE) and common electrode (CE) on the substrate SUB. In another embodiment, the LE can be transferred to the pixel electrode (PXE) and common electrode (CE) on the substrate SUB using an electrostatic method with an electrostatic head or an imprinting method using an elastic polymer material such as PDMS (polydimethylsiloxane) or silicon as a carrier substrate.

[0105] refer to Figure 4 Each of the light-emitting elements (LEs) may have a light-emitting structure, which includes a base substrate SPUB, an n-type semiconductor NSEM, an active layer MQW, a p-type semiconductor PSEM, a first contact electrode CTE1, and a second contact electrode CTE2.

[0106] For example, the base substrate SPUB can be a sapphire substrate, but this disclosure is not limited thereto.

[0107] The n-type semiconductor NSEM can be disposed on one side of the base substrate SPUB. For example, the n-type semiconductor NSEM can be disposed on the lower surface of the base substrate SPUB (e.g., on the lower surface in the direction opposite to the third direction DR3). For example, the n-type semiconductor NSEM can be made of gallium nitride (GaN) doped with n-type conductive dopants (such as silicon (Si), germanium (Ge), selenium (Se), tellurium (Te), and tin (Sn)).

[0108] The active quantum well (MQW) layer can be disposed on a portion of one side of an n-type semiconductor NSEM. The active MQW layer can comprise materials having a single quantum well structure or a multiple quantum well structure. In the case where the active MQW layer comprises a material with a multiple quantum well structure, the active MQW layer can have a structure in which multiple well layers and multiple barrier layers are alternately stacked, the well layers can be formed of InGaN, and the barrier layers can be formed of GaN or AlGaN, but this disclosure is not limited thereto. In another embodiment, the active MQW layer can be a structure in which semiconductor materials with high band gaps and semiconductor materials with low band gaps are alternately stacked, and depending on the wavelength band of the emitted light, it can comprise group III to V semiconductor materials.

[0109] The p-type semiconductor PSEM can be disposed on one side of the active layer MQW (e.g., on a surface positioned in the direction opposite to the third direction DR3). For example, the p-type semiconductor PSEM can be made of gallium nitride (GaN) doped with p-type conductive dopants (such as magnesium (Mg), zinc (Zn), calcium (Ca), and barium (Ba)).

[0110] The first contact electrode CTE1 can be disposed on a p-type semiconductor PSEM (e.g., disposed on a p-type semiconductor PSEM in a direction opposite to the third direction DR3). The second contact electrode CTE2 can be disposed on another portion of one side of an n-type semiconductor NSEM (e.g., disposed on another portion of one side of an n-type semiconductor NSEM in a direction opposite to the third direction DR3). The other portion of one side of the n-type semiconductor NSEM on which the second contact electrode CTE2 is disposed can be spaced apart from a portion of one side of the n-type semiconductor NSEM on which the active layer MQW is disposed.

[0111] The first contact electrode CTE1 and the pixel electrode PXE can be bonded to each other using a conductive adhesive component (not shown), such as an anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). In another embodiment, the first contact electrode CTE1 and the pixel electrode PXE can be bonded to each other using a soldering process.

[0112] A dam 190 can be formed on the second insulating film 171, covering the edges of the pixel electrode PXE and the common electrode CE. The dam 190 can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0113] A dike insulating film 191 may be disposed on the dike 190. The dike insulating film 191 may cover the edge of the pixel electrode PXE and the edge of the common electrode CE. The dike insulating film 191 may be an inorganic film and may be formed from, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0114] Figure 5 This is a plan view showing a video wall display device (TLD) including multiple display devices 11, 12, 13 and 14 according to an embodiment of the present disclosure.

[0115] refer to Figure 5 A video wall display device (TLD) may include multiple display devices 11, 12, 13, and 14, as well as seams SM. For example, a video wall display device (TLD) may include a first display device 11, a second display device 12, a third display device 13, and a fourth display device 14.

[0116] Display devices 11, 12, 13, and 14 can be arranged in a grid shape. Display devices 11, 12, 13, and 14 can be arranged in a matrix with M (M can be an integer greater than 1) rows and N (N can be an integer greater than 1) columns. For example, the first display device 11 and the second display device 12 can be adjacent to each other in the first direction DR1. The first display device 11 and the third display device 13 can be adjacent to each other in the second direction DR2. The third display device 13 and the fourth display device 14 can be adjacent to each other in the first direction DR1. The second display device 12 and the fourth display device 14 can be adjacent to each other in the second direction DR2.

[0117] However, in a video wall display (TLD), the number and arrangement of display devices 11, 12, 13, and 14 are not limited to... Figure 5 The number and arrangement of the display devices 11, 12, 13 and 14 included in the video wall display TLD can be set according to the display devices 11, 12, 13 and 14, as well as the size and shape of the video wall display TLD.

[0118] refer to Figure 5 Display devices 11, 12, 13, and 14 are shown in the plan view as having the same dimensions, but this disclosure is not limited thereto. For example, one or more of display devices 11, 12, 13, and 14 may have different dimensions than the remaining display devices.

[0119] Each of the display devices 11, 12, 13, and 14 may have a rectangular shape including a long side and a short side in a plan view. Display devices 11, 12, 13, and 14 may be arranged to connect to each other along their long or short sides. Some or all of the display devices 11, 12, 13, and 14 may be located at the edge of the tiled display unit TLD and may form the side of the tiled display unit TLD. At least one of the display devices 11, 12, 13, and 14 may be located at at least one corner of the tiled display unit TLD and may form two adjacent side edges of the tiled display unit TLD. At least one of the display devices 11, 12, 13, and 14 may be surrounded by the remaining display devices.

[0120] Each of display devices 11, 12, 13 and 14 and reference Figures 1 to 4 The described display device 10 (see Figure 1 They can be substantially the same. Therefore, a description of each of the display devices 11, 12, 13 and 14 will be omitted.

[0121] The seam SM may include a connecting member or an adhesive member, and the display devices 11, 12, 13, and 14 may be connected to each other through the connecting member or adhesive member of the seam SM. The seam SM may be disposed between the first display device 11 and the second display device 12, between the first display device 11 and the third display device 13, between the second display device 12 and the fourth display device 14, and between the third display device 13 and the fourth display device 14.

[0122] Figure 6 It is shown Figure 5 A magnified plan view of region AR1.

[0123] refer to Figure 6 The seam SM can have a cross or plus sign planar shape in the central area of ​​the first display device 11, the second display device 12, the third display device 13 and the fourth display device 14 adjacent to each other in the splicing display device TLD.

[0124] The first display device 11 may include first pixels PX1 arranged in a matrix on the first direction DR1 and the second direction DR2 to display an image. The second display device 12 may include second pixels PX2 arranged in a matrix on the first direction DR1 and the second direction DR2 to display an image. The third display device 13 may include third pixels PX3 arranged in a matrix on the first direction DR1 and the second direction DR2 to display an image. The fourth display device 14 may include fourth pixels PX4 arranged in a matrix on the first direction DR1 and the second direction DR2 to display an image.

[0125] The minimum distance between adjacent first pixels PX1 in the first direction DR1 can be defined as a first horizontal spacing distance GH1. The minimum distance between adjacent second pixels PX2 in the first direction DR1 can be defined as a second horizontal spacing distance GH2. The first horizontal spacing distance GH1 and the second horizontal spacing distance GH2 can be substantially the same.

[0126] The seam SM can be set between a first pixel PX1 and a second pixel PX2 that are adjacent to each other in the first direction DR1. The minimum distance G12 between the first pixel PX1 and the second pixel PX2 that are adjacent to each other in the first direction DR1 can be the sum of the minimum distance GHS1 between the first pixel PX1 and the seam SM in the first direction DR1, the minimum distance GHS2 between the second pixel PX2 and the seam SM in the first direction DR1, and the width GSM1 of the seam SM in the first direction DR1.

[0127] The minimum distance G12, the first horizontal spacing distance GH1, and the second horizontal spacing distance GH2 between adjacent first pixels PX1 and second pixels PX2 in the first direction DR1 can be substantially the same. Therefore, the minimum distance GHS1 between the first pixel PX1 and the seam SM in the first direction DR1 can be less than the first horizontal spacing distance GH1, and the minimum distance GHS2 between the second pixel PX2 and the seam SM in the first direction DR1 can be less than the second horizontal spacing distance GH2. The width GSM1 of the seam SM in the first direction DR1 can be less than either the first horizontal spacing distance GH1 or the second horizontal spacing distance GH2.

[0128] The minimum distance between adjacent third pixels PX3 in the first direction DR1 can be defined as the third horizontal spacing distance GH3, and the minimum distance between adjacent fourth pixels PX4 in the first direction DR1 can be defined as the fourth horizontal spacing distance GH4. The third horizontal spacing distance GH3 and the fourth horizontal spacing distance GH4 can be substantially the same.

[0129] The seam SM can be positioned between adjacent third pixels PX3 and fourth pixels PX4 in the first direction DR1. The minimum distance G34 between adjacent third pixels PX3 and fourth pixels PX4 in the first direction DR1 can be the sum of the minimum distance GHS3 between the third pixel PX3 and the seam SM in the first direction DR1, the minimum distance GHS4 between the fourth pixel PX4 and the seam SM in the first direction DR1, and the width GSM1 of the seam SM in the first direction DR1.

[0130] The minimum distance G34, the third horizontal spacing distance GH3, and the fourth horizontal spacing distance GH4 between adjacent third pixels PX3 and fourth pixels PX4 in the first direction DR1 can be substantially the same. Therefore, the minimum distance GHS3 between the third pixel PX3 and the seam SM in the first direction DR1 can be less than the third horizontal spacing distance GH3, and the minimum distance GHS4 between the fourth pixel PX4 and the seam SM in the first direction DR1 can be less than the fourth horizontal spacing distance GH4. The width GSM1 of the seam SM in the first direction DR1 can be less than either the third horizontal spacing distance GH3 or the fourth horizontal spacing distance GH4.

[0131] The minimum distance between adjacent first pixels PX1 in the second direction DR2 can be defined as a first vertical spacing distance GV1. The minimum distance between adjacent third pixels PX3 in the second direction DR2 can be defined as a third vertical spacing distance GV3. The first vertical spacing distance GV1 and the third vertical spacing distance GV3 can be substantially the same.

[0132] The seam SM can be set between the first pixel PX1 and the third pixel PX3 that are adjacent to each other in the second direction DR2. The minimum distance G13 between the first pixel PX1 and the third pixel PX3 that are adjacent to each other in the second direction DR2 can be the sum of the minimum distance GVS1 between the first pixel PX1 and the seam SM in the second direction DR2, the minimum distance GVS3 between the third pixel PX3 and the seam SM in the second direction DR2, and the width GSM2 of the seam SM in the second direction DR2.

[0133] The minimum distance G13, the first vertical spacing distance GV1, and the third vertical spacing distance GV3 between adjacent first pixels PX1 and third pixels PX3 in the second direction DR2 can be substantially the same. Therefore, the minimum distance GVS1 between the first pixel PX1 and the seam SM in the second direction DR2 can be less than the first vertical spacing distance GV1, and the minimum distance GVS3 between the third pixel PX3 and the seam SM in the second direction DR2 can be less than the third vertical spacing distance GV3. The width GSM2 of the seam SM in the second direction DR2 can be less than either the first vertical spacing distance GV1 or the third vertical spacing distance GV3.

[0134] The minimum distance between adjacent second pixels PX2 in the second direction DR2 can be defined as the second vertical spacing distance GV2. The minimum distance between adjacent fourth pixels PX4 in the second direction DR2 can be defined as the fourth vertical spacing distance GV4. The second vertical spacing distance GV2 and the fourth vertical spacing distance GV4 can be substantially the same.

[0135] The seam SM can be set between the second pixel PX2 and the fourth pixel PX4 that are adjacent to each other in the second direction DR2. The minimum distance G24 between the second pixel PX2 and the fourth pixel PX4 that are adjacent to each other in the second direction DR2 can be the sum of the minimum distance GVS2 between the second pixel PX2 and the seam SM in the second direction DR2, the minimum distance GVS4 between the fourth pixel PX4 and the seam SM in the second direction DR2, and the width GSM2 of the seam SM in the second direction DR2.

[0136] The minimum distance G24 between adjacent second pixels PX2 and fourth pixels PX4 in the second direction DR2, the second vertical spacing distance GV2, and the fourth vertical spacing distance GV4 can be substantially the same. Therefore, the minimum distance GVS2 between the second pixel PX2 and the seam SM in the second direction DR2 can be less than the second vertical spacing distance GV2, and the minimum distance GVS4 between the fourth pixel PX4 and the seam SM in the second direction DR2 can be less than the fourth vertical spacing distance GV4. The width GSM2 of the seam SM in the second direction DR2 can be less than either the second vertical spacing distance GV2 or the fourth vertical spacing distance GV4.

[0137] like Figure 6 As shown, in order to prevent visually detectable seams SM between images displayed by display devices 11, 12, 13 and 14, the minimum distance between pixels of adjacent display devices can be substantially equal to the minimum distance between pixels of each display device.

[0138] Figure 7 It shows along Figure 6 The splicing display device TLD (see line B-B') is a segment cut from the line. Figure 5 A schematic cross-sectional view of an embodiment of the invention.

[0139] refer to Figure 7 First display device 11 (see Figure 6 The second display device 12 may include a first display panel 101 and a first front cover COV1. Figure 6 It may include a second display panel 102 and a second front cover COV2.

[0140] Each of the first display panel 101 and the second display panel 102 may include a substrate SUB, a thin-film transistor layer (TFTL), and a light-emitting element layer (EML). (See reference...) Figure 4 The thin-film transistor layer (TFTL) and the light-emitting element layer (EML) are described in detail. Figure 7 In the middle, omission and Figure 4 The descriptions overlap.

[0141] The substrate SUB may include a first surface 41 on which a thin film transistor layer (TFTL) is disposed, a second surface 42 facing the first surface 41, and a first side surface 43 disposed between the first surface 41 and the second surface 42. The first surface 41 may be the front surface or the upper surface of the substrate SUB, while the second surface 42 may be the bottom surface or the lower surface of the substrate SUB.

[0142] The substrate SUB may also include a chamfered surface 44 disposed between the first surface 41 and the first side surface 43, and between the second surface 42 and the first side surface 43. The thin-film transistor layer (TFTL) and the light-emitting element layer (EML) may not be disposed on the chamfered surface 44. The chamfered surface 44 prevents collisions and damage to the substrate SUB of the first display device 11 and the substrate SUB of the second display device 12.

[0143] The chamfered surface 44 may also be disposed between the first surface 41 and each of the other side surfaces besides the first side surface 43, and between the second surface 42 and each of the other side surfaces besides the first side surface 43. For example, in the first display device 11 and the second display device 12, such as Figure 5 In the case of the rectangular planar shape shown, the chamfered surface 44 can be disposed between the first surface 41 and each of the second, third, and fourth side surfaces, and between the second surface 42 and each of the second, third, and fourth side surfaces.

[0144] The first front cover COV1 can be disposed on the chamfered surface 44 of the substrate SUB. For example, the first front cover COV1 can protrude further than the substrate SUB in the first direction DR1 and the second direction DR2. Therefore, in the first direction DR1, the distance GSUB between the substrate SUB of the first display device 11 and the substrate SUB of the second display device 12 can be greater than the distance GCOV between the first front cover COV1 and the second front cover COV2.

[0145] Each of the first front cover COV1 and the second front cover COV2 may include an adhesive component 51, a light transmittance adjustment layer 52 disposed on the adhesive component 51, an anti-glare layer 53 disposed on the light transmittance adjustment layer 52, etc.

[0146] The components of the first front cover COV1 will now be described according to an embodiment, but the description of these components may also be applied to the second front cover COV2.

[0147] The adhesive component 51 can be configured to attach the first front cover COV1 to the light-emitting element layer EML of the first display panel 101. The adhesive component 51 can be a transparent adhesive component capable of transmitting light. For example, the adhesive component 51 can be an optically transparent adhesive film (also known as an OCA film) or an optically transparent resin (OCR).

[0148] The transmittance adjustment layer 52 can be configured to reduce the transmittance of external light incident from the outside. In another embodiment, the transmittance adjustment layer 52 can be configured to reduce the transmittance of reflected light that is re-intruded after external light transmitted through the transmittance adjustment layer 52 has been reflected on the first display panel 101 and the second display panel 102. Since the first front cover COV1 includes the transmittance adjustment layer 52, seam SM (see [link to documentation]) can be prevented. Figure 6 It is visually identifiable from the outside. Therefore, a seamless tiled display device (TLD) can be achieved (see...). Figure 5 ).

[0149] An anti-glare layer 53 may be provided to reduce glare from the display device 10 (see [link]). Figure 1 The phenomenon where light reflected from internal metal wiring, etc., is visually identifiable from the outside. For example, the display device 10 may include metal wiring in a thin-film transistor layer (TFTL) or metal wiring on a TFTL (e.g., pixel electrodes, PXEs, etc.). When external light incident from the outside is reflected by the metal wiring, the reflected light is visually identifiable from the outside. Excessive reflected light can become a factor that reduces image visibility. Therefore, the anti-glare layer 53 can be designed to diffusely reflect external light and / or reflect light to prevent degradation of image visibility. When the first front cover COV1 includes the anti-glare layer 53, it can increase the visibility of the display device 10 (see [link to documentation]). Figure 1 (The contrast of the displayed image.)

[0150] The transmittance adjustment layer 52 can be implemented as, for example, a phase retardation layer. The anti-glare layer 53 can be implemented as, for example, a polarizing plate. However, this disclosure is not limited thereto.

[0151] Along Figure 6 Implementation methods and references for splicing display devices based on lines C-C', D-D', and E-E'. Figure 7 The implementation of the splicing display device described along line B-B' can be similar or substantially the same.

[0152] Figure 8 It is shown Figure 5 A magnified plan view of region AR2.

[0153] Figure 8 The pad PAD and the first pixel PX1 are schematically shown on the upper side of the first display device 11.

[0154] refer to Figure 8 One or more pads (PADs) may be provided on the upper edge of the first display device 11. When the data lines (not shown) of the first display device 11 extend in the second direction DR2, the pads (PADs) may be provided on the upper and / or lower edges of the first display device 11. In another embodiment, when the data lines of the first display device 11 extend in the first direction DR1, the pads (PADs) may be provided on the left and / or right edges of the first display device 11.

[0155] The pads can be electrically connected to the data cable. The pads can also be electrically connected to the side wiring (not shown).

[0156] Side wiring can be set on the substrate SUB (see Figure 7 Side wiring can be placed on the side surface of the substrate SUB and can extend from the side surface to the lower surface (or bottom surface). Side wiring can be connected to connection wiring (not shown) on the lower surface of the substrate SUB. References will follow below. Figure 9 A more detailed description of the side wiring and connection wiring is provided.

[0157] Figure 9 It shows along Figure 8 The splicing display device TLD (see line F-F') is a segment cut from the line. Figure 5 A schematic cross-sectional view of an embodiment of the invention.

[0158] exist Figure 9 In the figures, the same reference numerals are assigned to the same figures. Figure 4 The component shown in the sectional view is the same component as the one shown in the diagram. (The component will be omitted.) Figure 4 The descriptions overlap.

[0159] refer to Figure 9 The pads (PADs) can be disposed on the first insulating film 161. The pads (PADs) can be exposed and not covered by the second insulating film 171 and the embankment insulating film 191. The pads (PADs) and the pixel electrode (PXE) can include the same material, or the pads (PADs) and the common electrode (CE) can include the same material. For example, the pads (PADs) can include a stacked structure of aluminum (Al) and titanium (Ti) (Ti / Al / Ti), a stacked structure of aluminum (Al) and ITO (ITO / Al / ITO), an APC alloy, a stacked structure of APC alloy and ITO (ITO / APC / ITO), etc. The pads (PADs) can include metallic materials with high reflectivity.

[0160] The first data metal layer DTL1 may include a data line DL. The data line DL may be disposed on the interlayer insulating film 140. For example, the data line DL and the first connection electrode CE1 may be disposed on the same layer and may include the same material.

[0161] The pad PAD can be electrically connected to the data line DL through the fifth contact hole CT5 penetrating the first insulating film 161. In an embodiment, a link wiring (not shown) can be further positioned between the pad PAD and the data line DL, and the pad PAD and the data line DL do not need to be directly connected, but can be electrically connected to each other through the link wiring.

[0162] The interconnect wiring CCL can be disposed on the lower surface of the substrate SUB. The interconnect wiring CCL can be a single layer or multiple layers made of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0163] The back planarization membrane (BVIA) can be arranged as part of the cover connection wiring CCL. The back planarization membrane (BVIA) can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0164] The back insulating film BPVX can be disposed on the lower surface of the back planarization film BVIA (e.g., to cover the back planarization film BVIA). The back insulating film BPVX may include an inorganic film. For example, the inorganic film may be formed of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0165] Side wiring (SCL) can extend from the edge of the lower surface of the substrate SUB to the edges of the side and upper surfaces of the substrate SUB.

[0166] One end of the side trace SCL can be electrically connected to the connection trace CCL. For example, one end of the side trace SCL can be connected to the side and bottom surfaces of the connection trace CCL. The other end of the side trace SCL can be electrically connected to the pad PAD. For example, the other end of the side trace SCL can be connected to the pad PAD through the sixth contact hole CT6 that penetrates the second insulating film 171 and the embankment insulating film 191.

[0167] Side wiring SCL can be disposed on the side surface of substrate SUB, the side surface of buffer film BF, the side surface of first gate insulating film 131, the side surface of second gate insulating film 132, the side surface of interlayer insulating film 140, the side surface of first insulating film 161, the side surface of second insulating film 171 and the side surface of embankment insulating film 191.

[0168] The flexible film FPCB can be disposed below the back insulating film BPVX (e.g., disposed below the back insulating film BPVX in a direction toward the lower surface of the substrate SUB). The flexible film FPCB can be electrically connected to the connection wiring CCL using conductive adhesive components CAM.

[0169] The flexible film FPCB can be connected to the connection wiring CCL through the seventh contact hole CT7.

[0170] The seventh contact hole CT7 may be a hole that penetrates the back planarization film BVIA and the back insulating film BPVX, or it may be a hole formed in an area from which the back planarization film BVIA and the back insulating film BPVX have previously been removed.

[0171] A data driver circuit (not shown) for providing data voltage to the data line DL can be mounted on the surface of a flexible film FPCB. The flexible film FPCB can be implemented as, for example, a flexible printed circuit board, but this disclosure is not limited thereto. The data driver circuit can be implemented as, for example, a source driver integrated circuit (SDIC).

[0172] The conductive adhesive component CAM for electrically connecting the flexible printed circuit board (FPCB) and the connecting wiring CCL can be, for example, anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). However, this disclosure is not limited thereto.

[0173] refer to Figure 9 The flexible film FPCB can be disposed on the lower surface of the substrate SUB and connected to the pads PAD via connection wiring CCL and side wiring SCL. Therefore, pixels PX can be arranged onto the display panel 100 (see...). Figure 1 It can be used to display the edge area of ​​an image and increase the ratio of the display area to the image.

[0174] Figure 10 This is a block diagram illustrating a video wall display device (TLD) according to an embodiment of the present disclosure.

[0175] refer to Figure 10 According to the embodiments, the splicing display device TLD may include a host system HOST and display devices 11, 12, 13 and 14.

[0176] Although for the sake of ease of description, Figure 10 An embodiment of the host system HOST controlling the first display device 11 is shown, but the host system HOST can also perform the function of controlling display devices 11, 12, 13 and 14.

[0177] For example, a host system (HOST) can be implemented as a set-top box, an application processor (AP), etc.

[0178] User commands can be entered into the host system (HOST) in various formats. For example, the host system (HOST) can receive user commands via touch input. In another embodiment, the host system (HOST) can receive user commands via an external input device (e.g., keyboard input, button input on a remote control, etc.).

[0179] The host system (HOST) can receive raw video data corresponding to the original image from an external source. The host system (HOST) can divide the raw video data by the number of display devices 11, 12, 13, and 14. For example, corresponding to the first display device 11, the second display device 12, the third display device 13, and the fourth display device 14, the host system (HOST) can divide the raw video data into first video data corresponding to the first image, second video data corresponding to the second image, third video data corresponding to the third image, and fourth video data corresponding to the fourth image. The host system (HOST) can transmit the first video data to the first display device 11, the second video data to the second display device 12, the third video data to the third display device 13, and the fourth video data to the fourth display device 14.

[0180] The first display device 11 can display a first image based on a first video data, the second display device 12 can display a second image based on a second video data, the third display device 13 can display a third image based on a third video data, and the fourth display device 14 can display a fourth image based on a fourth video data. Therefore, the user can view the original image, which is a combination of the first to fourth images displayed on the display devices 11, 12, 13, and 14.

[0181] refer to Figure 10 The first display device 11 may include a broadcast tuning unit 210, a signal processing unit 220, a display unit 230, a speaker 240, a user input unit 250, a hard disk drive (HDD) 260, a network communication unit 270, a UI (user interface) creation unit 280, a control unit 290, etc.

[0182] The broadcast tuning unit 210 can tune the channel frequency under the control of the control unit 290 to receive broadcast signals of the corresponding channel through the antenna. The broadcast tuning unit 210 may include a channel detection module, a radio frequency (RF) demodulation module, etc.

[0183] The broadcast signal demodulated by the broadcast tuning unit 210 can be processed by the signal processing unit 220 and output to the display unit 230 and the speaker 240. The signal processing unit 220 may include a demultiplexer 221, a video decoder 222, a video processing unit 223, an audio decoder 224, an additional data processing unit 225, etc.

[0184] Demultiplexer 221 can separate the demodulated broadcast signal into video signal, audio signal, and additional data. The separated video signal, audio signal, and additional data can be recovered by video decoder 222, audio decoder 224, and additional data processing unit 225, respectively. Video decoder 222, audio decoder 224, and additional data processing unit 225 can respectively recover the separated video signal, audio signal, and additional data into a decoding format corresponding to the encoding format used when transmitting the broadcast signal.

[0185] The video processing unit 223 can convert the decoded video signal to meet the output specifications of the display unit 230, such as vertical frequency, resolution and screen ratio, and can output the decoded audio signal to the speaker 240.

[0186] The display unit 230 may include a display panel 100 on which images are displayed (see [link]). Figure 1 ) and panel driver for controlling the operation of display panel 100.

[0187] The user input unit 250 can receive signals transmitted by the host system (HOST). The user input unit 250 can be provided so that it can input not only data related to channel selection and UI menu selection and operation transmitted by the host system (HOST), but also data related to user selections and commands related to communication with other display devices.

[0188] The HDD 260 can store various software programs, including operating system (OS) programs, recorded broadcast programs, videos, photos, and other data, and can be constructed from storage media such as hard disks or non-volatile memory. The HDD 260 can be referred to as a storage unit.

[0189] The network communication unit 270 can be provided for short-range communication between a host system (HOST) and other display devices, and can be implemented as a communication module including an antenna pattern that enables mobile communication, data communication, Bluetooth, RF, Ethernet, etc. The network communication unit 270 can transmit and receive wireless signals with at least one of a base station, an external terminal, and a server via the antenna pattern described below on a mobile communication network built according to technical standards or communication methods for mobile communication (e.g., GSM (Global System for Mobile Communications), CDMA (Code Division Multiple Access), CDMA2000 (Code Division Multiple Access 2000), EV-DO (Enhanced Voice Data Only or Enhanced Voice Data), WCDMA (Wideband CDMA), HSDPA (High-Speed ​​Downlink Packet Access), HSUPA (High-Speed ​​Uplink Packet Access), LTE (Long Term Evolution), LTE-A (Long Term Evolution-Enhanced), 5G, etc.).

[0190] Network communication unit 270 can transmit and receive wireless signals in a communication network based on wireless Internet technology by means of an antenna pattern described below. For example, wireless Internet technologies may include WLAN (Wireless LAN), Wi-Fi (Wireless Fidelity), Wi-Fi Direct, DLNA (Digital Living Network Alliance), WiBro (Wireless Broadband), WiMAX (Global Microwave Access Interoperability), HSDPA (High-Speed ​​Downlink Packet Access), HSUPA (High-Speed ​​Uplink Packet Access), LTE (Long Term Evolution), LTE-A (Long Term Evolution-Enhanced), etc. The antenna pattern can transmit and receive data according to at least one wireless Internet technology (including Internet technologies not described above).

[0191] The UI creation unit 280 can be provided to generate UI menus for communication between the host system (HOST) and other display devices, and can be implemented through algorithm code and on-screen display (OSD) integrated circuits (ICs). The UI menus for communication between the host system (HOST) and other display devices can be menus indicating a digital TV that is expected to communicate with or for selecting desired functions.

[0192] The control unit 290 can be provided to control the operation of the first display device 11 in general and to control the communication between the host system HOST and the second display device 12, the third display device 13 and the fourth display device 14, and can be implemented as an MCU (microcontroller unit) that stores and runs the corresponding algorithm code for control.

[0193] The control unit 290 can control the operation based on the input and selection of the user input unit 250, so that the corresponding control commands and data are transmitted to the host system HOST and the second display device 12, the third display device 13 and the fourth display device 14 through the network communication unit 270. When control commands and data are input from the host system HOST and the second display device 12, the third display device 13 and the fourth display device 14, the control unit 290 can execute the operation according to the corresponding control commands.

[0194] Since the block diagrams of the second display device 12, the third display device 13, and the fourth display device 14 can be substantially similar to the reference... Figure 10 A block diagram of the first display device 11 is described, therefore a detailed description thereof will be omitted.

[0195] Figure 11 This is a schematic cross-sectional view illustrating the process of transferring the light-emitting element (LE).

[0196] refer to Figure 11The diagram schematically shows a thin-film transistor substrate 1110 and a transfer substrate 1120 transferred to the thin-film transistor substrate 1110.

[0197] The thin-film transistor substrate 1110 is simply shown as including a substrate SUB, a thin-film transistor layer TFTL formed on the substrate SUB, and a common electrode CE and a pixel electrode PXE formed on the thin-film transistor layer TFTL, but this disclosure is not limited thereto.

[0198] The transfer substrate 1120 may include a plurality of light-emitting elements LE and a carrier substrate CAF, the carrier substrate CAF being configured to transfer the light-emitting elements LE to the thin-film transistor substrate 1110. The process of transferring the light-emitting elements LE to the thin-film transistor substrate 1110 may be referred to as a transfer process.

[0199] To transfer more light-emitting elements (LEs) onto the thin-film transistor substrate 1110 in a single transfer process, the transfer substrate 1120 may also include a carrier substrate CAF for attaching and detaching the light-emitting elements (LEs) from it. For example, the carrier substrate CAF may be implemented as a carrier film of a flexible polymer material such as PDMS (polydimethylsiloxane) or silicon, as described above, but this disclosure is not limited thereto.

[0200] The carrier substrate (CAF) can be attached to the base substrate (SPUB) of the light-emitting element (LE). At a certain point after the transfer process is completed, the carrier substrate (CAF) can be detached from the base substrate (SPUB) and removed.

[0201] The light-emitting element (LE) can be an inorganic light-emitting element, and the light-emitting element (LE) can be a micro light-emitting diode (micro LED). The light-emitting element (LE) can be transferred in a single transfer process using a carrier substrate (CAF).

[0202] For electrical connections between the light-emitting element (LE) and the common electrode (CE), or between the light-emitting element (LE) and the pixel electrode (PXE), a bonding process can be performed after the transfer process. This bonding process reduces the resistance between the light-emitting element (LE) and the common electrode (CE), or between the light-emitting element (LE) and the pixel electrode (PXE).

[0203] refer to Figure 11 The thin-film transistor substrate 1110 may also include a conductive material COND disposed on the pixel electrode PXE and the common electrode CE.

[0204] The conductive material COND can be a component that increases the adhesion between the light-emitting element (LE) and the pixel electrode (PXE) or between the light-emitting element (LE) and the common electrode (CE). The conductive material COND can also be a component used to reduce the resistance between the light-emitting element (LE) and the pixel electrode (PXE) or between the light-emitting element (LE) and the common electrode (CE).

[0205] The conductive material COND can be, for example, an anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). The conductive material COND may include, for example, conductive metal spheres (not shown). The conductive material COND can become conductive by pressure or heat. However, the conductive material COND is not limited to these.

[0206] refer to Figure 11 Although the conductive material COND is shown as being disposed on both the pixel electrode PXE and the common electrode CE, this disclosure is not limited thereto, and in another embodiment, the conductive material COND may be disposed only on the pixel electrode PXE or only on the common electrode CE. In an embodiment, the thickness of the conductive material COND on the pixel electrode PXE and the thickness of the conductive material COND on the common electrode CE may be different.

[0207] Using the transfer and bonding processes described above, the light-emitting element LE can be transferred onto the thin-film transistor substrate 1110.

[0208] Figure 12 This shows the light-emitting element LE (see Figure 11 A schematic cross-sectional view of an embodiment of a backplate substrate 1200 on which the substrate is transferred.

[0209] refer to Figure 12 The backplane substrate 1200 may include a thin-film transistor substrate 1110 and a transfer substrate 1120.

[0210] Figure 12 A schematic diagram illustrates a backplane substrate 1200 at a light-emitting element LE attached to a carrier substrate CAF (see [reference]). Figure 11 The state is transferred to the thin-film transistor substrate 1110.

[0211] The backplane substrate 1200 may also include a mother substrate (not shown). After both the transfer process and the bonding process are performed, the mother substrate can be separated from the substrate SUB (e.g., the lower surface of the substrate SUB) and removed. For example, the mother substrate may be a rigid substrate made of glass or the like, or a flexible substrate made of plastic or the like.

[0212] For example, the backplane substrate 1200 may include components for forming the display device 10 (see [link]). Figure 1 ) substrate SUB.

[0213] For example, the backplane substrate 1200 may include two or more display devices 10 formed thereon simultaneously (see Figure 1The substrate SUB. After the transfer and bonding processes of the backplane substrate 1200 are completed, a scribing process for cutting the substrate SUB can be performed. Two or more display devices 10 can be separated from each other by the scribing process. The scribing lines along which the substrate SUB is cut can be physically marked on the substrate SUB, but this disclosure is not limited thereto. Light-emitting element LE (see Figure 11 The light-emitting element (LE) may not be transferred to the scribe line along its cut substrate (SUB).

[0214] For example, the backplane substrate 1200 may include components for forming a TLD constituting a video wall display device (see [link]). Figure 5 Display devices 11, 12, 13 and 14 (see) Figure 5 The substrate SUB has multiple pads (see [reference]). Figure 9 Areas with side-mounted SCLs (see) Figure 9 The region can be a region to which the light-emitting element LE is not transferred, or it can be a region to which the light-emitting element LE is not combined.

[0215] Figure 13 This is a schematic cross-sectional view illustrating an embodiment of step S1300, which involves providing plasma PLS to the common electrode CE and the pixel electrode PXE.

[0216] refer to Figure 13 Plasma PLS can be supplied to the common electrode CE and the pixel electrode PXE. The plasma PLS can be supplied from an external plasma supply device 1310.

[0217] Plasma supply device 1310 can be positioned from substrate SUB in one direction (e.g., third direction DR3) to supply plasma PLS to at least a portion of common electrode CE, pixel electrode PXE, and thin film transistor layer TFTL. The common electrode CE and pixel electrode PXE to which plasma PLS is supplied may be hydrophilic.

[0218] The mask MSK may be located on at least a portion of the dam 190 and the dam insulating film 191. Plasma PLS may not be provided to the regions on the thin-film transistor layer (TFTL) blocked by the mask MSK. For example, plasma PLS provided from a direction perpendicular (or substantially perpendicular) to the mask MSK may be blocked by the mask MSK and may not be provided to the dam 190 and / or the dam insulating film 191. The mask MSK may include openings configured to expose regions corresponding to the common electrode (CE) and the pixel electrode (PXE).

[0219] In one embodiment, when the substrate SUB moves in one direction (e.g., the first direction DR1), plasma PLS can be supplied from the plasma supply device 1310 to the common electrode CE and the pixel electrode PXE. In another embodiment, when the plasma supply device 1310 moves in one direction (e.g., the first direction DR1), plasma PLS can be supplied from the plasma supply device 1310 to the common electrode CE and the pixel electrode PXE. In yet another embodiment, when both the substrate SUB and the plasma supply device 1310 are fixed, plasma PLS can be supplied from the plasma supply device 1310 to the common electrode CE and the pixel electrode PXE. However, this disclosure is not limited to the above description.

[0220] Figure 14 This is a schematic cross-sectional view illustrating an embodiment of step S1400 of providing conductive material COND on the common electrode CE and the pixel electrode PXE.

[0221] refer to Figure 14 Conductive material COND can be provided on the common electrode CE and the pixel electrode PXE. The conductive material COND can be provided by a conductive material providing device 1410. For example, the conductive material COND can be discharged from a nozzle of the conductive material providing device 1410 and deposited on the common electrode CE and the pixel electrode PXE. The conductive material COND can be further deposited on at least some areas of the embankment 190 and the embankment insulating film 191. For example, the conductive material COND can completely cover the common electrode CE, the pixel electrode PXE, and the embankment insulating film 191.

[0222] In one embodiment, conductive material COND can be provided from conductive material providing device 1410 when the substrate SUB moves in one direction (e.g., the first direction DR1). In another embodiment, conductive material COND can be provided when conductive material providing device 1410 moves in one direction (e.g., the first direction DR1). In yet another embodiment, conductive material COND can be provided from conductive material providing device 1410 when both the substrate SUB and conductive material providing device 1410 are fixed. However, this disclosure is not limited to the above description.

[0223] Figure 15 This is a schematic cross-sectional view illustrating an embodiment of step S1500 of removing a portion of the conductive material COND using a cleaner 1500.

[0224] refer to Figure 15The cleaner 1500 can remove at least a portion of the conductive material COND. The cleaner 1500 can be configured to remove the conductive material COND from at least some areas on the dike insulating film 191. At least a portion of the upper surface of the dike insulating film 191 can be exposed in the areas where the conductive material COND has been removed.

[0225] The cleaner 1500 may include a grooved GRV. A first residue RSD1 corresponding to the removed conductive material COND may be accommodated in the grooved GRV.

[0226] The cleaner 1500 can flatten the upper surface of the conductive material COND from which the first residue RSD1 has been removed by removing the second residue RSD2 corresponding to the uneven surface.

[0227] In one embodiment, the conductive material COND can be removed by the cleaner 1500 when the substrate SUB moves in one direction (e.g., opposite to the first direction DR1). In another embodiment, the conductive material COND can be removed when the cleaner 1500 moves in one direction (e.g., the first direction DR1). However, this disclosure is not limited to the description above.

[0228] Figure 16 This shows the state of being in the cleaner 1500 (see...) Figure 15 A schematic cross-sectional view of an embodiment in which a portion of the conductive material COND has been removed.

[0229] refer to Figure 16 It can be cleaned by cleaner 1500 (see Figure 15 The upper surface of the conductive material COND is completely planarized. For example, the upper surface of the conductive material COND can be configured to be planarized integrally together with the upper surface of the embankment insulating film 191.

[0230] Figure 17 This is a schematic cross-sectional view illustrating an embodiment of step S1700, which uses heater 1710 to remove a portion of the conductive material COND.

[0231] refer to Figure 17 Heater 1710 can provide a heat HEA. The conductive material COND can be evaporated through the heat HEA. As a portion of the conductive material COND is evaporated and removed by heater 1710, the conductive material COND can have an overall planarized upper surface. In this embodiment, the conductive material COND can always be removed at a uniform rate in the region between the embankments 190.

[0232] Figure 18 This is a schematic cross-sectional view of the cleaner 1500 according to an embodiment.

[0233] refer to Figure 18 The cleaner 1500 may include a main body portion 1810, a first inclined portion 1820, and a second inclined portion 1830. According to one embodiment, the main body portion 1810, the first inclined portion 1820, and the second inclined portion 1830 may be constituted by a single component. In another embodiment, the main body portion 1810, the first inclined portion 1820, and the second inclined portion 1830 may be constituted by separate components. However, this disclosure is not limited to the above description.

[0234] The main body portion 1810 may include a groove GRV formed as an inward recess. The depth of the groove GRV can be designed taking into account the amount of conductive material removed by the cleaner 1500.

[0235] The first inclined portion 1820 may be configured to shave conductive material and guide the shaven conductive material into the groove GRV. For example, the first inclined portion 1820 may have a wedge shape in cross-sectional view. The first inclined portion 1820 may be connected to the body portion 1810. The first inclined portion 1820 may include an inclined surface connected to the groove GRV. For example, the direction from the first inclined portion 1820 to the groove GRV may correspond to a direction opposite to the first direction DR1 and a direction between the third direction DR3.

[0236] The first inclined portion 1820 may be hydrophobic. According to the embodiment, the phenomenon of conductive material adhering to the first inclined portion 1820 can be reduced.

[0237] Compared to the second inclined portion 1830, the first inclined portion 1820 can be made of a material with relatively high elasticity. For example, the first inclined portion 1820 may include a material such as rubber or silicone. However, this disclosure is not limited thereto.

[0238] The second inclined portion 1830 can be connected to the main body portion 1810. The second inclined portion 1830 can be positioned from the first inclined portion 1820 in a direction opposite to the first direction DR1.

[0239] The second inclined portion 1830 can be configured to flatten the upper surface of the conductive material. In an embodiment, the second inclined portion 1830 may have a wedge shape in a cross-sectional view. For example, the second inclined portion 1830 may perform the function of flattening a conductive material with an uneven upper surface.

[0240] The second inclined portion 1830 may be hydrophobic. According to the embodiment, the phenomenon of conductive material adhering to the second inclined portion 1830 can be reduced.

[0241] Compared to the first inclined portion 1820, the second inclined portion 1830 can be made of a material with relatively low elasticity. For example, the second inclined portion 1830 can include a material such as rubber or silicone. For example, the elastic modulus of the material constituting the first inclined portion 1820 can be relatively low, and the elastic modulus of the material constituting the second inclined portion 1830 can be relatively high. In other words, the first inclined portion 1820 can be made of a relatively soft material, and the second inclined portion 1830 can be made of a relatively hard material. As a result, the first inclined portion 1820, with its relatively low elastic modulus, is suitable for scraping conductive material and guiding the scraped conductive material into the groove GRV. As a result, the second inclined portion 1830, with its relatively high elastic modulus, is more suitable for planarizing the upper surface of the conductive material.

[0242] The second inclined portion 1830 may include one or more wedge shapes. (Reference) Figure 18 The second inclined portion 1830 may include two or more wedge shapes. According to the embodiment of the second inclined portion 1830 including multiple wedge shapes, the function of planarizing the conductive material can be performed more efficiently.

[0243] Figure 19 This is a schematic cross-sectional view of a cleaner 1500 according to another embodiment.

[0244] refer to Figure 19 The cleaner 1500 may include a recessed GRV. The recessed GRV may include sub-recessed SGRVs. The remaining components may be referenced. Figure 18 The cleaner described is the same as or similar to the 1500.

[0245] The sub-groove SGRV can be formed by further recessing the main body portion 1810 from the groove GRV in one direction (e.g., opposite to the first direction DR1). According to an embodiment, conductive material can be accommodated more effectively by increasing the volume of the groove GRV.

[0246] Figure 20 This is a schematic cross-sectional view showing the angles formed by the first inclined portion 1820 and the second inclined portion 1830 with the ground GND in the cleaner 1500 according to an embodiment of the present disclosure.

[0247] refer to Figure 20 The angle formed by the first inclined portion 1820 and the ground GND can be a first angle θ1. The angle formed by the second inclined portion 1830 and the ground GND can be a second angle θ2. For example, the angle formed by the inclined surface of the first inclined portion 1820 and the ground GND can be the first angle θ1. For example, the angle formed by the inclined surface of the second inclined portion 1830 and the ground GND can be the second angle θ2.

[0248] The first angle θ1 can be greater than the second angle θ2. According to an embodiment, the first angle θ1 can be an obtuse angle greater than 90°. According to an embodiment, both the first angle θ1 and the second angle θ2 can be obtuse angles greater than 90°.

[0249] Figure 21A and Figure 21B This is a schematic cross-sectional view showing the distance between the first inclined portion 1820 and the second inclined portion 1830 and the ground GND according to an embodiment of the present disclosure.

[0250] refer to Figure 21A In this embodiment, the distance between the first inclined portion 1820 and the ground GND can be equal to (or substantially equal to) the distance between the second inclined portion 1830 and the ground GND. For example, if the second inclined portion 1830 contacts the ground GND, the distance between the first inclined portion 1820 and the ground GND can be 0 (or substantially 0).

[0251] refer to Figure 21B In another embodiment, the distance between the second inclined portion 1830 and the ground GND can be less than the distance between the first inclined portion 1820 and the ground GND. For example, when the second inclined portion 1830 contacts the ground GND, the distance D1 between the first inclined portion 1820 and the ground GND can be a first distance D1 greater than 0.

[0252] Figure 22 This is a schematic cross-sectional view illustrating another embodiment of step S2200, which involves providing plasma PLS to the common electrode CE and the pixel electrode PXE.

[0253] and Figure 13 In comparison, Figure 22 In one embodiment, the embankment 190 may have an inverted conical shape in cross-sectional view. An insulating film 191 may surround the side and top surfaces of the embankment 190, which has an inverted conical shape. The remaining components may be configured to... Figure 13 The components shown are the same or similar.

[0254] Plasma PLS can be supplied to the common electrode CE and pixel electrode PXE in the area surrounded by the embankment 190.

[0255] Figure 23 This is a schematic cross-sectional view illustrating another embodiment of step S2300, which involves providing conductive material COND on the common electrode CE and the pixel electrode PXE.

[0256] and Figure 14 In comparison, Figure 23In one embodiment, the dam portion 190 may have an inverted conical shape in cross-sectional view. A dam insulating film 191 may surround the side and top surfaces of the dam portion 190 having an inverted conical shape. A conductive material COND may fill the area surrounded by the sides of the dam portion 190 having an inverted conical shape. The conductive material COND may be located on the dam portion 190 having an inverted conical shape. The remaining components may be configured to... Figure 14 The components shown are the same or similar.

[0257] The conductive material COND can be disposed in the area surrounded by the embankment 190 and the embankment insulating film 191.

[0258] Figure 24 This is a schematic cross-sectional view illustrating another embodiment of step S2400, which involves removing a portion of the conductive material COND using a cleaner 1500.

[0259] and Figure 15 In comparison, Figure 24 In one embodiment, the embankment 190 may have an inverted conical shape in cross-sectional view. The cleaner 1500 can remove at least a portion of the conductive material COND from the embankment 190 having the inverted conical shape. The remaining components may be configured to... Figure 15 The components shown are the same or similar.

[0260] At least a portion of the conductive material COND can be removed on the embankment 190 with an inverted conical shape. The upper surface of the conductive material COND can be flattened by the cleaner 1500.

[0261] Figure 25 This shows the state of being in the cleaner 1500 (see...) Figure 24 A schematic cross-sectional view of another embodiment with a portion of the conductive material COND removed.

[0262] and Figure 16 In comparison, Figure 25 In one embodiment, the embankment 190 may have an inverted conical shape in cross-sectional view. The area surrounded by the embankment 190 with the inverted conical shape may be filled with a conductive material COND.

[0263] Figure 26 This is a schematic cross-sectional view illustrating another embodiment of step S2600, which involves using a heater 1710 to remove a portion of the conductive material COND.

[0264] and Figure 17 In comparison, Figure 26 In one embodiment, the embankment 190 may have an inverted conical shape in cross-sectional view. In the region surrounded by the embankment 190 having an inverted conical shape, at least a portion of the conductive material COND can be removed by evaporation.

[0265] and Figure 17 Compared to the implementation method, in Figure 26 In one embodiment, where the conductive material COND is surrounded by a dam 190 having an inverted conical shape, the conductive material COND can be more effectively confined.

[0266] According to the cleaner according to embodiments of the present disclosure, the display panel manufactured using the cleaner, and the method for manufacturing the display panel, the upper surface of the conductive material used in the bonding process can be planarized.

[0267] The above description is an example of the technical features of this disclosure, and those skilled in the art will be able to make various modifications and variations. Therefore, the embodiments of this disclosure described above can be implemented individually or in combination with each other.

[0268] Therefore, the embodiments disclosed herein are not intended to limit the technical spirit of this disclosure, but rather to describe it, and the scope of the technical spirit of this disclosure is not limited by these embodiments. The scope of protection of this disclosure should be interpreted by the appended claims, and they should be interpreted as including all technical spirit within the equivalent scope within the scope of this disclosure.

Claims

1. A cleaner characterized by, The cleaner includes: The main body portion includes a groove recessed toward the interior of the main body portion; A first inclined portion extends from the main body portion, connects to the groove, and forms a first inclined angle with the ground, the first inclined angle being an obtuse angle; and The second inclined portion is connected to the first inclined portion and forms a second inclined angle with the ground, the second inclined angle being smaller than the first inclined angle.

2. The cleaner according to claim 1, wherein The elastic modulus of the first inclined portion is less than that of the second inclined portion. The first inclined portion is composed of one of rubber and silicone, and The second inclined portion is made of either rubber or silicone.

3. The cleaner according to claim 1, characterized in that, The first inclined portion includes a wedge shape that forms the first inclination angle with the ground, and The second inclined portion includes a wedge shape that forms the second inclination angle with the ground.

4. The cleaner according to claim 1, characterized in that, The main body portion also includes a sub-groove, which is further recessed from the groove to extend horizontally. The second inclined portion is positioned in the horizontal direction from the first inclined portion.

5. The cleaner of claim 1, wherein The distance between the first inclined portion and the ground is equal to the distance between the second inclined portion and the ground.

6. The cleaner of claim 1, wherein The distance between the first inclined portion and the ground is greater than the distance between the second inclined portion and the ground.

7. A display panel, characterized by The display panel includes: A thin-film transistor layer is located on a substrate, and a pixel circuit including at least one transistor is disposed in the thin-film transistor layer; Pixel electrodes are located on the thin-film transistor layer and connected to the pixel circuit. A common electrode is located on the thin-film transistor layer, and a first power supply voltage is applied to the common electrode; A dam portion is located on at least a portion of the common electrode and at least a portion of the pixel electrode; A conductive material is located on the common electrode and the pixel electrode in the region surrounded by the embankment; and A light-emitting element is connected to the common electrode and the pixel electrode in the region surrounded by the embankment, and the conductive material is interposed between the light-emitting element and the common electrode, and between the light-emitting element and the pixel electrode. The conductive material on the embankment is removed by the first inclined portion of the cleaner as described in claim 1, and flattened by the second inclined portion of the cleaner.

8. The display panel according to claim 7, characterized in that, The first residue of the conductive material removed by the first inclined portion is contained in the groove of the cleaner, and The groove of the cleaner is connected to the first inclined portion of the cleaner.

9. The display panel of claim 7, wherein, The embankment has a tapered shape in the cross-sectional view.

10. The display panel of claim 7, wherein, The embankment has an inverted cone shape in the sectional view.

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