High-reliability adjustable voltage-stabilizing integrated circuit
By introducing a negative feedback mechanism into the adjustable voltage regulator integrated circuit, the current distribution of the power transistor is dynamically adjusted, solving the problem of uneven current, improving the reliability and efficiency of the circuit, and achieving high-precision current balancing and fast response.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHINA ZHENHUA GRP YONGGUANG ELECTRONICS CO LTD STATE OWNED NO 873 FACTORY
- Filing Date
- 2025-06-06
- Publication Date
- 2026-04-17
AI Technical Summary
The uneven current distribution in the power transistors of existing adjustable voltage regulator integrated circuits leads to problems such as overheating of the power transistors, reduced circuit efficiency, and decreased reliability.
It employs a current sharing function based on negative feedback, dynamically adjusts the current distribution of the power transistor through a closed-loop control mechanism, and utilizes a circuit module composed of integrated PNP and NPN transistors, resistors, capacitors, etc. to achieve high-precision current balancing and fast dynamic response.
It effectively solves the problem of uneven current distribution, improves the reliability, efficiency and stability of the circuit, while maintaining a simple circuit structure and low cost.
Smart Images
Figure CN224137663U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of voltage regulator integrated circuits, and more specifically to the field of adjustable voltage regulator integrated circuits. In particular, it relates to a highly reliable adjustable voltage regulator integrated circuit. Background Technology
[0002] In traditional adjustable three-terminal voltage regulator circuits, power transistors are typically connected in parallel to improve the circuit's power handling capability. However, due to variations in manufacturing processes, component parameter variability, and operating environment, the current distribution among the power transistors is often inconsistent. For example, the on-resistance of different power transistors may differ, causing more current to flow to the transistor with the lower on-resistance. This uneven current distribution leads to the following problems:
[0003] (1) Overheating of power transistors: Some power transistors generate excessive heat due to excessive current, while other power transistors do not fully utilize their power capacity. This uneven heat distribution may lead to local overheating, reduce the reliability of power transistors, and even cause thermal runaway.
[0004] (2) Reduced circuit efficiency: Uneven current distribution will cause some power transistors to work in a high power consumption state, while other power transistors will not be able to fully play their role, thereby reducing the efficiency of the entire circuit.
[0005] (3) Decreased reliability: Due to the long-term exposure to excessive current and heat, the service life of some power transistors will be significantly shortened, which will affect the reliability of the entire circuit.
[0006] To address the problem of uneven current distribution in power transistors, existing circuit designs mainly rely on the parallel connection of the power transistor and the emitter ballast resistor, hoping to distribute the current through parallel connection. However, this simple parallel connection method cannot effectively solve the fundamental problem of uneven current distribution.
[0007] The existing adjustable three-terminal regulator circuit has problems with the current distribution of the power transistor, which limits its further development in high-power and high-reliability applications.
[0008] In view of the above, this utility model is hereby proposed. Summary of the Invention
[0009] The technical problem to be solved by this utility model is to solve the problem of uneven current distribution in the power transistor of existing adjustable voltage regulator integrated circuits, which leads to overheating of the power transistor, reduced circuit efficiency, and decreased reliability.
[0010] The inventive concept of this utility model is as follows: Addressing the aforementioned problems, this utility model proposes a current sharing function based on negative feedback. The aim is to dynamically adjust the current distribution of power transistors through a closed-loop control mechanism, ensuring that each power transistor can evenly share the total current. By introducing a negative feedback mechanism, the following objectives are achieved:
[0011] (1) High-precision current balancing: Through precise current detection and feedback adjustment, the current difference of each power tube is controlled within a very small range.
[0012] (2) Fast dynamic response: The negative feedback mechanism can monitor current changes in real time and quickly adjust the conduction degree of the power transistor to adapt to the dynamic changes of the load.
[0013] Therefore, this utility model provides a highly reliable adjustable voltage regulator integrated circuit, such as... Figure 1 As shown. Includes:
[0014] Integrated PNP transistors Q1, Q2, Q3, Q4, Q7, Q9, Q10, Q11, Q14, Q15, Q20; integrated NPN transistors Q5, Q6, Q8, Q12, Q13, Q16, Q17, Q18, Q19; integrated Zener diode Z1; integrated resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17; integrated capacitors C1, C2.
[0015] Z1, R1, R6, R8 and transistor Q6 constitute the startup circuit, and the startup circuit and Q5 form a micro-current source to provide operating current for the bias circuit.
[0016] Q1, Q2, Q3, Q4, and resistors R2, R3, R4, and R5 constitute a proportional current source bias circuit.
[0017] The transistors Q10, Q11, Q12, and Q13, along with resistors R10 and R11, form a reference circuit.
[0018] Q7, Q8, Q9, C1, and C2 form an amplifier circuit and a frequency compensation circuit, which amplifies and compensates the received reference circuit output voltage.
[0019] Q14, Q15, and Q20 form a current compensation circuit to compensate for the bias current.
[0020] Q16, Q17, R12, and R13 form a current monitoring and adjustment circuit to monitor and adjust the bias current.
[0021] Q18, Q19, and R16 form a negative feedback adjustment circuit, and Q18 and Q19 are power adjustment transistors.
[0022] R14 and R15 are connected in series to form a sampling circuit, and the intermediate connection point is the sampling point.
[0023] The cathode of Z1 is connected to one end of R1 and one end of R6. The anode of Z1 is connected to one end of R7, the emitter of Q6, the collector of Q7, one end of R9, the collector of Q9, one end of C2, the bases of Q12 and Q13, one end of R15, the emitter 1 of Q18, one end of R16, and the VOUT2 port. The other end of R1 is connected to one end of R2, one end of R3, one end of R4, one end of R5, the collector of Q8, the emitter of Q14, the emitters of Q15 and Q20, and Q18. Connect the collector and VIN port of Q19; connect the other end of R6 to the base of Q5 and Q6, the collector of Q2, and one end of R8; connect the other end of R8 to the collector of Q6; connect the collector of Q5 to the collector and base of Q1, and the base of Q2 and Q3; connect the other end of R2 to the emitter of Q1, the other end of R3 to the emitter of Q2, the other end of R4 to the emitter of Q3, and the other end of R5 to the emitter of Q4; connect the collector of Q3 to the emitter of Q7, Q1... Connect the emitters of Q10 and Q11, the collector of Q14, the base of Q16, and one end of R12; connect the other end of R12 to the collector of Q20 and the base of Q17; connect the base of Q7 to the emitter of Q8 and the other end of R9; connect the base of Q8 to the emitter of Q9 and the collector of Q4; connect the base of Q9 to one end of C1, the other end of C2, and the collectors of Q10 and Q12; connect the other end of C1 to one end of R11 and one end of R17; connect the other end of R17 to the ADJ port. Connections: The base of Q10 is connected to the base and collector of Q11, and the collector of Q13; the emitter of Q12 is connected to the other end of R11 and one end of R10, and the other end of R10 is connected to the emitter of Q13; the emitter of Q16 is connected to one end of R13, the other end of R13 is connected to the emitter of Q17, the base of Q18 and Q19, and one end of R14, the other end of R14 is connected to the other end of R15, and the emitter of Q18; the emitter of Q19 is connected to the other end of R16.
[0024] Features of the technical solution of this utility model:
[0025] This invention not only effectively solves the problem of uneven current distribution in existing technologies, but also significantly improves the reliability, efficiency, and stability of the circuit without significantly increasing circuit complexity and cost. The present invention aims to design a voltage regulator circuit that optimizes the current sharing function of the power transistor based on negative feedback regulation, and its structure is simple.
[0026] All active devices in this invention are of the same type, consisting entirely of transistors, field-effect transistors, or MOSFETs, ensuring high consistency and high yield during the manufacturing process. It can be widely applied in adjustable three-terminal voltage regulator circuits. Attached Figure Description
[0027] Figure 1 This is a schematic diagram of an adjustable voltage regulator integrated circuit.
[0028] Figure 2 This is a schematic diagram of the startup bias circuit module.
[0029] Figure 3 This is a schematic diagram of the reference circuit module.
[0030] Figure 4 This is a schematic diagram of the amplification compensation output circuit module.
[0031] Figure 5 This is a schematic diagram of the adjustment transistor array circuit.
[0032] Figure 6 This is a schematic diagram of a negative feedback regulating tube module.
[0033] Figure 7 The circuit diagram before optimization for negative feedback.
[0034] Figure 8 This is a schematic diagram of the application circuit.
[0035] In the diagram: Q1, Q2, Q3, Q4, Q7, Q9, Q10, Q11, Q14, Q15, and Q20 are integrated PNP transistors; Q5, Q6, Q8, Q12, Q13, Q16, Q17, Q18, and Q19 are integrated NPN transistors; Z1 is an integrated Zener diode; R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, and R17 are integrated resistors; C1 and C2 are integrated capacitors; R18 and R19 are discrete resistors; C is a discrete capacitor; L1 and L2 are discrete inductors; and RL is the load resistor. Detailed Implementation
[0036] like Figure 1-8 As shown, the specific implementation of the highly reliable adjustable voltage regulator integrated circuit is as follows:
[0037] 1. Start-up circuit and bias circuit
[0038] like Figure 2 As shown, the startup circuit and bias circuit consist of transistors Q1, Q2, Q3, Q4, Q5, Q6, resistors R1, R2, R3, R4, R5, R6, R7, R8, and Zener diode Z1.
[0039] When an input voltage is applied to the power supply, the startup circuit consisting of R1, R6, R8 and transistor Q6 starts first, forming a micro-current source with Q5 to provide a stable operating current for the bias circuit.
[0040] The bias circuit is then immediately activated. Q1, Q2, Q3, Q4 and resistors R2, R3, R4, R5 form a proportional current source to provide a stable bias current for the subsequent circuit.
[0041] Zener diode Z1 is connected in reverse to the lower end of R1 to ensure stable operation of the startup circuit.
[0042] 2. Reference circuit
[0043] like Figure 3 As shown, the reference circuit consists of transistors Q10, Q11, Q12, and Q13, and resistors R10 and R11.
[0044] After the startup and bias circuits begin operating, Q3 provides bias current to the current mirrors Q10 and Q11, and the current source formed by Q10 and Q11 provides bias current to transistors Q12 and Q13. In the design, the emitter area of Q13 is made N times the emitter area of Q12, where N is a positive number. Because the emitter areas of Q12 and Q13 are different, their emitter current densities are different, resulting in a ΔVBE across resistor R10. Therefore, a fixed current ΔVBE / R10 is generated across R10. This fixed current flows through R11, thus providing a stable reference voltage VOUT2 = VBE + VR11.
[0045] When the potential at the VOUT2 terminal is affected by external factors (i.e., the common base potential of Q12 and Q13) and deviates from the equilibrium value (referred to as VREF here), the collector currents of Q12 and Q13 change simultaneously. Because the emitter of Q13 is connected to the resistor R10, the current of Q12 changes more than that of Q13. The change in collector current pulls VOUT2 back to the equilibrium value.
[0046] 3. Amplification compensation circuit, current compensation circuit, current monitoring and adjustment circuit
[0047] like Figure 4 As shown. The amplification compensation circuit, current compensation circuit, and current monitoring circuit are composed of transistors Q7, Q8, Q9, Q14, Q15, Q16, Q17, and Q20, as well as resistors R9, R12, R13, R14, and R15, and capacitors C1 and C2.
[0048] Q7, Q8, and Q9 form a three-stage emitter amplifier circuit, which amplifies the signal after receiving the output voltage from the reference circuit. Furthermore, the current sources Q3 and Q4 act as active loads for Q7 and Q9, exhibiting very high internal resistance, which significantly enhances the amplification capability of Q7, Q8, and Q9. Frequency compensation is performed on the amplified signal through compensation capacitors C1 and C2.
[0049] The current compensation circuit consists of transistors Q14, Q15, and Q20, while the current monitoring and adjustment circuit consists of transistors Q16 and Q17, and resistors R12 and R13. The current source formed by Q14, Q15, and Q20 primarily compensates for the current path I3. The values of resistors R12 and R13 are controlled to monitor and adjust I3 in real time, ensuring the stability and accuracy of the current. Finally, the amplified and compensated signal is stabilized through a negative feedback adjustment circuit, maintaining the reference output voltage at a fixed value.
[0050] Q14, Q15, and Q20 are proportional current mirrors, with the emitter area of Q14 being 1-500 times that of Q15, and the emitter area of Q20 being 1-100 times that of Q15.
[0051] 4. Negative feedback adjustment circuit and sampling circuit
[0052] like Figure 1 As shown, the negative feedback adjustment circuit consists of Q18, Q19, and R16, and the sampling circuit consists of R14 and R15 connected in series, with the intermediate connection point serving as the sampling point. Q18 and Q19 are power adjustment transistors, which are implemented using an array of adjustment transistors in integrated circuit layout design. Because the negative feedback adjustment transistors need to form a negative feedback loop, the components involved in the feedback path are also drawn, as shown below. Figure 5 As shown.
[0053] The negative feedback adjustment circuits Q18 and Q19 control the voltage difference between the input and output voltages by adjusting their own conduction levels, thereby achieving a stable output voltage. Simultaneously, the negative feedback adjustment circuit samples the emitter current of Q18; the sampled signal passes through resistor R15, is amplified by the feedback loop, and then acts on the bases of the adjustment transistors Q18 and Q19. Figure 6 As shown. Through a negative feedback mechanism, the base voltages of transistors Q18 and Q19 are adjusted, thereby changing their conduction level and achieving a balanced current distribution.
[0054] The transistor arrays represented by Q18 and Q19 consist of three groups of transistors and resistors. Q18 is laid out as an array transistor in the integrated circuit layout design; Q18 is part of group A1 and group A2 (dual emitter). Q19 is also laid out as an array transistor in the integrated circuit layout design; Q19 is part of group A3. The collectors of each group of transistors are interconnected, their bases are interconnected, and their emitters are connected to one end of the corresponding emitter resistor. Group A1 consists of seven groups of transistors and emitter resistors connected in parallel. Each group of transistors consists of 1-10 transistors connected in parallel. Each group of transistors has an emitter resistor connected to its emitter, and the other end of the emitter resistor in each group is connected to the E1 terminal.
[0055] Group A2 is designed the same as Group A1. The other end of the emitter resistor in each group is connected to the E2 terminal, and the E2 terminal is connected to the R14 and R15 connection terminal.
[0056] Group A3 consists of N groups of transistors, emitter resistors, and ballast resistors connected in parallel, where N ranges from 1 to 20. Each group of transistors consists of 1 to 10 transistors and emitter resistors connected in parallel. The other end of the emitter resistor is connected to one end of the ballast resistor, and the other end of the ballast resistor is connected to terminal E3.
[0057] To verify the current sharing performance of each unit in the negative feedback adjustment circuit array, the current balance of the adjustment transistors before and after the improvement will be compared. For example... Figure 7 As shown, compared to Figure 1 In the original circuit, the E2 branch was connected to the E3 branch, and the sampling resistor R15 was removed.
[0058] The results of the maximum and minimum transistor currents in the regulating transistor module before and after the improvement are shown in Table 1.
[0059] Table 1 shows the data comparison:
[0060] Maximum current (mA) when the transistor is operating Minimum current (mA) required for transistor operation Difference rate Before improvement 28.198 21.709 29.89% Improved 22.82 22.36 2.05%
[0061] It can be seen that by using a negative feedback adjustment transistor array design, the current of the adjustment transistor array during operation can be effectively balanced, avoiding local overheating of the chip during operation, which can lead to instability or even burnout.
[0062] like Figure 8 The application circuit shown uses external resistors R18 and R19, along with a load capacitor C, to regulate the voltage. R18 is typically 240Ω, and C is usually 10nF-1uF. Different output values are obtained by adjusting the value of R19. The output range of this voltage regulator circuit is 1.25V-37V.
[0063] In the above embodiments, the transistors of the active device can be changed to N-type or P-type transistors according to actual conditions. That is, the transistors are converted from N-type to P-type according to specific designs, and NPN transistors are replaced with PNP transistors. Furthermore, the active device can also be a MOSFET, with the collector of the transistor corresponding to the source of the MOSFET, the emitter of the transistor corresponding to the drain of the MOSFET, and the base of the transistor corresponding to the gate of the MOSFET. Alternatively, in another preferred embodiment, the active device can also be an IGBT, with the base of the transistor corresponding to the gate of the IGBT.
[0064] That is, the type of transistor can be changed according to the actual situation, such as NPN transistor becoming PNP transistor, NPN transistor becoming NMOS transistor, PNP transistor becoming PMOS transistor, or becoming an active device such as IGBT.
[0065] In the voltage regulator integrated circuit, the resistor type can be epitaxial layer resistor, base region resistor, collector resistor, emitter resistor, metal film resistor, etc.
[0066] Finally, it should be noted that the above embodiments are merely examples for clear illustration. This utility model includes, but is not limited to, the above embodiments, and it is neither necessary nor possible to exhaustively describe all implementation methods. Those skilled in the art can make other variations or modifications based on the above description. All implementation schemes that meet the requirements of this utility model are within the protection scope of this utility model.
Claims
1. A highly reliable adjustable voltage regulator integrated circuit, characterized in that: Includes integrated PNP transistors Q1, Q2, Q3, Q4, Q7, Q9, Q10, Q11, Q14, Q15, Q20; integrated NPN transistors Q5, Q6, Q8, Q12, Q13, Q16, Q17, Q18, Q19; integrated Zener diode Z1; integrated resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17; and integrated capacitors C1 and C2. Z1, R1, R6, R8 and transistor Q6 constitute a startup circuit. The startup circuit and Q5 constitute a micro-current source to provide operating current for the bias circuit. Q1, Q2, Q3, Q4 and resistors R2, R3, R4, R5 constitute a proportional current source bias circuit; The transistors Q10, Q11, Q12, Q13 and resistors R10, R11 form a reference circuit; Q7, Q8, Q9, C1, and C2 form an amplifier circuit and a frequency compensation circuit, which amplifies and compensates the received reference circuit output voltage. Q14, Q15, and Q20 form a current compensation circuit; Q16, Q17, R12, and R13 form a current monitoring and adjustment circuit; Q18, Q19, and R16 form a negative feedback adjustment circuit; R14 and R15 are connected in series to form a sampling circuit, and the intermediate connection point is the sampling point. The cathode of Z1 is connected to one end of R1 and one end of R6. The anode of Z1 is connected to one end of R7, the emitter of Q6, the collector of Q7, one end of R9, the collector of Q9, one end of C2, the bases of Q12 and Q13, one end of R15, the emitter 1 of Q18, one end of R16, and the VOUT2 port. The other end of R1 is connected to one end of R2, one end of R3, one end of R4, one end of R5, the collector of Q8, the emitter of Q14, the emitters of Q15 and Q20, and Q18. Connect the collector and VIN port of Q19; connect the other end of R6 to the base of Q5 and Q6, the collector of Q2, and one end of R8; connect the other end of R8 to the collector of Q6; connect the collector of Q5 to the collector and base of Q1, and the base of Q2 and Q3; connect the other end of R2 to the emitter of Q1, the other end of R3 to the emitter of Q2, the other end of R4 to the emitter of Q3, and the other end of R5 to the emitter of Q4; connect the collector of Q3 to the emitter of Q7, Q1... Connect the emitters of Q10 and Q11, the collector of Q14, the base of Q16, and one end of R12; connect the other end of R12 to the collector of Q20 and the base of Q17; connect the base of Q7 to the emitter of Q8 and the other end of R9; connect the base of Q8 to the emitter of Q9 and the collector of Q4; connect the base of Q9 to one end of C1, the other end of C2, and the collectors of Q10 and Q12; connect the other end of C1 to one end of R11 and one end of R17; connect the other end of R17 to the ADJ port. Connections: The base of Q10 is connected to the base and collector of Q11, and the collector of Q13; the emitter of Q12 is connected to the other end of R11 and one end of R10, and the other end of R10 is connected to the emitter of Q13; the emitter of Q16 is connected to one end of R13, the other end of R13 is connected to the emitter of Q17, the base of Q18 and Q19, and one end of R14, the other end of R14 is connected to the other end of R15, and the emitter of Q18; the emitter of Q19 is connected to the other end of R16.
2. The high-reliability adjustable voltage regulator integrated circuit as described in claim 1, characterized in that: The emitter area of Q13 is N times the emitter area of Q12, where N is a positive number.
3. The high-reliability adjustable voltage regulator integrated circuit as described in claim 1, characterized in that: The emitter area of Q14 is 1-500 times that of Q15, and the emitter area of Q20 is 1-100 times that of Q15.
4. The high-reliability adjustable voltage regulator integrated circuit as described in claim 1, characterized in that: The Q18 is laid out as an array of transistors in the integrated circuit layout design, divided into A1 group transistors and A2 group transistors. The collectors of each group of transistors are connected to each other, the bases are connected to each other, and the emitters are connected to one end of the corresponding emitter resistor. Group A1 consists of 7 groups of transistors and emitter resistors connected in parallel. Each group of transistors consists of 1-10 transistors connected in parallel. Each group of transistors has an emitter resistor connected to its emitter. The other end of the emitter resistor of each group is connected to the E1 terminal, and the E1 terminal is connected to the VOUT2 terminal. Group A2 is designed the same as Group A1. The other end of the emitter resistor in each group is connected to the E2 terminal, and the E2 terminal is connected to the R14 and R15 connection terminal.
5. A high-reliability adjustable voltage regulator integrated circuit as described in claim 1, characterized in that: The Q19 is laid out as an array transistor in the integrated circuit layout design, which is a group of transistors A3; the collectors of each group of transistors are connected to each other, the bases are connected to each other, and the emitters are all connected to one end of the corresponding emitter resistor. Group A3 consists of N groups of transistors, emitter resistors, and ballast resistors connected in parallel, where N is 1-20. Each group of transistors consists of 1-10 transistors and emitter resistors connected in parallel. The other end of the emitter resistor is connected to one end of the ballast resistor, and the other end of the ballast resistor is connected to terminal E3.
6. A high-reliability adjustable voltage regulator integrated circuit as described in any one of claims 1-5, characterized in that: The type of transistor can be changed according to the actual situation, such as NPN transistor becoming PNP transistor, NPN transistor becoming NMOS transistor, PNP transistor becoming PMOS transistor, or becoming IGBT active device.
7. A high-reliability adjustable voltage regulator integrated circuit as described in any one of claims 1-5, characterized in that: The transistors are converted from N-type to P-type according to the specific design, with NPN transistors being replaced by PNP transistors and NPN transistors being replaced by PNP transistors.
8. A high-reliability adjustable voltage regulator integrated circuit as described in any one of claims 1-5, characterized in that: The type of transistor can be replaced with NMOS, PMOS, or IGBT depending on the specific design.
9. A high-reliability adjustable voltage regulator integrated circuit as described in any one of claims 1-5, characterized in that: The resistor is an epitaxial layer resistor or a base layer resistor.
10. A high-reliability adjustable voltage regulator integrated circuit as described in any one of claims 1-5, characterized in that: The resistor is either the collector layer resistor or the emitter layer resistor.