Security terminal based on quantum random number

By combining interface boards and module boards, the problem of insufficient space utilization in the layout of security terminals is solved, enabling more efficient hardware development and heat dissipation management, and adapting to the flexible needs of small-sized terminals.

CN224163952UActive Publication Date: 2026-04-24FUJIAN ZHENSHI INFORMATION TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
FUJIAN ZHENSHI INFORMATION TECH CO LTD
Filing Date
2025-05-26
Publication Date
2026-04-24

AI Technical Summary

Technical Problem

Existing security terminal hardware designs suffer from insufficient utilization of layout space and high development costs, especially in small-size scenarios where flexible adjustments are difficult.

Method used

The design adopts a combination of interface board and module board. The interface board and module board are respectively equipped with interface components and functional systems. There is a space between the interface components. The microcontroller minimum system and other functional systems are placed in the space, which improves the layout space utilization by utilizing three-dimensional space.

Benefits of technology

It improves the utilization rate of layout space, reduces terminal area and development workload, and at the same time improves hardware development efficiency and product temperature adaptability.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model relates to the technical field of security terminals, in particular to a security terminal based on quantum random numbers, which comprises an interface board and a module board which are covered together and electrically connected with each other, and interface components are respectively arranged on the edges of two opposite ends of one side surface of the interface board close to the module board. A single-chip microcomputer minimum system, a power supply subsystem, a communication and positioning subsystem, an indication subsystem and an encryption and decryption subsystem are arranged on the side face, close to the interface board, of the module board, and a containing space is formed between the two interface assemblies. The single-chip microcomputer minimum system, the power supply subsystem, the communication and positioning subsystem, the indication subsystem and the encryption and decryption subsystem are all placed in the containing space, and through the design of the interface board and the module board, the height space in the three-dimensional space can be fully utilized, so that the overall layout space utilization rate is increased, and the space utilization rate is increased. And the target of reducing terminal area and development workload is achieved.
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Description

Technical Field

[0001] This utility model relates to the field of secure terminal technology, and in particular to a secure terminal based on quantum random numbers. Background Technology

[0002] Common hardware design approaches for network security terminal products include: 1) a complete circuit board layout; 2) a layout combining a core board and a baseboard. However, the complete circuit board layout is suitable for scenarios with minimal changes and high usage, but any change in requirements necessitates redesign and trial production, making it inflexible. Furthermore, since all components are on the same circuit board, the development cost is high. The layout combining a core board and a baseboard, on the other hand, does not fully utilize the layout space. Conventional core boards typically require integration with the baseboard using methods such as perforated holes, BGA (Ball Grid Array), headers, and ribbon cables. The core board usually also needs to be used in conjunction with the baseboard. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a small-sized security terminal based on quantum random numbers, which can make full use of the height space in three-dimensional space, thereby improving the overall layout space utilization rate.

[0004] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows:

[0005] A secure terminal based on quantum random numbers includes an interface board and a module board that are mounted together and electrically connected to each other. The interface board has interface components on the opposite edges of one side of the module board. The module board has a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem on the side of the interface board. There is a receiving space between the two sets of interface components, and the microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed in the receiving space.

[0006] Furthermore, the microcontroller minimum system includes a central processing unit (CPU), and the communication and positioning subsystem includes two network ports, a first RS232 interface, a first RS485 interface, a Type-C interface, a positioning module, a level signal acquisition interface, and a 4G / 5G communication module. The network ports, the first RS232 interface, the first RS485 interface, the Type-C interface, the positioning module, and the level signal acquisition interface are all located on the side of the module board near the interface board. The first RS232 interface, the first RS485 interface, and the two network ports are sequentially arranged along one edge of the side of the module board near the interface board. The Type-C interface is arranged along the other edge of the side of the module board near the interface board. The 4G / 5G communication module is located on the side of the module board away from the interface board and is positioned opposite the CPU.

[0007] Furthermore, the edge of the module board with the Type-C interface is aligned with the edge of the interface board with the interface component.

[0008] Furthermore, the 4G / 5G communication module and the central processing unit are separated by copper plating in a portion of the ground plane of the module board.

[0009] Furthermore, the 4G / 5G communication module and the central processing unit are separated by copper pours on the top, power, and bottom layers of the module board.

[0010] Furthermore, the two sets of interface components are respectively a first interface component and a second interface component. The first interface component includes two RJ45 interfaces, an indicator light interface, and a JACK power interface. The two RJ45 interfaces, the indicator light interface, and the JACK power interface are sequentially arranged along one edge of the side of the interface board near the module board. The second interface component includes a second RS232 interface, a second RS485 interface, a SIM card slot, and a debugging serial port. The second RS232 interface, the second RS485 interface, the SIM card slot, and the debugging serial port are sequentially arranged along the other edge of the side of the interface board near the module board.

[0011] Furthermore, the first interface component also includes a Phoenix terminal power supply interface, which is disposed along one edge of the side of the interface board near the module board, and is disposed on the side of the JACK power interface away from the RJ45 interface.

[0012] Furthermore, the indicator subsystem includes four LED indicator lights and two network port indicator lights. The four LED indicator lights include a 4G / 5G communication indicator light, a positioning indicator light, a quantum encryption indicator light, and a system status indicator light. The LED indicator lights, network port indicator lights, 4G / 5G communication indicator lights, positioning indicator lights, and system debugging indicator lights are all located on the side of the module board near the interface board, and the two network port indicator lights, one 4G / 5G communication indicator light, one positioning indicator light, one quantum encryption indicator light, and one system status indicator light are all placed within the accommodating space.

[0013] Furthermore, the encryption / decryption subsystem includes a quantum random number chip, a first security chip, a first security chip power supply battery, a second security chip, and a quantum key storage module. The quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all disposed on the side of the module board near the interface board, and the quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all placed within the accommodating space.

[0014] Furthermore, it also includes a TF card slot, which is located on one side of the module board near the interface board.

[0015] The beneficial effects of this utility model are as follows:

[0016] This solution uses an interface board and a module board. Interface components are located on opposite edges of the side of the interface board closest to the module board. On the side of the module board closest to the interface board, there are a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem. There is a space between the two sets of interface components, and the microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed in the space. This design of the interface board and module board can make full use of the height space in three-dimensional space, thereby improving the overall layout space utilization and achieving the goal of reducing terminal area and development workload. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the interface board and module board of the quantum random number-based security terminal of this utility model installed together;

[0018] Figure 2 This is a schematic diagram of the interface board of the quantum random number-based secure terminal of this utility model;

[0019] Figure 3 This is a schematic diagram of the module board of the quantum random number-based security terminal of this utility model;

[0020] Label Explanation:

[0021] 1. Interface board; 11. First interface component; 111. RJ45 interface; 112. Indicator light interface; 113. JACK power interface; 114. Phoenix terminal power supply interface; 12. Second interface component; 121. Second RS232 interface; 122. Second RS485 interface; 123. SIM card slot; 124. Debug serial port;

[0022] 2. Module board; 201. Network port; 202. First RS232 interface; 203. First RS485 interface; 204. Type-C interface; 205. Positioning module; 206. Level signal acquisition interface; 207. 4G / 5G communication module; 208. TF card slot; 209. Central processing unit;

[0023] 3. Threaded column. Detailed Implementation

[0024] To explain in detail the technical content, objectives, and effects of this utility model, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0025] Please refer to Figure 1 A secure terminal based on quantum random numbers includes an interface board and a module board that are mounted together and electrically connected to each other. The interface board has interface components on the opposite edges of one side of the module board. The module board has a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem on the side of the interface board. There is a receiving space between the two sets of interface components, and the microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed in the receiving space.

[0026] As can be seen from the above description, the beneficial effects of this utility model are as follows:

[0027] This solution uses an interface board and a module board. Interface components are located on opposite edges of the side of the interface board closest to the module board. On the side of the module board closest to the interface board, there are a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem. There is a space between the two sets of interface components, and the microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed in the space. This design of the interface board and module board can make full use of the height space in three-dimensional space, thereby improving the overall layout space utilization and achieving the goal of reducing terminal area and development workload.

[0028] Furthermore, the microcontroller minimum system includes a central processing unit (CPU), and the communication and positioning subsystem includes two network ports, a first RS232 interface, a first RS485 interface, a Type-C interface, a positioning module, a level signal acquisition interface, and a 4G / 5G communication module. The network ports, the first RS232 interface, the first RS485 interface, the Type-C interface, the positioning module, and the level signal acquisition interface are all located on the side of the module board near the interface board. The first RS232 interface, the first RS485 interface, and the two network ports are sequentially arranged along one edge of the side of the module board near the interface board. The Type-C interface is arranged along the other edge of the side of the module board near the interface board. The 4G / 5G communication module is located on the side of the module board away from the interface board and is positioned opposite the CPU.

[0029] As can be seen from the above description, by setting multiple interfaces and functional modules on the module board, both the module board and the interface board have external interfaces that can be directly used by the terminal product. This eliminates the need to provide connection cables between the module and the baseboard, reducing wiring space, reducing the overall area, and improving the efficiency of hardware development. Moreover, the 4G / 5G communication module is located on the opposite side of the central processing unit, which allows the 4G / 5G communication module to be in close contact with the casing for heat dissipation during use.

[0030] Furthermore, the edge of the module board with the Type-C interface is aligned with the edge of the interface board with the interface component.

[0031] As can be seen from the above description, the edge of the module board with the Type-C interface is aligned with the edge of the interface board with the interface component, which can further improve the overall layout space utilization.

[0032] Furthermore, the 4G / 5G communication module and the central processing unit are separated by copper plating in a portion of the ground plane of the module board.

[0033] As can be seen from the above description, in small-sized quantum random number-based security terminals, heat dissipation is difficult due to the small size. Therefore, by separating the 4G / 5G communication module and the central processing unit by copper pouring in a certain area of ​​the ground layer of the module board, the heat of the central processing unit can be delayed from being quickly conducted to the 4G / 5G communication module, thus affecting the heat dissipation of the 4G / 5G communication module. This avoids the 4G / 5G communication module from experiencing abnormal high temperatures, thereby improving the temperature adaptability of the product.

[0034] Furthermore, the 4G / 5G communication module and the central processing unit are separated by copper pours on the top, power, and bottom layers of the module board.

[0035] Furthermore, the two sets of interface components are respectively a first interface component and a second interface component. The first interface component includes two RJ45 interfaces, an indicator light interface, and a JACK power interface. The two RJ45 interfaces, the indicator light interface, and the JACK power interface are sequentially arranged along one edge of the side of the interface board near the module board. The second interface component includes a second RS232 interface, a second RS485 interface, a SIM card slot, and a debugging serial port. The second RS232 interface, the second RS485 interface, the SIM card slot, and the debugging serial port are sequentially arranged along the other edge of the side of the interface board near the module board.

[0036] As can be seen from the above description, the interface board has external interfaces that can be directly used by terminal products. This eliminates the need to provide connection cables between the board and the baseboard, reducing wiring space, which not only reduces the overall area but also improves the efficiency of hardware development.

[0037] Furthermore, the first interface component also includes a Phoenix terminal power supply interface, which is disposed along one edge of the interface board near the module board, and is disposed on the side of the JACK power interface away from the RJ45 interface.

[0038] As can be seen from the above description, by setting up the Phoenix terminal power supply interface, users can easily connect the wires when using it.

[0039] Furthermore, the indicator subsystem includes four LED indicator lights and two network port indicator lights. The four LED indicator lights include a 4G / 5G communication indicator light, a positioning indicator light, a quantum encryption indicator light, and a system status indicator light. The LED indicator lights, network port indicator lights, 4G / 5G communication indicator lights, positioning indicator lights, and system debugging indicator lights are all located on the side of the module board near the interface board, and the two network port indicator lights, one 4G / 5G communication indicator light, one positioning indicator light, one quantum encryption indicator light, and one system status indicator light are all placed within the accommodating space.

[0040] Furthermore, the encryption / decryption subsystem includes a quantum random number chip, a first security chip, a first security chip power supply battery, a second security chip, and a quantum key storage module. The quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all disposed on the side of the module board near the interface board, and the quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all placed within the accommodating space.

[0041] Furthermore, it also includes a TF card slot, which is located on the side of the module board near the interface board.

[0042] Please refer to Figures 1 to 3 As shown, Embodiment 1 of this utility model is as follows:

[0043] Please refer to Figure 1 A secure terminal based on quantum random numbers includes an interface board 1 and a module board 2 that are mounted together and electrically connected to each other (the interface board 1 has four threaded posts 3 on the side near the module board 2, and the four threaded posts 3 have threaded holes, so that the module board 2 can be screwed onto the interface board 1). The edges of the opposite ends of the side of the interface board 1 near the module board 2 are respectively provided with interface components. The side of the module board 2 near the interface board 1 is provided with a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem. There is a receiving space between the two sets of interface components, and the microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed in the receiving space.

[0044] Please refer to Figure 2 The single-chip microcomputer minimum system includes a central processing unit 209. The communication and positioning subsystem includes two network ports 201, a first RS232 interface 202, a first RS485 interface 203, a Type-C interface 204, a positioning module 205, a level signal acquisition interface 206, and a 4G / 5G communication module 207. The network port 201, the first RS232 interface 202, the first RS485 interface 203, the Type-C interface 204, the positioning module 205, and the level signal acquisition interface 206 are also included. All 06 are located on the side of the module board 2 near the interface board 1, and a first RS232 interface 202, a first RS485 interface 203 and two network ports 201 are arranged sequentially along one edge of the side of the module board 2 near the interface board 1. The Type-C interface 204 is arranged along the other edge of the side of the module board 2 near the interface board 1. The 4G / 5G communication module 207 is located on the side of the module board 2 away from the interface board 1. The 4G / 5G communication module 207 is arranged opposite to the central processing unit 209.

[0045] Please refer to Figure 1 and Figure 3 The edge of the Type-C interface 204 on the module board 2 is aligned with the edge of the interface component on the interface board 1.

[0046] The 4G / 5G communication module 207 and the central processing unit 209 are separated by copper plating in a portion of the ground plane of the module board 2.

[0047] The 4G / 5G communication module 207 and the central processing unit 209 are separated by copper pours on the top, power, and bottom layers of the module board 2.

[0048] Please refer to Figure 1 The two sets of interface components are a first interface component 11 and a second interface component 12. The first interface component 11 includes two RJ45 interfaces 111, an indicator light interface 112, and a JACK power interface 113. The two RJ45 interfaces 111, the indicator light interface 112, and the JACK power interface 113 are arranged sequentially along one edge of the side of the interface board 1 near the module board 2. The second interface component 12 includes a second RS232 interface 121, a second RS485 interface 122, a SIM card slot 123, and a debugging serial port 124. The second RS232 interface 121, the second RS485 interface 122, the SIM card slot 123, and the debugging serial port 124 are arranged sequentially along the other edge of the side of the interface board 1 near the module board 2.

[0049] Please refer to Figure 1 The first interface component 11 further includes a Phoenix terminal power supply interface 114, which is disposed along one edge of the side of the interface board 1 near the module board 2, and is disposed on the side of the JACK power interface 113 away from the RJ45 interface 111.

[0050] The indicator subsystem includes four LED indicator lights and two network port indicator lights 201. The four LED indicator lights include a 4G / 5G communication indicator light, a positioning indicator light, a quantum encryption indicator light, and a system status indicator light. The LED indicator lights, network port indicator lights, 4G / 5G communication indicator lights, positioning indicator lights, and system debugging indicator lights are all located on the side of the module board 2 near the interface board 1, and the two network port indicator lights 201, one 4G / 5G communication indicator light, one positioning indicator light, one quantum encryption indicator light, and one system status indicator light are all placed within the accommodating space.

[0051] The encryption / decryption subsystem includes a quantum random number chip, a first security chip, a first security chip power supply battery, a second security chip, and a quantum key storage module. The quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all disposed on the side of the module board 2 near the interface board 1, and the quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all placed within the accommodating space.

[0052] The positioning indicator light: After the security terminal is powered on, it searches for a positioning signal. If the signal is good, the positioning indicator light will light up. The security terminal checks whether location authentication is enabled. If location authentication is enabled, it calculates whether the current location is within the legal location range. If the terminal is found to be outside the legal location range, the positioning indicator light will turn off, and the terminal will upload a location anomaly alarm to the quantum security operation monitoring and management platform.

[0053] The quantum encryption indicator light illuminates during the process of the secure terminal using a quantum random number chip to generate quantum random numbers, using a quantum protection key in a quantum key storage module to obtain a quantum session key, and using the quantum session key to encrypt communication data. When the process ends, the quantum encryption indicator light turns off.

[0054] The system status indicator light: During the power-on phase, the system status indicator light flashes, and after the power-on is completed, the status light remains on.

[0055] The quantum random number chip provides high-quality true random numbers for secure terminals. During the production stage of secure terminals, quantum session keys are obtained using the quantum protection key in the quantum key storage module, and quantum random numbers are required in the process of encrypting communication data using the quantum session key.

[0056] The first security chip is a low-power chip used to store critical information of the device. It is powered on throughout its entire life cycle, and the device will be unusable after power failure.

[0057] It also includes a TF card slot 208, which is located on the side of the module board 2 near the interface board 1; the TF card slot supports the insertion of a TF password card and can be used as a second quantum key storage module.

[0058] In this embodiment, the power supply system supports two-stage DC power supply. The input voltage of the first-stage DC power supply is 9~51V or 12V~75V (the two use different power chip solutions), and the input voltage of the second-stage DC power supply is 4~6V, with a typical value of 5V. The inputs of the first-stage DC power supply and the second-stage DC power supply cannot coexist. If the first-stage DC power supply is used, the first-stage DC power supply will output a 5V voltage as the input voltage of the second-stage DC power supply. The output side of the second-stage DC power supply will provide multiple output voltages (including 3.8V, 3.3V, 1.8V, etc.) to power the entire module.

[0059] To monitor power supply health, this solution employs a first security chip for monitoring: It uses I / O interrupts to detect power failures in the secondary power supply input voltage, and uses AD sampling technology to sample the voltages of the first and second stage power supplies and the voltage of the battery powering the first security chip. Data is exchanged with the central processing unit 209 via a serial port. When a power failure occurs, the central processing unit 209 stops working, and the first security chip is powered by its own battery. It detects the power failure signal via I / O interrupts, which triggers the saving of the voltage sampling values ​​and time before the power failure. The first security chip then enters sleep mode, preserving the data in its memory. When power is restored, the central processing unit 209 is woken up by the first security chip's wake-up interrupt. The first security chip then feeds back the power failure time and voltage sampling values ​​to the central processing unit 209, ultimately transmitting a power failure alarm to the administrator and the quantum security operation monitoring and management platform.

[0060] In this embodiment, the module board 2 also includes a reserved interface, which includes multiplexed or additional IO, serial port, USB, 7816 and other interfaces, and provides signals to the interface board 1 in the form of a ribbon cable.

[0061] Some interfaces on module board 2 in this design can be directly reused on the terminal. Compared to the conventional core board and baseboard approach, this design uses module board 2 plus interface board 1, which makes better use of the height space in three dimensions. Furthermore, since module board 2 and interface board 1 already have external interfaces that the terminal can directly use, there is no need to provide connection cables between them and the baseboard. This design using module board 2 plus interface board 1 has the following advantages:

[0062] 1. The number of connector pins on module board 2 and interface board 1 was reduced, as well as the corresponding wiring work, which reduced wiring space and improved hardware development efficiency;

[0063] 2. The interface of module board 2 does not need to occupy the plug-in space of interface board 1. The upper and lower layers can be reasonably arranged according to the actual interface requirements of module board 2 and terminal, thereby improving the space utilization of the interface. More terminal external interfaces can be deployed in a smaller area.

[0064] 3. Since module board 2 already has a complete power supply circuit and antenna interface line, interface board 1 only needs to be laid out according to the terminal's external interface requirements. Interface board 1 only needs to place simple plug-in interfaces and necessary lines. The design of interface board 1 is very simple, which can efficiently, quickly and flexibly adapt to market demands and enhance product competitiveness.

[0065] 4. From the perspective of the terminal, the module board 2 is generally small in size and has limited interface layout; therefore, the reserved peripherals can be led out on the module board 2 through ribbon cables, and when necessary, they can be expanded on the interface board 1, which can quickly expand the terminal's product capabilities.

[0066] The reuse of interfaces between modules and terminals allows for compatibility between modules and terminal products using only the same software. This eliminates software differences at the hardware level, reducing R&D difficulty and workload. Furthermore, it reduces the variety of firmware types required for after-sales maintenance, thereby reducing maintenance complexity and significantly saving the company the cost of maintaining the entire product lifecycle.

[0067] In summary, this utility model provides a secure terminal based on quantum random numbers. By setting up an interface board and a module board, interface components are respectively provided on the opposite edges of the side of the interface board near the module board. On the side of the module board near the interface board, a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem are provided. A receiving space is provided between the two sets of interface components, and the microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed within this receiving space. Through this design of the interface board and module board, a secure terminal based on quantum random numbers can be established. By fully utilizing the height space in three-dimensional space, the overall layout space utilization rate can be improved, thereby reducing the terminal area and development workload. Moreover, in small-sized quantum random number-based security terminals, heat dissipation is difficult due to the small size. Therefore, by separating the 4G / 5G communication module and the central processing unit with copper in a certain area of ​​the ground layer of the module board, the heat of the central processing unit can be delayed from being quickly conducted to the 4G / 5G communication module, thus avoiding the high temperature abnormality of the 4G / 5G communication module and improving the temperature adaptability of the product.

[0068] The above description is merely an embodiment of this utility model and does not limit the patent scope of this utility model. Any equivalent modifications made based on the content of this utility model specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of this utility model.

Claims

1. A secure terminal based on quantum random numbers, characterized in that, The system includes an interface board and a module board that are mounted together and electrically connected to each other. The interface board has interface components on the opposite edges of one side of the module board. The module board has a microcontroller minimum system, a power supply system, a communication and positioning subsystem, an indication subsystem, and an encryption / decryption subsystem on the side of the interface board. There is a receiving space between the two sets of interface components. The microcontroller minimum system, power supply system, communication and positioning subsystem, indication subsystem, and encryption / decryption subsystem are all placed in the receiving space.

2. The secure terminal based on quantum random numbers according to claim 1, characterized in that, The microcontroller minimum system includes a central processing unit (CPU). The communication and positioning subsystem includes two network ports, a first RS232 interface, a first RS485 interface, a Type-C interface, a positioning module, a level signal acquisition interface, and a 4G / 5G communication module. The network ports, the first RS232 interface, the first RS485 interface, the Type-C interface, the positioning module, and the level signal acquisition interface are all located on the side of the module board near the interface board. The first RS232 interface, the first RS485 interface, and the two network ports are sequentially arranged along one edge of the side of the module board near the interface board. The Type-C interface is arranged along the other edge of the side of the module board near the interface board. The 4G / 5G communication module is located on the side of the module board away from the interface board and is positioned opposite the CPU.

3. The secure terminal based on quantum random numbers according to claim 2, characterized in that, The edge of the module board with the Type-C interface is aligned with the edge of the interface board with the interface component.

4. The secure terminal based on quantum random numbers according to claim 2, characterized in that, The 4G / 5G communication module and the central processing unit are separated by copper plating in a portion of the ground plane of the module board.

5. The secure terminal based on quantum random numbers according to claim 4, characterized in that, The 4G / 5G communication module and the central processing unit are separated by copper pours on the top, power, and bottom layers of the module board.

6. The secure terminal based on quantum random numbers according to claim 1, characterized in that, The two sets of interface components are a first interface component and a second interface component. The first interface component includes two RJ45 interfaces, an indicator light interface, and a JACK power interface. The two RJ45 interfaces, the indicator light interface, and the JACK power interface are arranged sequentially along one edge of the side of the interface board near the module board. The second interface component includes a second RS232 interface, a second RS485 interface, a SIM card slot, and a debug serial port. The second RS232 interface, the second RS485 interface, the SIM card slot, and the debug serial port are arranged sequentially along the other edge of the side of the interface board near the module board.

7. The secure terminal based on quantum random numbers according to claim 6, characterized in that, The first interface component also includes a Phoenix terminal power supply interface, which is disposed along one edge of the interface board near the module board, and is located on the side of the JACK power interface away from the RJ45 interface.

8. The secure terminal based on quantum random numbers according to claim 1, characterized in that, The indicator subsystem includes four LED indicator lights and two network port indicator lights. The four LED indicator lights include a 4G / 5G communication indicator light, a positioning indicator light, a quantum encryption indicator light, and a system status indicator light. The LED indicator lights, network port indicator lights, 4G / 5G communication indicator lights, positioning indicator lights, and system debugging indicator lights are all located on the side of the module board near the interface board, and the two network port indicator lights, one 4G / 5G communication indicator light, one positioning indicator light, one quantum encryption indicator light, and one system status indicator light are all placed within the accommodating space.

9. The secure terminal based on quantum random numbers according to claim 1, characterized in that, The encryption / decryption subsystem includes a quantum random number chip, a first security chip, a first security chip power supply battery, a second security chip, and a quantum key storage module. The quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all disposed on the side of the module board near the interface board, and the quantum random number chip, the first security chip, the first security chip power supply battery, the second security chip, and the quantum key storage module are all placed within the housing space.

10. The secure terminal based on quantum random numbers according to claim 9, characterized in that, It also includes a TF card slot, which is located on the side of the module board near the interface board.