SiC MOSFET power module

By designing the upper and lower bridge arms of the SiC MOSFET module with the same spacing between the SiC MOSFET chip rows, copper wire connections, and AMB substrate connections, the problem of large parasitic inductance in the SiC MOSFET module is solved, resulting in lower voltage overshoot and electromagnetic interference, and improving the reliability and power density of the module.

CN224165048UActive Publication Date: 2026-04-24MACMIC SCIENCE & TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
MACMIC SCIENCE & TECHNOLOGY CO LTD
Filing Date
2025-06-06
Publication Date
2026-04-24

AI Technical Summary

Technical Problem

In existing SiC MOSFET modules, the parasitic inductance caused by traditional packaging methods is too large, which cannot meet the high switching frequency and high operating temperature requirements of SiC MOSFETs, resulting in problems such as voltage overshoot, oscillation and electromagnetic interference.

Method used

The design employs a uniform spacing between the upper and lower bridge arms SiC MOSFET chips, connects the gate and source via copper wires, uses an AMB substrate to connect the bridge arms ceramic copper-clad laminate to reduce parasitic inductance, and uses a Kelvin-based isolation drive circuit to ensure current consistency between each bridge arm chip.

Benefits of technology

It effectively reduces parasitic inductance, reduces voltage overshoot and electromagnetic interference, and improves the reliability and power density of the module.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the technical field of power electronic modules, and specifically relates to a SiC MOSFET power module. The SiC MOSFET power module includes: a base plate; an upper bridge arm ceramic copper-clad plate and a lower bridge arm ceramic copper-clad plate are arranged on the bottom plate; two chip welding areas are arranged on each bridge arm ceramic copper-clad plate in parallel; siC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) chips with the same number are welded on each chip welding area; and the distance between the two chip welding areas on the upper bridge arm ceramic copper-clad plate is the same as the distance between the two chip welding areas on the lower bridge arm ceramic copper-clad plate. The distances between the SiC MOSFET chip rows of the upper bridge arm and the lower bridge arm are designed to be the same, so that mutually counteracted magnetic fluxes in a commutation loop are increased, and stray inductance is smaller.
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Description

Technical Field

[0001] This utility model belongs to the field of power electronic module technology, specifically relating to a SiC MOSFET power module. Background Technology

[0002] As a wide-bandgap semiconductor material, SiC has many advantages compared to first- and second-generation semiconductor materials, such as: SiC's breakdown field strength is 10 times that of Si, SiC devices can have higher doping concentrations and thinner epitaxial thicknesses, and have lower on-resistance compared to Si at the same voltage level; SiC's wide bandgap characteristics enable SiC devices to have higher operating temperatures and improved radiation resistance; SiC's high electron saturation velocity characteristics allow devices to operate at higher frequencies; and SiC's higher thermal conductivity helps to improve the overall power density of the system.

[0003] Currently, most SiC MOSFET modules still use the same packaging as Si IGBT modules, using solder paste to connect the drain of the SiC MOSFET chip to the ceramic copper-clad laminate, and aluminum bonding wires to connect the source and gate of the SiC MOSFET to the ceramic copper-clad laminate. However, SiC MOSFET chips have characteristics such as high switching frequency, high operating temperature, and high breakdown voltage, and the traditional packaging method using aluminum bonding wires and solder paste cannot meet the packaging and reliability requirements. The aluminum bonding wires in traditional packaging generate a large parasitic inductance. Due to the high switching speed, the di / dt value of SiC MOSFETs is larger in the switching transient. Excessive parasitic inductance can cause voltage overshoot and oscillation, which in turn leads to problems such as increased electrical stress, losses, thermal stress, and electromagnetic interference in the chip. Utility Model Content

[0004] The purpose of this invention is to provide a SiC MOSFET power module to solve the technical problem of large parasitic inductance in existing SiC MOSFET modules.

[0005] This application provides a SiC MOSFET power module. The SiC MOSFET power module includes: a base plate;

[0006] The base plate is provided with an upper bridge arm ceramic copper-clad plate and a lower bridge arm ceramic copper-clad plate.

[0007] Two chip soldering areas are set in parallel on the ceramic copper-clad laminate of each bridge arm;

[0008] Each chip bonding area has the same number of SiC MOSFET chips soldered on it; and

[0009] The spacing between the two chip soldering areas on the upper bridge arm ceramic copper-clad board is the same as that on the lower bridge arm ceramic copper-clad board.

[0010] In one embodiment of this application, a gate bonding region is provided between the two chip bonding areas on the ceramic copper-clad laminate of each bridge arm;

[0011] The gates of the SiC MOSFET chips on each chip bonding area are connected to the gate bonding area via corresponding first bonding lines; and

[0012] The gates of SiC MOSFET chips on the same bridge arm ceramic copper-clad laminate have the same length of the first bonding line connecting the gate to the gate bonding region.

[0013] In one embodiment of this application, a Kelvin source bonding region is also provided between the two chip bonding areas on the ceramic copper-clad laminate of each bridge arm;

[0014] The Kelvin source of the SiC MOSFET chip on each chip bonding area is connected to the Kelvin source bonding area through corresponding second bonding lines; and

[0015] The second bonding line connecting the Kelvin source of the SiC MOSFET chip on the same bridge arm ceramic copper-clad laminate to the Kelvin source bonding region has the same length.

[0016] In one embodiment of this application, power terminals are provided on the ceramic copper-clad plates of each bridge arm.

[0017] In one embodiment of this application, a signal terminal is provided on one side of the ceramic copper-clad plate of each bridge arm.

[0018] In one embodiment of this application, the corresponding areas of the upper bridge arm ceramic copper-clad laminate and the lower bridge arm ceramic copper-clad laminate are connected by a connecting bridge.

[0019] In one embodiment of this application, the upper bridge arm ceramic copper-clad laminate and the lower bridge arm ceramic copper-clad laminate are made of AMB substrate.

[0020] In one embodiment of this application, a source electrode welding area is provided on the ceramic copper-clad plate of each bridge arm;

[0021] The source of each SiC MOSFET chip is bonded to the source bonding area via copper wires.

[0022] The beneficial effects of this utility model are:

[0023] Unlike existing technologies, this application provides a SiC MOSFET power module. The SiC MOSFET power module includes: a base plate; an upper bridge arm ceramic copper-clad laminate and a lower bridge arm ceramic copper-clad laminate disposed on the base plate; two chip bonding areas are arranged in parallel on each bridge arm ceramic copper-clad laminate; each chip bonding area is soldered with the same number of SiC MOSFET chips; and the spacing between the two chip bonding areas on the upper bridge arm ceramic copper-clad laminate is the same as that on the lower bridge arm ceramic copper-clad laminate. By designing the spacing between the SiC MOSFET chips in the upper and lower bridge arms to be the same, this structure increases the mutually canceling magnetic flux in the commutation circuit, thus reducing stray inductance.

[0024] Other features and advantages of this invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objectives and other advantages of this invention are realized and obtained through the structures particularly pointed out in the description and the accompanying drawings.

[0025] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0026] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of a SiC MOSFET power module according to a preferred embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram of the commutation circuit of a SiC MOSFET power module according to a preferred embodiment of the present invention;

[0029] Figure 3 This is a schematic diagram of the half-bridge topology of a SiC MOSFET power module according to a preferred embodiment of the present invention.

[0030] In the picture:

[0031] 1. Base plate, 2. Upper bridge arm ceramic copper-clad laminate, 3. Lower bridge arm ceramic copper-clad laminate, 4. Chip bonding area, 5. SiC MOSFET chip, 6. Gate bonding area, 6. First bonding line, 61. Kelvin source bonding area, 7. Second bonding line, 71. Power terminal, 8. Signal terminal, 9. Connecting bridge, 10. Connection, 11. Source bonding area, 12. Copper wire. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0033] This application provides a SiC MOSFET power module, which will be described in detail below. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of the embodiments of this application. Furthermore, the descriptions of each embodiment have their own emphasis; parts not described in detail in a certain embodiment can be referred to in the relevant descriptions of other embodiments.

[0034] See Figure 1 In one embodiment, the SiC MOSFET power module includes: a base plate 1; an upper bridge arm ceramic copper-clad plate 2 and a lower bridge arm ceramic copper-clad plate 3 are disposed on the base plate 1; two chip bonding areas 4 are disposed in parallel on each bridge arm ceramic copper-clad plate; the same number of SiC MOSFET chips 5 are bonded to each chip bonding area 4; and the spacing between the two chip bonding areas 4 on the upper bridge arm ceramic copper-clad plate 2 is the same as that on the lower bridge arm ceramic copper-clad plate 3.

[0035] In this embodiment, the number of SiC MOSFET chips in the upper and lower bridge arms is the same, and the SiC MOSFET chips in the bridge arm are arranged in two parallel rows. The spacing between the rows of SiCMOS chips in the upper and lower bridge arms is the same. This structure is used to increase the magnetic flux that cancels each other out in the commutation circuit.

[0036] Furthermore, a gate bonding region 6 is provided between the two chip bonding areas 4 on each bridge arm ceramic copper-clad laminate; the gate of the SiC MOSFET chip 5 on each chip bonding area 4 is connected to the gate bonding region 6 through a corresponding first bonding line 61; and the first bonding line 61 connecting the gate of the SiC MOSFET chip 5 on the same bridge arm ceramic copper-clad laminate to the gate bonding region 6 has the same length.

[0037] Furthermore, a Kelvin source bonding region 7 is provided between the two chip bonding areas 4 on each bridge arm ceramic copper-clad laminate; the Kelvin source of the SiC MOSFET chip 5 on each chip bonding area 4 is connected to the Kelvin source bonding region 7 through a corresponding second bonding line 71; and the length of the second bonding line 71 connecting the Kelvin source of the SiC MOSFET chip 5 on the same bridge arm ceramic copper-clad laminate to the Kelvin source bonding region 7 is the same.

[0038] In this embodiment, the SiC MOSFET chips of each bridge arm are arranged in two parallel rows. The bonding wire length between the gate of each SiC MOSFET chip on the ceramic copper-clad laminate of the same bridge arm and the bonding wire length between the Kelvin source of each SiC MOSFET chip on the ceramic copper-clad laminate are the same. This design ensures that the current between the chips in each bridge arm is the same.

[0039] Optionally, each bridge arm ceramic copper-clad plate is provided with power terminals 8.

[0040] Optionally, each bridge arm's ceramic copper-clad laminate has a signal terminal 9 on one side. The signal terminal 9 can be a gate signal terminal or a Kelvin source signal terminal.

[0041] Optionally, the corresponding areas of the upper bridge arm ceramic copper-clad plate 2 and the lower bridge arm ceramic copper-clad plate 3 are connected by a connecting bridge 10.

[0042] Optionally, the upper bridge arm ceramic copper-clad laminate 2 and the lower bridge arm ceramic copper-clad laminate 3 adopt an AMB substrate, which reduces the module's thermal resistance.

[0043] Optionally, each bridge arm's ceramic copper-clad laminate has a source bonding area 11; the source of each SiC MOSFET chip 5 is bonded to the source bonding area 11 via copper wire 12. The drain of the power module SiCMOS chip is silver-sintered with the ceramic copper-clad laminate.

[0044] In one application scenario, the ceramic copper-clad laminate and signal terminals can be soldered onto the base plate, while the drain, power terminals, and connecting bridges of the SiC MOSFET chip are soldered onto the ceramic copper-clad laminate. The drain of the SiC MOSFET chip is soldered onto the ceramic copper-clad laminate and connected to the power terminals. The source of the SiC MOSFET chip is connected to the power terminals via bonding wires and connecting bridges. The gate and Kelvin source of the SiC MOSFET chip are connected to the signal terminals via bonding wires.

[0045] In summary, the SiC MOSFET power module of this invention has the following advantages:

[0046] 1. The power module of this utility model adopts a near-symmetrical structure of upper and lower bridge arms to increase the mutually canceling magnetic flux in the converter circuit, thus reducing the stray inductance;

[0047] 2. The power module of this utility model has the same number of SiCMOS chips in the upper and lower bridge arms. The SiCMOS chips in the bridge arms are arranged in two parallel rows, and the spacing between the rows of SiCMOS chips in the upper and lower bridge arms is the same. This structure increases the magnetic flux that cancels each other in the commutation circuit, and the stray inductance is also smaller.

[0048] 3. The connecting bridge between the ceramic copper-clad laminates of the power module in this patent reduces the noise inductance of the main circuit;

[0049] 4. The drive circuit of this patented power module adopts a Kelvin design, which is isolated from the main circuit and has low stray inductance.

[0050] 5. The SiCMOS chip position and current loop layout design of each bridge arm of the power module in this patent ensures that the current magnitude between the chips in each bridge arm is the same.

[0051] 6. In this patented power module, the SiCMOS chips in each bridge arm are arranged in two parallel rows. The bonding wire length of the gate of each SiCMOS chip to the ceramic copper-clad laminate is the same, and the bonding wire length of the Kelvin source of each SiCMOS chip to the ceramic copper-clad laminate is the same. This design ensures that the current between the chips in each bridge arm is the same.

[0052] It should be noted that all the devices (parts whose specific structures are not specified) selected in this application are general standard parts or parts known to those skilled in the art, and their structures and principles can be known to those skilled in the art through technical manuals or conventional experimental methods.

[0053] In the description of the embodiments of this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0054] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0055] Based on the above-described preferred embodiments of this utility model, and through the foregoing description, those skilled in the art can make various changes and modifications without departing from the technical concept of this utility model. The technical scope of this utility model is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A SiC MOSFET power module, characterized by, include: Base plate (1); The base plate (1) is provided with an upper bridge arm ceramic copper-clad plate (2) and a lower bridge arm ceramic copper-clad plate (3); Two chip soldering areas are set in parallel on the ceramic copper-clad plate of each bridge arm (4); Each chip bonding area (4) has the same number of SiC MOSFET chips (5) soldered on it; and The spacing between the two chip welding areas (4) on the upper bridge arm ceramic copper-clad laminate (2) is the same as that on the lower bridge arm ceramic copper-clad laminate (3).

2. The SiC MOSFET power module according to claim 1, characterized in that, A gate bonding area (6) is provided between the two chip bonding areas (4) on the ceramic copper-clad laminate of each bridge arm; The gates of the SiC MOSFET chips (5) on each chip bonding area (4) are connected to the gate bonding area (6) via corresponding first bonding lines (61); and The first bonding line (61) connecting the gate of the SiC MOSFET chip (5) on the same bridge arm ceramic copper-clad laminate to the gate bonding region (6) has the same length.

3. The SiC MOSFET power module according to claim 2, characterized in that, Kelvin source bonding area (7) is also provided between the two chip welding areas (4) on the ceramic copper-clad laminate of each bridge arm; The Kelvin source of the SiC MOSFET chip (5) on each chip bonding area (4) is connected to the Kelvin source bonding area (7) through the corresponding second bonding line (71); and The second bonding line (71) connecting the Kelvin source of the SiC MOSFET chip (5) on the same bridge arm ceramic copper-clad board to the Kelvin source bonding region (7) has the same length.

4. The SiC MOSFET power module according to claim 1, characterized in that, Power terminals (8) are provided on the ceramic copper-clad plates of each bridge arm.

5. The SiC MOSFET power module according to claim 1, characterized in that, Each bridge arm's ceramic copper-clad plate is equipped with a signal terminal (9) on one side.

6. The SiC MOSFET power module according to claim 1, characterized in that, The corresponding areas of the upper arm ceramic copper-clad plate (2) and the lower arm ceramic copper-clad plate (3) are connected by a connecting bridge (10).

7. The SiC MOSFET power module according to claim 1, characterized in that, The upper bridge arm ceramic copper-clad laminate (2) and the lower bridge arm ceramic copper-clad laminate (3) are made of AMB substrate.

8. The SiC MOSFET power module according to claim 1, characterized in that, Each bridge arm ceramic copper-clad plate is provided with a source electrode welding area (11); The source of each SiC MOSFET chip (5) is bonded to the source welding area (11) via copper wire (12).