Power supply protection circuit and electronic device

Abstract

The utility model provides a power supply protection circuit and an electronic device. The power supply protection circuit provided by the utility model comprises an input end, a grounding end, an output end and a protection unit, the protection unit comprises a first switch and a first switch control unit, the first switch control unit is connected between the input end and the grounding end, a first access end of the first switch is connected with the input end and the first switch control unit, a second access end of the first switch is connected with the output end, and the second access end of the first switch is connected with the first switch control unit. The control end of the first switch is connected with the first switch control unit and the grounding end; and when the input end and the grounding end are reversely connected with the power supply, the first switch control unit controls the control switch to be switched off. The power supply protection circuit realizes an anti-reverse function through the switch, the packaging size of a single device of the switch is small, and circuit board layout is facilitated.

Description

Technical Field

[0001] This utility model relates to the field of power supply technology, and in particular to a power protection circuit and electronic device. Background Technology

[0002] With the rapid development of domestic automobiles, there are more and more high-power electronic devices in cars, and the current is relatively large during normal operation. If the electronic devices are connected in reverse, they will be damaged. Therefore, it is necessary to set up a reverse connection protection mechanism.

[0003] One existing reverse connection protection mechanism uses a diode. Under normal operation, as can be seen from the PN junction current-voltage characteristic curve of the diode, the larger the current, the greater the voltage drop of the diode, the greater the power, and the more heat is generated. In order to meet the temperature rise requirements, the diode package is made relatively large, the PCB layout flexibility is not high, and the price is relatively high.

[0004] Another reverse connection protection mechanism is implemented using a control chip, but control chips are expensive and the control logic is complicated, making them unsuitable for low-cost applications. Utility Model Content

[0005] This utility model mainly provides a power protection circuit and electronic device. The power protection circuit realizes the reverse protection function through a switch. The individual switch components have a small package size, which facilitates circuit board layout.

[0006] To solve the above-mentioned technical problems, the first technical solution adopted by this utility model is: to provide a power protection circuit, including: an input terminal, a ground terminal, an output terminal and a protection unit; the protection unit includes a first switch and a first switch control unit, the first switch control unit is connected between the input terminal and the ground terminal, the first path terminal of the first switch is connected to the input terminal and the first switch control unit, the second path terminal of the first switch is connected to the output terminal, and the control terminal of the first switch is connected to the first switch control unit and the ground terminal;

[0007] In response to the input terminal and ground terminal being reverse-connected to the power supply, the first switch control unit controls the first switch to turn off.

[0008] In one embodiment, the first switch control unit includes: a transistor and a first diode;

[0009] The base of the transistor is connected to the ground terminal, the collector of the transistor is connected to the control terminal of the first switch, the emitter of the transistor is connected to the anode of the first diode, and the cathode of the first diode is connected to the input terminal and the first pass terminal of the first switch.

[0010] The input terminal and ground terminal are reverse-connected to the power supply, meaning the input terminal is connected to the ground terminal of the power supply, and the ground terminal is connected to the voltage input terminal of the power supply.

[0011] In one embodiment, it further includes: a driving unit, the driving unit being connected to the control terminal and the first circuit terminal of the first switch;

[0012] In response to the input terminal and ground terminal being positively connected to the power supply, the drive unit controls the first switch to be turned on and controls the opening voltage of the first switch to be close to the preset voltage, thereby adjusting the voltage drop of the first switch. The preset voltage is determined based on the input voltage received from the power supply at the input terminal.

[0013] The opening voltage of the first switch is negatively related to the voltage drop of the first switch. The input terminal and the ground terminal are positively connected to the power supply, including the input terminal being connected to the voltage input terminal of the power supply and the ground terminal being connected to the ground terminal of the power supply.

[0014] In one embodiment, the driving unit includes:

[0015] The pulse width signal output unit is connected to the input terminal and the ground terminal and is used to output the pulse width signal.

[0016] The boost unit, connected to the pulse width signal output unit, is used to boost the pulse width signal and output a boosted voltage.

[0017] The second switch control unit is connected to the control terminal and the first path terminal of the boost unit and the first switch. It is used to determine the opening voltage of the first switch based on the boost voltage so as to control the first switch to be turned on. The preset voltage is the voltage difference between the boost voltage and the input voltage.

[0018] In one embodiment, the pulse width signal output unit includes: an operational amplifier unit, a first voltage divider unit, and a delay unit;

[0019] The operational amplifier unit is connected between the input terminal and the ground terminal, and the non-inverting input terminal and the output terminal of the operational amplifier unit are connected to the first voltage divider unit, and the inverting input terminal and the output terminal of the operational amplifier unit are connected to the delay unit; the first voltage divider unit is connected to the input terminal and the ground terminal, and the delay unit is connected to the ground terminal;

[0020] In response to the input terminal and ground terminal being positively connected to the power supply, the first voltage divider unit is in the first voltage divider mode, the voltage at the non-inverting input terminal of the operational amplifier unit is greater than the voltage at the inverting input terminal, the operational amplifier unit outputs a high-level signal, and the operational amplifier unit uses the output high-level signal to charge the delay unit.

[0021] In response to the voltage at the inverting input terminal of the operational amplifier unit being greater than the voltage at the non-inverting input terminal, the first voltage divider unit is in the second voltage divider mode, and the operational amplifier unit outputs a low-level signal.

[0022] The high-level signal and low-level signal output by the operational amplifier unit constitute the pulse width signal.

[0023] In one embodiment, the first voltage divider unit includes: a first resistor, a second resistor, and a third resistor; the first end of the first resistor is connected to the input terminal, the second end of the first resistor is connected to the non-inverting input terminal of the operational amplifier unit and the first end of the second resistor, the second end of the second resistor is connected to the ground terminal, the first end of the third resistor is connected to the second end of the first resistor and the non-inverting input terminal of the operational amplifier unit, and the second end of the third resistor is connected to the output terminal of the operational amplifier unit.

[0024] The first resistor and the third resistor are connected in parallel to form a first voltage divider path with the second resistor, so that the first voltage divider unit is in the first voltage divider mode; the second resistor and the third resistor are connected in parallel to form a second voltage divider path with the first resistor, so that the first voltage divider unit is in the second voltage divider mode.

[0025] The delay unit includes a fourth resistor and a first capacitor. The first end of the fourth resistor is connected to the output terminal of the operational amplifier unit, the second end of the fourth resistor is connected to the inverting input terminal of the operational amplifier unit, the first end of the first capacitor is connected to the second end of the fourth resistor and the inverting input terminal of the operational amplifier unit, and the second end of the first capacitor is connected to the ground terminal.

[0026] In one embodiment, the boost unit includes: a second diode, a second capacitor, a third diode, and a third capacitor;

[0027] The anode of the second diode is connected to the input terminal, the first terminal of the second capacitor is connected to the cathode of the second diode, and the second terminal of the second capacitor is connected to the pulse width signal output unit; the anode of the third diode is connected to the cathode of the second diode, the first terminal of the third capacitor is connected to the cathode of the third diode and the second switch control unit, and the second terminal of the third capacitor is connected to the ground terminal.

[0028] In one embodiment, the boost unit further includes a current-limiting resistor and a filter capacitor, wherein the first end of the current-limiting resistor is connected to the input terminal, and the second end of the current-limiting resistor is connected to the anode of the second diode; the first end of the filter capacitor is connected to the second end of the current-limiting resistor, and the second end of the filter capacitor is connected to the ground terminal.

[0029] In one embodiment, the second switch control unit includes: a second voltage divider unit and a Zener diode;

[0030] The voltage dividing node of the second voltage dividing unit is connected to the control terminal of the first switch, the first terminal of the second voltage dividing unit is connected to the first circuit terminal of the first switch, and the second terminal of the second voltage dividing unit is connected to the boost unit.

[0031] The anode of the Zener diode is connected to the first path terminal of the control unit, and the cathode of the Zener diode is connected to the voltage divider node of the second voltage divider unit;

[0032] The second voltage divider unit includes a fifth resistor and a sixth resistor. The first end of the fifth resistor is connected to the boost unit, and the second end of the fifth resistor is connected to the voltage divider node. The first end of the sixth resistor is connected to the first pass terminal of the first switch, and the second end of the sixth resistor is connected to the voltage divider node.

[0033] To solve the above-mentioned technical problems, the first technical solution adopted by this utility model is to provide an electronic device including any of the above-mentioned power protection circuits.

[0034] The beneficial effects of this utility model are as follows: Unlike existing technologies, the power protection circuit provided by this utility model includes an input terminal, a ground terminal, an output terminal, and a protection unit. The protection unit includes a first switch and a first switch control unit. The first switch control unit is connected between the input terminal and the ground terminal. The first path terminal of the first switch is connected to the input terminal and the first switch control unit, the second path terminal of the first switch is connected to the output terminal, and the control terminal of the first switch is connected to the first switch control unit and the ground terminal. When the input terminal and the ground terminal are reverse-connected to the power supply, the first switch control unit controls the first switch to turn off. This power protection circuit achieves reverse polarity protection through a switch. The individual switch components have a small package size, facilitating circuit board layout. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of the first embodiment of the power protection circuit of this utility model;

[0037] Figure 2 This is a schematic diagram of the second embodiment of the power protection circuit of this utility model;

[0038] Figure 3 This is a schematic diagram of the third embodiment of the power protection circuit of this utility model;

[0039] Figure 4 This is a schematic diagram of the fourth embodiment of the power protection circuit of this utility model;

[0040] Figure 5 This is a schematic diagram of the structure of an embodiment of the electronic device of this utility model. Detailed Implementation

[0041] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0042] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0043] In this article, the term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, "more" in this article means two or more objects.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0045] Before providing a further detailed description of the embodiments of this application, the nouns and terms involved in the embodiments of this application will be explained, and the nouns and terms involved in the embodiments of this application shall be interpreted as follows.

[0046] To enable those skilled in the art to better understand the technical solution of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0047] See Figure 1 The diagram below is a structural schematic of an embodiment of the power protection circuit of this utility model. The power protection circuit includes: an input terminal V_IN, a ground terminal GND, an output terminal V_OUT, and a protection unit 11.

[0048] Protection unit 11 includes a first switch Q1 and a first switch control unit 111. The first switch Q1 is connected to the input terminal V_IN and the output terminal V_OUT. The first switch control unit 111 is connected to the first switch Q1, the input terminal V_IN and the ground terminal GND.

[0049] In one embodiment, the first switch control unit 111 is connected between the input terminal V_IN and the ground terminal GND. The first path terminal of the first switch Q1 is connected to the input terminal V_IN and the first switch control unit 111, the second path terminal of the first switch Q1 is connected to the output terminal V_OUT, and the control terminal of the first switch Q1 is connected to the first switch control unit 111 and the ground terminal GND.

[0050] It should be noted that the output terminal V_OUT is also used to connect to the next stage circuit, for transmitting the power supply voltage to the next stage circuit. Specifically, the first switch control unit 111 is used to control the on and off of the first switch Q1. In a specific embodiment, in response to the input terminal V_IN and the ground terminal GND being reverse-connected to the power supply, the first switch control unit 111 controls itself to turn off. It can be understood that the reverse connection of the input terminal V_IN and the ground terminal GND to the power supply includes the input terminal V_IN being connected to the ground terminal of the power supply, and the ground terminal GND being connected to the voltage input terminal of the power supply.

[0051] In one embodiment, combined with Figure 2 The first switch control unit 111 includes a transistor T1 and a first diode D1. The base of the transistor T1 is connected to the ground terminal GND, the collector of the transistor T1 is connected to the control terminal of the first switch Q1, the emitter of the transistor T1 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the input terminal V_IN and the first path terminal of the first switch Q1.

[0052] When the input terminal V_IN and the ground terminal GND are reverse-connected to the power supply, the input terminal V_IN is connected to the power supply's ground terminal, and the ground terminal GND is connected to the power supply's voltage input terminal. At this time, the ground terminal GND receives the power supply's input voltage VIN, the input terminal V_IN voltage is 0, the base voltage of transistor T1 is the power supply's input voltage VIN, and the emitter voltage is almost 0. Transistor T1 is in a saturated conduction state. The start-up voltage Vgs (the voltage difference between the gate and source) of the first switch Q1 is less than the threshold voltage. Experiments show that the start-up voltage Vgs is only about 0.6V. The first switch Q1 is in a cut-off state, and the body diode of the first switch Q1 performs a reverse-connection discharge function, preventing it from charging the next stage circuit through the output terminal V_OUT. It should be noted that if there is no transistor T1 and the first diode D1, and the ground terminal GND receives the input voltage VIN from the power supply, then the voltage at the control terminal of the first switch Q1 is the input voltage VIN. When the input voltage V_IN is 0, the voltage at the first path terminal (source) of the first switch Q1 is 0. At this time, the start-up voltage Vgs of the first switch Q1 is the input voltage VIN, which is greater than the threshold voltage. The first switch Q1 is in a fully saturated conduction state, and the electrolytic capacitor CP1 connected in series at the output terminal V_OUT will be reverse charged, causing device damage and failing to achieve reverse connection protection.

[0053] In one embodiment, the first switch Q1 can be, for example, an NMOS transistor. The reverse connection protection function is achieved by using transistor T1, first diode D1 and first switch Q1. The device package is small and easy to lay out on the circuit board.

[0054] Furthermore, in combination Figure 3The power protection circuit also includes a drive unit 12, which is connected to the control terminal and the first pass terminal of the first switch Q1. In response to the input terminal V_IN and the ground terminal GND being positively connected to the power supply, the drive unit 12 controls the first switch Q1 to turn on and controls the turn-on voltage of the first switch Q1 to be close to a preset voltage, thereby adjusting the voltage drop of the first switch Q1. The preset voltage is determined based on the input voltage VIN received from the power supply at the input terminal. The turn-on voltage Vgs of the first switch Q1 is negatively correlated with the voltage drop of the first switch Q1. The connection of the input terminal V_IN to the positively connected power supply includes the input terminal V_IN being connected to the voltage input terminal of the power supply, and the ground terminal GND being connected to the ground terminal of the power supply.

[0055] Specifically, the drive unit 12 includes a pulse width signal output unit 121, a boost unit 122, and a second switch control unit 123. The pulse width signal output unit 121 is connected to the input terminal V_IN and the ground terminal GND, and is used to output a pulse width signal (PWM). The boost unit 122 is connected to the pulse width signal output unit 121 and is used to boost the pulse width signal (PWM) to output a boosted voltage V_CHRG. The second switch control unit 123 is connected to the boost unit 122 and the control terminal and first path terminal of the first switch Q1, and is used to determine the turn-on voltage of the first switch Q1 based on the boosted voltage V_CHRG, thereby controlling the first switch Q1 to conduct. The preset voltage is the voltage difference between the boosted voltage V_CHRG and the input voltage VIN.

[0056] Furthermore, in combination Figure 4 The pulse width signal output unit 121 includes an operational amplifier unit U1, a first voltage divider unit 1211, and a delay unit 1212. The operational amplifier unit U1 is connected between the input terminal V_IN and the ground terminal GND, and the non-inverting input terminal + and the output terminal of the operational amplifier unit U1 are connected to the first voltage divider unit 1211, while the inverting input terminal - and the output terminal of the operational amplifier unit U1 are connected to the delay unit 1212. The first voltage divider unit 1211 is connected to the input terminal V_IN and the ground terminal GND, and the delay unit 1212 is connected to the ground terminal GND.

[0057] In one embodiment, the first voltage divider unit 1211 includes: a first resistor R1, a second resistor R2, and a third resistor R3; the first end of the first resistor R1 is connected to the input terminal V_IN, the second end of the first resistor R1 is connected to the non-inverting input terminal + of the operational amplifier unit U1 and the first end of the second resistor R2, the second end of the second resistor R2 is connected to the ground terminal GND, the first end of the third resistor R3 is connected to the second end of the first resistor R1 and the non-inverting input terminal + of the operational amplifier unit U1, and the second end of the third resistor R3 is connected to the output terminal of the operational amplifier unit U1.

[0058] The delay unit 1212 includes: a fourth resistor R4 and a first capacitor C1. The first end of the fourth resistor R4 is connected to the output terminal of the operational amplifier unit U1, the second end of the fourth resistor R4 is connected to the inverting input terminal of the operational amplifier unit U1, the first end of the first capacitor C1 is connected to the second end of the fourth resistor R4 and the inverting input terminal of the operational amplifier unit U1, and the second end of the first capacitor C1 is connected to the ground terminal.

[0059] When the input terminal V_IN and the ground terminal GND are positively connected to the power supply, that is, when the input terminal V_IN is connected to the voltage input terminal of the power supply and the ground terminal GND is connected to the ground terminal of the power supply, the input terminal V_IN receives the input voltage VIN, and the voltage of the ground terminal GND is 0. At this time, the first voltage divider unit 1211 is in the first voltage divider mode, the voltage of the non-inverting input terminal + of the operational amplifier unit U1 is greater than the voltage of the inverting input terminal -, the operational amplifier unit U1 outputs a high-level signal, and the operational amplifier unit U1 uses the output high-level signal to charge the delay unit 1212.

[0060] Specifically, when the input terminal V_IN is connected to the voltage input terminal of the power supply, and the ground terminal GND is connected to the ground terminal of the power supply, the input terminal V_IN receives the input voltage VIN, and the voltage at the ground terminal GND is 0. At this time, the first capacitor C1 is equivalent to a short circuit, and the inverting input terminal - of the operational amplifier unit U1 is equivalent to being connected to the ground terminal GND, that is, the voltage at the inverting input terminal - of the operational amplifier unit U1 is 0V; at this time, the first resistor R1 and the third resistor R3 are connected in parallel, forming a first voltage divider path with the second resistor R2 to divide the input voltage VIN, and the voltage U+ at the non-inverting input terminal + of the operational amplifier unit U1 is: " / / " indicates a parallel connection; therefore, the voltage U+ at the non-inverting input terminal of operational amplifier unit U1 is greater than 0V, meaning the voltage U+ at the non-inverting input terminal of operational amplifier unit U1 is greater than the voltage at the inverting input terminal. The output of operational amplifier unit U1 is a high-level signal (at this time, the voltage of the high-level signal is equal to the input voltage VIN). Furthermore, the voltage of the high-level signal at the output of operational amplifier unit U1 is equal to the input voltage VIN, and this input voltage VIN charges the first capacitor C1 through the fourth resistor R4.

[0061] In response to the voltage at the inverting input terminal - of the operational amplifier unit U1 being greater than the voltage at the non-inverting input terminal +, the first voltage divider unit 1211 is in the second voltage divider mode, and the operational amplifier unit U1 outputs a low-level signal.

[0062] Specifically, the high-level signal voltage at the output of operational amplifier unit U1 is equal to the input voltage VIN. This input voltage VIN charges the first capacitor C1 through the fourth resistor R4. This continues until the voltage of the first capacitor C1 (which is equal to the voltage at the inverting input terminal - of operational amplifier unit U1) is greater than the voltage U+ at the non-inverting input terminal + (i.e., ...). When the second resistor R2 and the third resistor R3 are connected in parallel, they form a second voltage divider path with the first resistor R1. At this time, the voltage U+ at the non-inverting input terminal of the operational amplifier unit U1 is: At this time, the voltage U+ at the non-inverting input terminal U1 is less than the voltage at the inverting input terminal U-. It should be noted that the voltage at the inverting input terminal U- is equal to the voltage of the first capacitor C1, and the voltage of the first capacitor C1 is greater than... At this time, the operational amplifier unit U1 outputs a low-level signal, and the voltage of the low-level signal is 0.

[0063] Furthermore, the voltage at the inverting input terminal - of operational amplifier unit U1 discharges the first capacitor C1 through the circuit composed of the fourth resistor R4 and the first capacitor C1 until the voltage at the inverting input terminal - of operational amplifier unit U1 is less than the voltage at the non-inverting input terminal + (i.e., ...). When the voltage at the non-inverting input terminal (+) of operational amplifier unit U1 is greater than the voltage at the inverting input terminal (-), operational amplifier unit U1 outputs a high-level signal. This cycle repeats, and the high-level and low-level signals output by operational amplifier unit U1 form a pulse signal (PWM). Specifically, the amplitude of the pulse signal PWM is equal to the input voltage VIN. Furthermore, the frequency of this pulse signal PWM can be adjusted by the values ​​of the delay unit 1212, i.e., the fourth resistor R4 and the first capacitor C1. For example, the fourth resistor R4 and the first capacitor C1 can change the charging and discharging speed to adjust the duration of the high-level and low-level signals, thereby adjusting the frequency of the pulse signal PWM.

[0064] Specifically, the boost unit 122 includes: a second diode D2, a second capacitor C2, a third diode D3, and a third capacitor C3. The anode of the second diode D2 is connected to the input terminal V_IN; the first terminal of the second capacitor C2 is connected to the cathode of the second diode D2; and the second terminal of the second capacitor C2 is connected to the pulse width signal output unit 121. The anode of the third diode D3 is connected to the cathode of the second diode D2; the first terminal of the third capacitor C3 is connected to the cathode of the third diode D3 and the second switch control unit 123; and the second terminal of the third capacitor C3 is connected to the ground terminal GND.

[0065] Furthermore, the boost unit 122 also includes: a current-limiting resistor R7 and a filter capacitor C4. The first end of the current-limiting resistor R7 is connected to the input terminal V_IN, and the second end of the current-limiting resistor R7 is connected to the anode of the second diode D2. The first end of the filter capacitor C4 is connected to the second end of the current-limiting resistor R7, and the second end of the filter capacitor C4 is connected to the ground terminal GND.

[0066] Furthermore, the boost unit 122 also includes a resistor R8, with the first end of the resistor R8 connected to the pulse width signal output unit 121 and the second end connected to the second end of the second capacitor C2.

[0067] Specifically, when the output of the operational amplifier unit U1 in the pulse width signal output unit 121 outputs a low-level signal, it charges the second capacitor C2, and the voltage across the second capacitor C2 can quickly reach the input voltage VIN. When the output of the operational amplifier unit U1 outputs a high-level signal, due to the characteristic that the voltage across the capacitor cannot change abruptly, the voltage across the second capacitor C2 changes from VIN to 2VIN. Since the output of the operational amplifier unit U1 is a pulse width signal (PWM), the voltage across the second capacitor C2 is also a PWM signal, and its waveform is the same as the PWM signal output by the operational amplifier unit U1, with an amplitude of VIN (VIN for low level and 2VIN for high level). After filtering by the third diode D3 and the third capacitor C3, the voltage across the third capacitor C3 becomes 2VIN, which means that the boost voltage V_CHRG output by the boost unit 122 is 2VIN.

[0068] Furthermore, the second switch control unit 123 includes a second voltage divider unit 1231 and a Zener diode D. The voltage divider node n of the second voltage divider unit 1231 is connected to the control terminal of the first switch Q1, the first terminal of the second voltage divider unit 1231 is connected to the first pass terminal of the first switch Q1, and the second terminal of the second voltage divider unit 1231 is connected to the boost unit 122. The anode of the Zener diode D is connected to the first pass terminal of the first switch Q1, and the cathode of the Zener diode D is connected to the voltage divider node n of the second voltage divider unit 1231.

[0069] The second voltage divider unit 1231 includes a fifth resistor R5 and a sixth resistor R6. The first end of the fifth resistor R5 is connected to the boost unit 122 to receive the boost voltage V_CHRG. The second end of the fifth resistor R5 is connected to the voltage divider node n. The first end of the sixth resistor R6 is connected to the first pass terminal of the first switch Q1. The second end of the sixth resistor R6 is connected to the voltage divider node n.

[0070] Specifically, since the boost voltage V_CHRG is 2VIN and the input voltage is VIN, the voltage difference between the output and input terminals V_IN of the boost unit 122 is VIN. This voltage difference VIN is the preset voltage. This voltage difference VIN is then divided by the fifth resistor R5 and the sixth resistor R6. The voltage across the sixth resistor R6 is the turn-on voltage Vgs of the first switch, ensuring that the first switch Q1 is in a fully saturated conducting state. During normal operation with a large current, the Vds voltage of the first switch Q1 (i.e., the voltage drop of the first switch Q1) is very small, which can improve the power supply efficiency. It should be noted that the closer the turn-on voltage Vgs of the first switch Q1 is to the preset voltage, the smaller the voltage drop of the first switch Q1. In one specific embodiment, VIN is 12V, the turn-on voltage Vgs of the first switch is 10V, and the turn-on voltage Vgs of the first switch can be determined by the fifth resistor R5 and the sixth resistor R6. After the fifth resistor R5 and the sixth resistor R6 divide the voltage, the gate voltage is output from the voltage divider node n, so that the turn-on voltage Vgs of the first switch Q1 meets the expectation.

[0071] It should be noted that when the power supply is reversed, at the instant of power-on, since the voltage across the third capacitor C3 cannot change abruptly, the third capacitor C3 is equivalent to a short circuit, and the boost voltage V_CHRG is VIN. If there is no transistor T1 and the first diode D1, the ground terminal GND receives the input voltage VIN from the power supply. Then the voltage at the control terminal of the first switch Q1 is the input voltage VIN. The input terminal V_IN voltage is 0, so the voltage at the first path terminal (source) of the first switch Q1 is 0. At this time, the start-up voltage Vgs of the first switch Q1 is the input voltage VIN, which is greater than the threshold voltage. The first switch Q1 is in a fully saturated conduction state, and the electrolytic capacitor CP1 connected in series at the output terminal V_OUT will be reverse charged, causing device damage and failing to achieve reverse connection protection.

[0072] The power protection circuit provided by this utility model can not only realize the reverse power supply function, but also have a very small voltage drop when the power supply is running at high current during normal operation, thus improving the power supply efficiency. Moreover, the individual component package is also small, which facilitates the layout of the PCB board.

[0073] See Figure 5 This utility model also provides an electronic device 50, which includes the power protection circuit 51 of any of the above embodiments. The electronic device 50 can be, for example, a high-power electronic device. For example, it could be an electronic device including a vehicle audio power amplifier, or a high-power product such as a vehicle refrigerator; the specific application is not limited.

[0074] The above are merely embodiments of this utility model and do not limit the scope of patent protection of this utility model. Any equivalent structural or procedural transformations made based on the description and drawings of this utility model, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this utility model.

Claims

1. A power supply protection circuit, characterized in that, include: The system includes an input terminal, a ground terminal, an output terminal, and a protection unit. The protection unit includes a first switch and a first switch control unit. The first switch control unit is connected between the input terminal and the ground terminal. A first path terminal of the first switch is connected to the input terminal and the first switch control unit. A second path terminal of the first switch is connected to the output terminal. The control terminal of the first switch is connected to the first switch control unit and the ground terminal. In response to the input terminal and the ground terminal being reverse-connected to the power supply, the first switch control unit controls the first switch to turn off; The first switch control unit includes: a transistor and a first diode; The base of the transistor is connected to the ground terminal, the collector of the transistor is connected to the control terminal of the first switch, the emitter of the transistor is connected to the anode of the first diode, and the cathode of the first diode is connected to the input terminal and the first pass terminal of the first switch. The reverse connection of the input terminal and the ground terminal to the power supply includes the input terminal being connected to the ground terminal of the power supply, and the ground terminal being connected to the voltage input terminal of the power supply.

2. The power protection circuit according to claim 1, characterized in that, Also includes: A drive unit is connected to the control terminal and the first path terminal of the first switch; In response to the input terminal and the ground terminal being positively connected to the power supply, the driving unit controls the first switch to be turned on and controls the opening voltage of the first switch to be close to a preset voltage, thereby adjusting the voltage drop of the first switch. The preset voltage is determined based on the input voltage received from the power supply at the input terminal. Wherein, the opening voltage of the first switch is negatively related to the voltage drop of the first switch, and the input terminal and the ground terminal are positively connected to the power supply, including the input terminal being connected to the voltage input terminal of the power supply, and the ground terminal being connected to the ground terminal of the power supply.

3. The power protection circuit according to claim 2, characterized in that, The driving unit includes: A pulse width signal output unit, connected to the input terminal and the ground terminal, is used to output a pulse width signal; A boost unit, connected to the pulse width signal output unit, is used to boost the pulse width signal and output a boosted voltage; The second switch control unit is connected to the control terminal and the first path terminal of the boost unit and the first switch. It is used to determine the opening voltage of the first switch based on the boost voltage so as to control the first switch to be turned on. The preset voltage is the voltage difference between the boost voltage and the input voltage.

4. The power protection circuit according to claim 3, characterized in that, The pulse width signal output unit includes: an operational amplifier unit, a first voltage divider unit, and a delay unit; The operational amplifier unit is connected between the input terminal and the ground terminal, and the non-inverting input terminal and the output terminal of the operational amplifier unit are connected to the first voltage divider unit, and the inverting input terminal and the output terminal of the operational amplifier unit are connected to the delay unit; the first voltage divider unit is connected to the input terminal and the ground terminal, and the delay unit is connected to the ground terminal; In response to the input terminal and the ground terminal being positively connected to the power supply, the first voltage divider unit is in the first voltage divider mode, the voltage at the non-inverting input terminal of the operational amplifier unit is greater than the voltage at the inverting input terminal, the operational amplifier unit outputs a high-level signal, and the operational amplifier unit uses the output high-level signal to charge the delay unit; In response to the voltage at the inverting input terminal of the operational amplifier unit being greater than the voltage at the non-inverting input terminal, the first voltage divider unit is in the second voltage divider mode, and the operational amplifier unit outputs a low-level signal; The pulse width signal is composed of the high-level signal and the low-level signal output by the operational amplifier unit.

5. The power protection circuit according to claim 4, characterized in that, The first voltage divider unit includes: a first resistor, a second resistor, and a third resistor; the first end of the first resistor is connected to the input terminal, the second end of the first resistor is connected to the non-inverting input terminal of the operational amplifier unit and the first end of the second resistor, the second end of the second resistor is connected to the ground terminal, the first end of the third resistor is connected to the second end of the first resistor and the non-inverting input terminal of the operational amplifier unit, and the second end of the third resistor is connected to the output terminal of the operational amplifier unit. Wherein, the first resistor and the third resistor are connected in parallel to form a first voltage divider path with the second resistor, so that the first voltage divider unit is in a first voltage divider mode; the second resistor and the third resistor are connected in parallel to form a second voltage divider path with the first resistor, so that the first voltage divider unit is in a second voltage divider mode. The delay unit includes a fourth resistor and a first capacitor. The first end of the fourth resistor is connected to the output terminal of the operational amplifier unit, the second end of the fourth resistor is connected to the inverting input terminal of the operational amplifier unit, the first end of the first capacitor is connected to the second end of the fourth resistor and the inverting input terminal of the operational amplifier unit, and the second end of the first capacitor is connected to the ground terminal.

6. The power protection circuit according to claim 3, characterized in that, The boost unit includes: a second diode, a second capacitor, a third diode, and a third capacitor; The anode of the second diode is connected to the input terminal, the first terminal of the second capacitor is connected to the cathode of the second diode, and the second terminal of the second capacitor is connected to the pulse width signal output unit; the anode of the third diode is connected to the cathode of the second diode, the first terminal of the third capacitor is connected to the cathode of the third diode and the second switch control unit, and the second terminal of the third capacitor is connected to the ground terminal.

7. The power protection circuit according to claim 6, characterized in that, The boost unit further includes a current-limiting resistor and a filter capacitor. The first end of the current-limiting resistor is connected to the input terminal, and the second end of the current-limiting resistor is connected to the anode of the second diode. The first end of the filter capacitor is connected to the second end of the current-limiting resistor, and the second end of the filter capacitor is connected to the ground terminal.

8. The power protection circuit according to claim 3, characterized in that, The second switch control unit includes: a second voltage divider unit and a Zener diode; The voltage dividing node of the second voltage dividing unit is connected to the control terminal of the first switch, the first end of the second voltage dividing unit is connected to the first pass terminal of the first switch, and the second end of the second voltage dividing unit is connected to the boost unit. The anode of the Zener diode is connected to the first path terminal of the control unit, and the cathode of the Zener diode is connected to the voltage dividing node of the second voltage dividing unit; The second voltage divider unit includes a fifth resistor and a sixth resistor. The first end of the fifth resistor is connected to the boost unit, and the second end of the fifth resistor is connected to the voltage divider node. The first end of the sixth resistor is connected to the first pass terminal of the first switch, and the second end of the sixth resistor is connected to the voltage divider node.

9. An electronic device, characterized in that, Includes the power protection circuit described in any one of claims 1 to 8.

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