Load control panel for multi-sensor high-speed image acquisition and transmission
By integrating FPGA and SoC processor into the payload control board, the problems of scattered control units and data transmission bottlenecks in multi-sensor imaging systems are solved, realizing unified control and collaborative operation of multiple sensors, and achieving efficient real-time transmission of image data, which is suitable for fields such as aerial photography and reconnaissance and surveillance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BEIJING YIGONG LICHUANG TECH CO LTD
- Filing Date
- 2025-05-16
- Publication Date
- 2026-04-28
AI Technical Summary
Existing multi-sensor imaging systems suffer from problems such as dispersed control units, insufficient data transmission bandwidth, trigger delays, and long continuous shooting intervals, making it difficult to achieve unified control and collaborative operation of multiple sensors. In particular, in aerial photography and reconnaissance and surveillance, the real-time transmission of high-resolution images is difficult to meet the requirements.
Design a load control board for high-speed image acquisition and transmission from multiple sensors. By integrating a high-performance FPGA chip and a multi-core SoC processor, it achieves synchronous acquisition and unified control of signals from multiple sensors. It adopts a high-speed data channel and optimized control method, combined with a 10 Gigabit fiber optic interface to realize real-time transmission of large-capacity image data.
It simplifies the system structure, improves data processing efficiency and response speed, realizes unified access of multiple source sensors and real-time high-speed transmission of high-resolution images, and meets the high-speed and large-volume data processing needs of complex optoelectronic systems.
Smart Images
Figure CN224178247U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of photoelectric sensor data acquisition and processing technology, and more specifically, to a load control board for high-speed image acquisition and transmission using multiple sensors. Background Technology
[0002] In applications such as aerial photography, reconnaissance and surveillance, it is often necessary to use multiple visual sensors, such as high-resolution digital cameras, CCD video cameras, and infrared thermal imagers, as well as attitude sensors such as gyroscopes, to obtain comprehensive information.
[0003] However, these sensors generate massive amounts of data of diverse types, requiring unified control and high-speed transmission. If multiple distributed control units manage different sensors separately, the system architecture will be extremely complex, and synchronization and coordination between these control units will be quite difficult.
[0004] Furthermore, current multi-sensor data processing still faces challenges such as bandwidth bottlenecks and latency. For example, in traditional solutions, images captured by high-resolution digital cameras are often transmitted to the processing unit via a low-speed serial interface, resulting in long transmission times after each shot. When continuous shooting is required, the delay in trigger commands and the camera's burst shooting interval make it difficult to meet high real-time requirements. Moreover, infrared video streams and visible light video streams are typically transmitted and processed through separate channels, increasing system latency and the difficulty of synchronizing different data sources. Utility Model Content
[0005] Therefore, the purpose of this utility model is to develop a highly integrated load control device, design a load control board for high-speed image acquisition and transmission from multiple sensors, integrate multiple functional modules on a single board, and enable access to multiple types of sensor signals to achieve synchronous data acquisition; and adopt a high-speed data channel and optimized control method to manage multiple sensors simultaneously, realize unified control and collaborative work of multi-source sensors, and ensure real-time high-speed transmission of large-capacity image data, so as to solve the problems of scattered control units, insufficient data transmission bandwidth, trigger delay and long continuous shooting interval in existing multi-sensor imaging systems.
[0006] This utility model provides a load control board for high-speed image acquisition and transmission using multiple sensors, including: a communication unit and a camera measurement and control unit. The communication unit and the camera measurement and control unit are integrated on the same board. The communication unit is signal-connected to the camera measurement and control unit, and the communication unit is signal-connected to external sensors and a main control device.
[0007] Preferably, the communication unit uses a high-performance FPGA chip (such as Xilinx XC7K325T) to achieve interface communication with various external sensors and upper-level systems (main control devices), as well as data aggregation and output. The camera measurement and control unit uses a multi-core SoC processor (such as Rockchip RK3588) to achieve control and image processing of the high-resolution digital camera.
[0008] Preferably, the communication unit and the camera measurement and control unit are interconnected via a high-speed backplane bus.
[0009] Furthermore, the communication unit has a built-in FPGA chip and is equipped with an external interface for connecting external sensors and the main control device. The external interface is connected to the FPGA chip. The external interface includes: a differential SPI interface, an RS-422 serial interface, and a Camera Link digital video interface.
[0010] Specifically, the differential SPI interface is used for high-speed command communication with the main control board; the RS-422 serial interface (up to 12 channels) is used to connect sensors such as gyroscopes, angle sensors, CCD cameras, and infrared thermal imagers to receive measurement data or status information from these sensors; and the Camera Link digital video interface is used to receive video signals or video data.
[0011] Furthermore, the Camera Link digital video interface includes three channels: one is a Medium mode interface for receiving video signals from a visible light television camera; one is a Base mode interface for receiving video data from an infrared thermal imager; and one is an SDI video interface for receiving other high-speed digital video signals (preferably supporting up to 1080p@60fps).
[0012] Preferably, the three-channel interface mode of the Camera Link digital video interface can be configured as needed, selecting any one or a combination of multiple channels.
[0013] The FPGA chip performs real-time acquisition and preliminary processing of video streams and data streams from various sensors, such as the visible light television camera and the infrared thermal imager.
[0014] Furthermore, the communication unit is integrated with a 10 Gigabit fiber optic transceiver module for external data output, and the 10 Gigabit fiber optic transceiver module includes a fiber optic interface.
[0015] The 10 Gigabit fiber optic transceiver module serves as the main channel for the payload control board to output data. Multi-source data, aggregated and packaged by the FPGA chip, is transmitted at high speed to an external image processing board or host computer through the fiber optic interface, achieving real-time data transmission with a large bandwidth. The fiber optic link rate can support up to approximately 10 Gbps (configurable according to the needs of the peer).
[0016] Preferably, in order to distinguish and transmit different types of data in a compatible manner, the FPGA chip adds different frame header identifiers to video streams and still image data, and can encapsulate and transmit them according to a predetermined protocol.
[0017] Furthermore, the communication unit is embedded with a MicroBlaze soft-core processor for executing protocol stack and instruction parsing tasks.
[0018] The MicroBlaze soft-core processor enables the board to quickly parse instructions from the main control board and data communication protocols from various sensors, improving the efficiency and reliability of multi-interface collaborative work.
[0019] For example, when the main control board sends control commands through the SPI interface, the soft core in the FPGA can parse the commands and trigger corresponding operations in real time.
[0020] Furthermore, the camera measurement and control unit includes an embedded high-performance processor; the camera measurement and control unit is signal-connected to a high-resolution digital camera.
[0021] Specifically, the camera control unit employs an embedded high-performance processor (such as the RK3588) and its core board, running a standard operating system (such as Ubuntu 20). The camera control unit connects to a high-resolution digital camera (such as the Phase One aerial camera) via a high-speed interface and professional protocols, enabling camera control and image data acquisition.
[0022] On one hand, the camera control unit receives raw image data (such as raw image files in IIQ format) captured by the high-resolution digital camera; on the other hand, the camera control unit sends control commands to the high-resolution digital camera to perform operations such as triggering photo capture and setting parameters.
[0023] Furthermore, the camera measurement and control unit includes a SoC module, which is equipped with a USB 3.0 interface and a serial communication interface, which are respectively connected to the high-resolution digital camera signal.
[0024] Specifically, the SoC module connects to the high-resolution digital camera via a USB 3.0 interface to receive raw image data (such as raw image files in IIQ format) captured by the high-resolution digital camera; the SoC module sends control commands to the camera via a serial communication interface to perform operations such as triggering photo capture and setting parameters.
[0025] Furthermore, the load control board is also provided with a power control and monitoring signal circuit, which is electrically connected to the external sensor and the main control device.
[0026] Specifically, the power control and monitoring signal circuit may include several paths.
[0027] For example, the load control board provides ±5V and +12V DC power outputs to external sensors and is equipped with corresponding TTL level control signals to start and stop the power output of these external sensors (high level enables output, low level disables output); at the same time, it monitors whether the power supply is working properly through digital signals, ensuring the safe and controllable power supply of the load control board.
[0028] Preferably, in terms of main power input, the load control board uses DC28V power supply, and the power management circuit on the board converts the required multi-channel regulated voltage for each unit to meet the power requirements of the FPGA chip, SoC module and peripheral interface.
[0029] Preferably, to minimize camera trigger delay and shorten the time interval for continuous shooting, in one embodiment of this invention, a dedicated camera control instruction set interface (e.g., iXlink protocol) is used in the camera control unit, and control signals are exchanged with the communication unit via a high-speed bus. When the main control board needs to trigger the camera to shoot, the instruction can be sent to the FPGA chip via the differential SPI interface, and then directly mapped to the storage space of the camera control unit SoC module via the PCIe bus, driving the camera control unit SoC module to quickly send a trigger command to the camera. This link design avoids the delay caused by traditional multi-level instruction transmission.
[0030] After acquiring image data from the camera, the camera control unit performs local processing on the raw images, including format conversion (decoding the camera's proprietary IIQ raw image) and JPEG image compression. The processed raw image or compressed JPEG image is then transmitted to the communication unit via a high-speed interconnect channel on the load control board. The communication unit and camera control unit are connected via a PCI Express (PCIe 2.0 x4) bus, achieving a data transfer bandwidth of approximately 800 MB / s. The SoC module efficiently transmits the processed image data to the communication unit FPGA via the DMA channel of the PCIe interface. The communication unit FPGA then packages the image data and outputs it through a fiber optic interface, thus enabling real-time output of large-volume images.
[0031] This invention integrates the FPGA communication unit and the SoC camera measurement and control unit onto a single board, enabling unified management of multiple different types of sensors, reducing the number of system modules, simplifying the system architecture, and improving reliability.
[0032] Employing a PCIe bus and a 10 Gigabit fiber optic interface, high-speed transmission of data from various sensors is achieved. In particular, images from high-resolution cameras can be compressed on this board and transmitted directly via fiber optic in real time, avoiding the bottleneck of insufficient bandwidth in traditional buses and realizing high-speed data transmission.
[0033] Through the co-design of FPGA and SoC and a dedicated camera control protocol, low-latency trigger control of professional digital cameras is achieved, which greatly shortens the shooting command transmission path, significantly reduces trigger delay and continuous shooting interval, and meets the requirements of high-speed continuous shooting.
[0034] The load control board provides more than ten universal serial interfaces (RS-422, etc.) and high-speed video interfaces (Camera Link, SDI, etc.) onboard, which can connect to various types of sensor signals to achieve synchronous data acquisition. It has strong adaptability and also provides analog input and output interfaces to expand the types of sensor signals and meet multi-interface compatibility.
[0035] In addition to data acquisition, the load control board can also supply power to external sensors and control the power switch status of external sensors, realizing centralized management and protection of sensors, and improving safety and ease of maintenance.
[0036] Compared with the prior art, the beneficial effects of this utility model are:
[0037] This invention provides a simple and reasonable payload control board architecture for high-speed multi-sensor image acquisition and transmission, with strong overall integration. It integrates a high-performance FPGA communication unit and a SoC camera measurement and control unit into one unit. By integrating multiple functional modules onto a single board, it can access multiple types of sensor signals and achieve synchronous data acquisition. Employing a high-speed data channel and optimized control methods, it can simultaneously manage multiple sensors, achieving unified control and collaborative operation of multi-source sensors. This effectively solves the problems of scattered control units, insufficient data transmission bandwidth, trigger delay, and long continuous shooting intervals in existing multi-sensor imaging systems. It achieves unified access to multiple source sensors and real-time processing and transmission of high-resolution image data, ensuring real-time high-speed transmission of large-capacity image data and meeting the needs of complex optoelectronic systems for high-speed, large-volume data processing. It can effectively improve the data processing efficiency and response speed of multi-sensor optoelectronic systems and has broad application prospects in aerial surveying, target monitoring, and other fields. Attached Figure Description
[0038] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of the invention.
[0039] In the attached diagram:
[0040] Figure 1 This is a schematic diagram showing the relationship between the load control board and the external device interface in a multi-sensor high-speed image acquisition and transmission system according to an embodiment of this utility model.
[0041] Figure 2 This is a system block diagram and functional structure diagram of the load control board for multi-sensor high-speed image acquisition and transmission according to an embodiment of the present invention. Detailed Implementation
[0042] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.
[0043] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The singular forms “a,” “the,” and “the” as used in this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.
[0044] It should be understood that although the terms first, second, and third may be used in this disclosure to describe various information, such information should not be limited to these terms. These terms are used only to distinguish information of the same type from one another. For example, without departing from the scope of this disclosure, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."
[0045] Example
[0046] This utility model provides a load control board for high-speed image acquisition and transmission using multiple sensors, including a communication unit and a camera measurement and control unit. The communication unit and camera measurement and control unit are integrated on the same board, with signal connections between them. The communication unit also connects to external sensors and the main control device. The communication unit uses a high-performance FPGA chip (Xilinx XC7K325T) to achieve interface communication with various external sensors and the host system (main control device), as well as data aggregation and output. The camera measurement and control unit uses a multi-core SoC processor (Rockchip RK3588) to control and process images from a high-resolution digital camera. The communication unit and camera measurement and control unit are interconnected via a high-speed backplane bus.
[0047] The communication unit has a built-in FPGA chip and is equipped with external interfaces for connecting external sensors and the main control device (such as...). Figure 1As shown, the external interface connects to the FPGA chip; the FPGA chip performs real-time acquisition and preliminary processing of video and data streams from various sensors. The external interfaces include: a differential SPI interface, an RS-422 serial interface, and a CameraLink digital video interface. The differential SPI interface is used for high-speed command communication with the main control board; the RS-422 serial interface (12 channels in this embodiment) is used to connect to gyroscopes, angle sensors, CCD cameras, and infrared thermal imagers to receive measurement data or status information from these sensors; the CameraLink digital video interface is used to receive video signals or video data. The CameraLink digital video interface includes three channels: one Medium mode interface for receiving video signals from visible light television cameras; one Base mode interface for receiving video data from infrared thermal imagers; and one SDI video interface for receiving other high-speed digital video signals (supporting up to 1080p@60fps). The communication unit integrates a 10 Gigabit fiber optic transceiver module for external data output, which includes a fiber optic interface. The 10 Gigabit fiber optic transceiver module serves as the primary data output channel for the payload control board. Multi-source data, aggregated and encapsulated by the FPGA chip, is transmitted at high speed to an external image processing board or host computer via the fiber optic interface, achieving real-time data transmission with a high bandwidth. The fiber optic link rate can support up to approximately 10 Gbps. To differentiate and ensure compatible transmission of different data types, the FPGA chip adds different frame header identifiers to video streams and still image data, and can encapsulate and transmit them according to a predetermined protocol. The communication unit embeds a MicroBlaze soft-core processor for executing protocol stack and instruction parsing tasks. The MicroBlaze soft-core processor enables the board to quickly parse instructions from the main control board and data communication protocols from various sensors, improving the efficiency and reliability of multi-interface collaborative operation. When the main control board sends control commands via the SPI interface, the soft core within the FPGA can instantly parse the commands and trigger corresponding operations.
[0048] The camera control unit includes an embedded high-performance processor; the camera control unit is signal-connected to a high-resolution digital camera. The camera control unit uses an embedded high-performance processor (RK3588) and its core board, running a standard operating system (Ubuntu 20); the camera control unit connects to the high-resolution digital camera (PhaseOne aerial camera) via a high-speed interface and professional protocols. This enables camera control and image data acquisition. On one hand, the camera control unit receives raw image data (IIQ format raw image files) captured by the high-resolution digital camera; on the other hand, the camera control unit sends control commands to the high-resolution digital camera to perform operations such as triggering image capture and setting parameters. The camera control unit includes a SoC module, which is equipped with a USB 3.0 interface and a serial communication interface, both of which are signal-connected to the high-resolution digital camera. The SoC module connects to the high-resolution digital camera via the USB 3.0 interface and receives raw image data (IIQ format raw image files) captured by the high-resolution digital camera; the SoC module sends control commands to the camera via the serial communication interface to perform operations such as triggering image capture and setting parameters.
[0049] The load control board also includes several power control and monitoring signal circuits, which are electrically connected to external sensors and the main control device. In this embodiment, the load control board provides ±5V and +12V DC power outputs to the external sensors and is equipped with corresponding TTL level control signals to enable and disable the power output of these external sensors (high level enables output, low level disables output). Simultaneously, digital signals are used to monitor the power supply operation, ensuring the safe and controllable power supply of the load control board. The load control board uses a DC28V main power supply, which is converted by the onboard power management circuit to provide multiple regulated voltages required by the communication unit and camera measurement and control unit, meeting the power requirements of the FPGA chip, SoC module, and peripheral interfaces.
[0050] In this embodiment, the load control board integrates the communication unit FPGA and the camera measurement and control unit SoC on a single circuit board. The SoC module processor is connected to the motherboard in the form of a modular core board, while the FPGA chip and the 10 Gigabit fiber optic transceiver module are directly soldered onto the motherboard.
[0051] The load control board provides multiple external connection interfaces:
[0052] 1. Connect to the main control device via the first multi-pin connector (21-pin aviation plug) to introduce main power (28V DC power supply) and high-speed differential SPI communication with the main control board, etc.
[0053] 2. It can be connected to various sensors inside the optoelectronic platform through the second multi-pin connector (74-pin socket), such as gyroscope, angle sensor, camera power board, etc. The second multi-pin connector distributes RS-422 interface signals, analog input / output (AD / DA), general GPIO signals and low voltage power output, etc.
[0054] 3. The board also features standard interfaces such as an RJ45 Gigabit Ethernet port and a USB 3.0 interface (e.g., Figure 2 (as shown), to facilitate system debugging and functional expansion.
[0055] The technical solution of this utility model has been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the protection scope of this utility model is obviously not limited to these specific embodiments. Without departing from the principle of this utility model, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the protection scope of this utility model.
[0056] The above description is merely a preferred embodiment of this utility model and is not intended to limit the scope of this utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, substitutions, or improvements made within the spirit and principles of this utility model should be included within the protection scope of this utility model.
Claims
1. A load control board for high-speed image acquisition and transmission using multiple sensors, characterized in that, include: The communication unit and the camera measurement and control unit are integrated on the same board. The communication unit is signal-connected to the camera measurement and control unit, and the communication unit is signal-connected to external sensors and the main control device.
2. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 1, characterized in that, The communication unit has a built-in FPGA chip and is equipped with external interfaces for connecting external sensors and the main control device. The external interfaces are connected to the FPGA chip. The external interfaces include: a differential SPI interface, an RS-422 serial interface, and a Camera Link digital video interface.
3. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 2, characterized in that, The Camera Link digital video interface includes three channels: one Medium mode interface for receiving video signals from visible light television cameras; one Base mode interface for receiving video data from infrared thermal imagers; and one SDI video interface for receiving other high-speed digital video signals.
4. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 2, characterized in that, The communication unit is equipped with a 10 Gigabit fiber optic transceiver module for external data output, and the 10 Gigabit fiber optic transceiver module includes a fiber optic interface.
5. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 2, characterized in that, The communication unit is embedded with a MicroBlaze soft-core processor for executing protocol stack and instruction parsing tasks.
6. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 1, characterized in that, The camera measurement and control unit includes an embedded high-performance processor; the camera measurement and control unit is signal-connected to a high-resolution digital camera.
7. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 6, wherein the camera measurement and control unit comprises: The SoC module is equipped with a USB 3.0 interface and a serial communication interface, which are respectively connected to the signals of the high-resolution digital camera.
8. The load control board for multi-sensor high-speed image acquisition and transmission according to claim 1, characterized in that, The load control board is also equipped with a power control and monitoring signal circuit, which is electrically connected to the external sensor and the main control device.