Printed circuit board, communication device and vehicle

Abstract

The utility model discloses a printed circuit board, a communication device and a vehicle. The printed circuit board comprises a dielectric related interface, an electrostatic impedor, a common-mode resistor, an alternating-current coupling capacitor, a common-mode filter and a control chip, and a differential signal line is connected to the control chip through the electrostatic impedor, the common-mode resistor, the alternating-current coupling capacitor and the common-mode filter in sequence; wherein the differential signal lines are arranged based on a cross-layer reference mode; wiring of the positive signal line and the negative signal line of the differential signal line, pin bonding pads on wiring paths and via holes in the wiring paths are all symmetrically arranged, and the positive signal line and the negative signal line are matched in equal length. Through the symmetrical arrangement and equal-length matching of the differential signal lines and the use of the electrostatic impedor, the common-mode resistor, the alternating-current coupling capacitor, the common-mode filter and other elements, noise and interference are effectively suppressed, and the integrity of signals is improved. The cross-layer reference and the reasonable wiring strategy help to reduce electromagnetic radiation and sensitivity, and improve the electromagnetic compatibility of the printed circuit board.

Description

Printed circuit boards, communication devices and vehicles Technical Field

[0001] This application relates to the field of data communication technology, specifically to a printed circuit board, a communication device, and a vehicle. Background Technology

[0002] With the continuous advancement of automotive technology, the number of electronic devices inside vehicles has increased significantly, encompassing multiple areas such as entertainment systems, autonomous driving systems, body control systems, and vehicle networking systems. These systems require frequent data exchange, placing higher demands on communication speeds. However, traditional communication methods are insufficient to meet the current demands for high-speed, high-capacity data transmission between various automotive systems, becoming a technological bottleneck restricting the development of intelligent and connected vehicles. To address this issue, automotive Ethernet technology has emerged, possessing high-speed, high-capacity data transmission capabilities, making it an ideal choice for communication between various automotive systems. Currently, automotive Ethernet technology has developed multiple standards, including 10Base-T1, 100Base-T1, and 1000Base-T1, each suitable for application scenarios with different communication rates and data volumes. However, existing technologies still have some significant drawbacks. For example, in complex electromagnetic environments, the anti-interference capability of Ethernet modules needs improvement, and signal transmission stability is easily affected, potentially leading to data transmission errors or loss. How to further explore and leverage the functions of Ethernet modules to meet the ever-increasing communication needs within vehicles remains a direction that requires in-depth exploration and research. Summary of the Invention

[0003] In view of the above-mentioned shortcomings of the prior art, the purpose of this application is to provide a printed circuit board, a communication device, and a vehicle.

[0004] To achieve the above objectives, the first aspect of this application provides a printed circuit board, including: a dielectric-related interface, an electrostatic impedance device, a common-mode resistor, an AC coupling capacitor, a common-mode filter, and a control chip;

[0005] The medium-related interface is connected to the control chip via differential signal lines, passing through an electrostatic impedance device, a common-mode resistor, an AC coupling capacitor, and a common-mode filter in sequence.

[0006] The differential signal lines are set up based on cross-layer references;

[0007] The positive and negative signal lines of the differential signal lines are symmetrically arranged, as are the pin pads and vias on the trace paths, and the positive and negative signal lines are of equal length.

[0008] In this embodiment of the application, the printed circuit board is a stacked structure constructed from multiple signal layers, multiple ground plane layers and multiple power layers, wherein the top and bottom layers of the stacked structure are signal layers;

[0009] Electrostatic impedance devices, common-mode resistors, AC coupling capacitors, common-mode filters, and dielectric-related interfaces are all installed on the top layer;

[0010] A predetermined number of layers are hollowed out on one side of the electrostatic impedance device, common-mode resistor, AC coupling capacitor, and common-mode filter facing the bottom layer, so that the ground plane layer is located below the electrostatic impedance device, common-mode resistor, AC coupling capacitor, and common-mode filter.

[0011] In this embodiment of the application, the printed circuit board further includes:

[0012] A reserved capacitor is installed on the top layer, positioned between the common-mode filter and the control chip.

[0013] In this embodiment, the media-related interface includes multiple interfaces, and the pads of the media-related interfaces corresponding to the same signal are spaced at a preset distance.

[0014] In this embodiment, the pads of the medium-related interfaces corresponding to high-speed signals are spaced at a preset distance from adjacent pads on the routing path of the differential signal lines.

[0015] In the embodiments of this application, the line width, line spacing, reference plane, and distance between the differential signal line and the copper foil of the reference plane are set based on the 100Mbps automotive Ethernet specification.

[0016] In this embodiment, a through-hole is provided in the blank area within the preset range of the differential signal line routing path, running from the top layer to the bottom layer.

[0017] In this embodiment, the differential signal line is an arc-shaped trace.

[0018] A second aspect of this application provides a communication device, comprising:

[0019] Printed circuit board as described in the above embodiments.

[0020] A third aspect of this application provides a vehicle, comprising:

[0021] The communication device as described in the above embodiments.

[0022] The printed circuit board (PCB) of the above solution includes: a dielectric-related interface, an electrostatic impedance rectifier (ESR), a common-mode resistor, an AC coupling capacitor, a common-mode filter, and a control chip. Differential signal lines are connected to the control chip sequentially through the ESR, common-mode resistor, AC coupling capacitor, and common-mode filter. The differential signal lines are arranged using a cross-layer reference method. The traces, pin pads, and vias of the positive and negative differential signal lines are symmetrically arranged, and the positive and negative signal lines are of equal length. Through the symmetrical arrangement and equal-length matching of the differential signal lines, and the use of components such as ESR, common-mode resistors, AC coupling capacitors, and common-mode filters, noise and interference are effectively suppressed, and signal integrity is improved. Cross-layer reference and a reasonable routing strategy help reduce electromagnetic radiation and sensitivity, improving the PCB's electromagnetic compatibility (EMC).

[0023] Other features and advantages of the embodiments of this application will be described in detail in the following detailed description section. Attached Figure Description

[0024] The accompanying drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the following detailed description to explain the embodiments of this application, but do not constitute a limitation on the embodiments of this application. In the drawings:

[0025] Figure 1 schematically illustrates a structural diagram of a printed circuit board according to an embodiment of this application;

[0026] Figure 2 schematically illustrates an application of a printed circuit board structure according to an embodiment of this application;

[0027] Figure 3 schematically illustrates a media-related interface arrangement according to an embodiment of this application;

[0028] Figure 4 schematically illustrates an application diagram of pad edge cutout according to an embodiment of this application.

[0029] Explanation of reference numerals in the attached figures

[0030] 10. Printed circuit board; 100. Media-related interface; 200. Electrostatic impedance device; 300. Common mode resistor; 400. AC coupling capacitor; 500. Common mode filter; 600. Control chip; 700. Reserved capacitor. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for illustration and explanation of the embodiments of this application and are not intended to limit the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0032] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0033] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0034] Figure 1 schematically illustrates a structural diagram of a printed circuit board according to an embodiment of this application. As shown in Figure 1, this embodiment of the application provides a printed circuit board 10, including: a dielectric-related interface 100, an electrostatic impedance 200, a common-mode resistor 300, an AC coupling capacitor 400, a common-mode filter 500, and a control chip 600;

[0035] The medium-related interface 100 is connected to the control chip 600 via differential signal lines through an electrostatic impedance 200, a common-mode resistor 300, an AC coupling capacitor 400, and a common-mode filter 500.

[0036] The differential signal lines are set up based on cross-layer references;

[0037] The positive and negative signal lines of the differential signal lines are symmetrically arranged, as are the pin pads and vias on the trace paths, and the positive and negative signal lines are of equal length.

[0038] It should be noted that this embodiment provides a printed circuit board 10 (PCB). The PCB 10 design includes several key components and specific wiring strategies aimed at optimizing signal transmission and electromagnetic compatibility (EMC). Specifically, the PCB 10 includes a control chip 600, an electrostatic discharge resistor 200, a common-mode resistor 300, an AC coupling capacitor 400, a common-mode filter 500 (CMC Choke), and a media-dependent interface 100 (MDI). The control chip 600, as the core processing unit of the printed circuit board, is responsible for receiving and processing signals from the differential signal lines; the common-mode resistor 300 is used to suppress common-mode interference and improve signal purity; the AC coupling capacitor 400 is used to isolate DC bias, allowing AC signals to pass through while blocking DC current; the common-mode filter 500 further filters out common-mode noise to ensure signal integrity; the media-dependent interface 100 is connected to the control chip 600 through the differential signal lines to realize communication with external devices.

[0039] It should be noted that the media-related interface 100 may include interfaces for signals such as ETH (Ethernet), I / O (Input / Output), GND (Ground signal), POWER (Power signal), and A2B (Automotive Audio Bus). ETH is a widely used Local Area Network (LAN) technology used to connect devices such as computers, servers, and routers to achieve high-speed data transmission. Ethernet interfaces support various speeds, such as 10Mbps, 100Mbps, 1Gbps, and 10Gbps, suitable for different network requirements. In the automotive field, Ethernet technology is used in in-vehicle networks, such as 10Base-T1, 100Base-T1, and 1000Base-T1, supporting high-speed data transmission and multimedia applications. The I / O interface is the channel for computers or electronic devices to exchange information with the outside world, responsible for receiving input signals and sending output signals. I / O interfaces can be used to connect various sensors and actuators, such as temperature sensors, pressure sensors, fuel injectors, and ignition coils. The GND interface is the grounding signal interface, used to connect a part of a circuit or device to the earth or a reference potential. The grounding signal provides a stable reference potential for the circuit, ensuring its normal operation. Simultaneously, grounding also serves to shield against electromagnetic interference and protect personal safety. The GND interface can be used to connect to a vehicle's grounding system, ensuring the stability and safety of the electrical system. The POWER interface is the power signal interface, used to provide power to the circuit or device. The A2B bus supports the transmission of multi-channel audio signals, featuring low latency, high bandwidth, and low power consumption. It can achieve digital processing of audio signals, improving the performance and sound quality of the audio system. The A2B bus can be applied to in-vehicle audio systems, voice recognition systems, active noise cancellation systems, etc. It is understood that in the printed circuit board of this embodiment, the ETH signal interface is always present; the number of other signal interfaces can be increased or decreased depending on the actual application requirements.

[0040] It's important to note that understanding the return path is a crucial concept in PCB design for all high-speed signals. A ground (GND) plane loop forms the foundation of good PCB design, as a lack of a ground loop often leads to a range of problems. Specifically, without a robust, low-inductance ground plane, issues such as EMI (Electromagnetic Interference), noise, and crosstalk can arise, potentially causing functional bit errors. The return current of a high-speed signal always chooses the path closest to the signal trace, rather than the path with the lowest inductance between the source and destination. For example, with microstrip transmission lines, in the absence of a coplanar GND polygon nearby, the nearest return path is a reference plane located directly below or above the signal path, and this path extends along the entire length of the signal path. Similarly, the return path for stripline transmission lines lies directly above and below the entire trace length. Therefore, a complete reference ground plane is essential for implementing microstrip or stripline interconnects from one package to another. Poorly designed ground planes can lead to EMI (Electronic Interference) in current loops, and any unwanted emissions from these loops can transmit crosstalk to other signals, potentially causing non-compliance with FCC (Federal Communications Commission) requirements or even functional failures. To more effectively ensure the continuity of impedance for the media-related interface 100 traces, this embodiment employs a cross-layer reference routing method. Assuming the trace is located on the top layer, the copper foil of the second layer is simultaneously cut out to reference the copper foil of the third layer. This not only widens the trace width but also ensures a complete ground plane reference, thereby optimizing signal transmission performance.

[0041] It is important to note that the layout of vias and pin pads along the routing paths of differential signal lines is crucial for trace symmetry. Any asymmetrical traces can lead to additional common-mode noise and affect the EMI performance of the entire system. In this embodiment, the traces at the positive and negative ends of the differential signal, i.e., the positive and negative signal lines, should be kept as parallel as possible and at the same distance. The length, width, curvature, and other parameters of the traces should be as similar as possible to ensure the synchronization and stability of signal transmission. The pin pads of the positive and negative signal lines should be consistent in size, shape, and position. If the positive and negative signal lines need to pass through different layers of the circuit board, the vias they use should also be symmetrical, with the same position, size, and number, to ensure that the signal remains synchronized and stable when crossing different layers. Symmetrical design helps reduce common-mode noise caused by asymmetry in traces, pin pads, and vias. Common-mode noise is one of the main sources of interference in differential signal transmission, and its generation can be effectively suppressed through symmetrical design. Symmetrical design also helps improve the electromagnetic compatibility of circuit boards. By reducing the emission and reception of electromagnetic interference, it can improve the stability of the circuit board in complex electromagnetic environments. Symmetrical design also helps ensure that the positive and negative signal lines of differential signal lines remain synchronized and stable during transmission. This is especially important for the transmission of high-speed, high-frequency signals such as ETH, as it can avoid signal distortion and timing issues.

[0042] It is important to note that length matching between the positive and negative signal lines is also crucial. In one embodiment, the length matching is controlled to within 1 mil. Precise length matching ensures that the differential signals have the same transmission delay during transmission, thereby avoiding signal distortion caused by phase differences.

[0043] The printed circuit board 10 in this embodiment includes a control chip 600, an electrostatic impedance 200, a common-mode resistor 300, an AC coupling capacitor 400, a common-mode filter 500, and a dielectric-related interface 100. Differential signal lines are connected to the control chip 600 sequentially through the electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400, and common-mode filter 500. The differential signal lines are arranged based on a cross-layer reference. The positive and negative signal lines, their pin pads, and vias are symmetrically arranged, and the positive and negative signal lines are of equal length. Through the symmetrical arrangement and equal-length matching of the differential signal lines, and the use of components such as the electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400, and common-mode filter 500, noise and interference are effectively suppressed, improving signal integrity. Cross-layer reference and a reasonable routing strategy help reduce electromagnetic radiation and sensitivity, improving the electromagnetic compatibility of the PCB.

[0044] In one embodiment, the linewidth, line spacing, reference plane, and distance between the differential signal lines and the copper foil of the reference plane are set based on the 100Mbps automotive Ethernet specification.

[0045] It should be noted that this embodiment is based on the 100Mbps automotive Ethernet standard (100Base-T1) for PCB design. 100BASE-T1 is a differential pair, which should be routed as a 100-ohm differential impedance. After determining the PCB stack-up structure based on actual application requirements, the line width, line spacing, reference layer, and distance from the differential signal line to the reference layer copper foil corresponding to the 100-ohm differential impedance can be calculated based on the dielectric constant and dielectric loss values ​​in the stack-up information. Specifically, the line width and line spacing of the differential signal line should be strictly determined according to the stack-up calculation to ensure that the required characteristic impedance is achieved; in this embodiment, it is 100 ohms. The differential signal line should be routed as close as possible to a continuous ground plane to provide a good reference path and reduce interference. In the case of cross-layer reference, if the trace is on the top layer, the copper foil of the second layer can be cut out to reference the copper foil of the third layer. This can both widen the trace width and ensure a complete reference ground plane. The distance between the differential signal line and the copper foil of the reference plane should be as small as possible to reduce the signal loop area, thereby reducing electromagnetic radiation and sensitivity.

[0046] In one embodiment, the printed circuit board 10 is a stacked structure constructed from multiple signal layers, multiple ground plane layers and multiple power layers, wherein the top and bottom layers of the stacked structure are signal layers.

[0047] The electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400, common-mode filter 500, and dielectric-related interface 100 are all installed on the top layer;

[0048] The electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400 and common-mode filter 500 have a predetermined number of hollowed-out layers on the side facing the bottom layer, so that the ground plane layer is below the electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400 and common-mode filter 500.

[0049] In this embodiment, it should be noted that the printed circuit board adopts a multi-layer stacked structure, constructed from multiple signal layers, multiple ground plane layers, and multiple power layers. It is understood that the specific number of layers in actual applications can be set based on actual application requirements. Taking a 12-layer circuit board design as an example, layers 1 and 12 can be used for critical signal routing, carrying high-speed or sensitive signals, and must be adjacent to the reference plane to control impedance and reduce interference. Layers 2, 4, 6, 7, 9, and 11 are set as solid ground planes, providing stable reference potentials and shielding for signals, and providing low-impedance return paths for signals, reducing current loop area. Layers 3 and 10 are partially used as power planes, with the remaining areas available for routing. Layers 5 and 8 are set as split power planes to provide different power rails, reducing mutual interference by dividing them to power different areas.

[0050] In this embodiment, the electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400, common-mode filter 500, and dielectric-related interface 100 are all mounted on the top layer for easy signal connection and routing. A predetermined number of layers are hollowed out on the side of the electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400, and common-mode filter 500 facing the bottom layer, creating a ground plane layer beneath these components. This hollowed-out design improves the EMC performance of the circuit board and allows the common-mode inductor to provide good isolation while ensuring signal integrity. It should be noted that the predetermined number of hollowed-out layers for the electrostatic impedance 200, common-mode resistor 300, AC coupling capacitor 400, and common-mode filter 500 may not be the same; the number of hollowed-out layers can vary depending on the component. The number of hollowed-out layers is determined based on factors such as the PCB's layer stack-up structure and signal integrity requirements.

[0051] In this embodiment, the reasonable layout of key components facilitates signal connection and wiring, improves production efficiency, and enhances signal integrity, EMC performance and heat dissipation performance through the hollow design.

[0052] Referring to FIG2, in one embodiment, the printed circuit board 10 further includes:

[0053] A reserved capacitor 700 is installed on the top layer, positioned between the common-mode filter 500 and the control chip 600.

[0054] In this embodiment, it should be noted that a reserved capacitor 700 is set at the top layer, located between the common-mode filter 500 and the control chip 600. The reserved capacitor 700 can be used to filter out high-frequency noise, provide local power supply decoupling, and ensure the stable operation of the control chip 600; by filtering out power supply noise, signal jitter and bit error rate are reduced, and signal transmission quality is improved. The reserved capacitor 700 helps stabilize the power supply voltage and prevent voltage fluctuations from damaging the control chip 600. It can be understood that, as shown in Figure 2, the PCB may include the routing design of multiple electrostatic impedance devices 200, common-mode resistors 300, AC coupling capacitors 400, common-mode filters 500, and media-related interfaces 100. For each media-related interface 100, the corresponding differential signal lines are sequentially connected to the control chip 600 through the corresponding electrostatic impedance device 200, common-mode resistor 300, AC coupling capacitor 400, and common-mode filter 500.

[0055] In this embodiment, a reserved capacitor 700 is provided to provide filtering and decoupling functions, thereby improving signal quality and system stability.

[0056] In one embodiment, the media-related interfaces include multiple media-related interfaces 100 corresponding to the same signal, and the pad spacing is set by a preset distance.

[0057] It should be noted that as the signal rate increases, electromagnetic interference between signal lines also increases. Therefore, for high-speed signals such as ETH, the pad spacing should be set relatively large to reduce the coupling effect between signal lines. In this embodiment, to reduce mutual interference between signals, when there are multiple media-related interfaces, the pad spacing of the media-related interfaces 100 corresponding to the same signal is set by a preset distance. Referring to Figure 3, the media-related interfaces 100 include interfaces for ETH, I / O, GND, POWER, and A2B signals. In the arrangement of the media-related interfaces 100 for the ETH signal on the printed circuit board, the ETH signal interfaces are staggered and not arranged adjacently to reduce interference between ETH signals.

[0058] In one embodiment, on the routing path of the differential signal line, the pads of the medium-related interface 100 corresponding to the high-speed signal are spaced at a preset distance from adjacent pads.

[0059] It should be noted that on the routing path of differential signal lines, the pads of the medium-related interface 100 corresponding to high-speed signals typically have reduced impedance, such as ETH signals. In this embodiment, to reduce parasitic capacitance and appropriately increase impedance, the edges of the pads are cut outwards. The preset distance setting can be set based on actual needs, for example, 20 mil. In one embodiment, cutting outwards from the edges of the pads can also be as shown in Figure 4. Specifically, referring to Figure 4, taking pads 3 and 4 of the medium-related interface 100 corresponding to high-speed signals as an example, pads 3 and 4 are circular. The edges are cut outwards from the center of pads 3 and 4 until they are tangent to the adjacent pads. Connecting the two circles at the cut-out positions ultimately forms an elliptical cut-out area.

[0060] In one embodiment, a via is provided in the blank area within a preset range of the differential signal line routing path, extending from the top layer to the bottom layer.

[0061] In this embodiment, it should be noted that by setting vias from the top to the bottom in the blank areas within the preset range of the differential signal line routing path, different layers of the PCB can be connected to achieve vertical transmission of electrical signals. Setting vias in the differential signal line routing path ensures smooth signal transmission between different layers. Furthermore, vias facilitate heat conduction from the top to the bottom of the PCB, improving heat dissipation efficiency. For high-speed differential signal lines, good heat dissipation helps maintain signal stability. According to PCB design rules, differential signal lines need to be connected vias when changing layers. The via settings should meet the requirements of the design rules regarding hole diameter, hole spacing, etc. In this embodiment, by reasonably arranging the pad positions to leave more blank areas, and considering the robustness of the plane, more vias are added to reduce EMI.

[0062] In one embodiment, the differential signal lines are curved traces.

[0063] In this embodiment, it should be noted that differential signal lines are used to transmit differential signals, offering advantages such as strong anti-interference capability and good signal integrity. In this embodiment, the PCB uses curved traces. Curved traces smooth the signal path, reducing signal reflection and crosstalk. Especially when high-speed electrons pass through, curved traces can better prevent electron emission and avoid electromagnetic radiation. It also helps improve the PCB's wiring density and aesthetics.

[0064] This application also provides a communication device, including:

[0065] Printed circuit board 10 as described in the above embodiments.

[0066] This application also provides a vehicle, including:

[0067] The communication device as described in the above embodiments.

[0068] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between components; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0069] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0070] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A printed circuit board, characterized in that, The system includes a dielectric-related interface, an electrostatic impedance device (ESD), a common-mode resistor, an AC coupling capacitor, a common-mode filter, and a control chip. The ESD interface is connected to the control chip via differential signal lines, which are sequentially connected through the ESD, the common-mode resistor, the AC coupling capacitor, and the common-mode filter. The differential signal lines are configured based on a cross-layer reference. The positive and negative signal lines, their traces, pin pads, and vias are symmetrically arranged, and the positive and negative signal lines are of equal length.

2. The printed circuit board according to claim 1, characterized in that, The printed circuit board is a stacked structure composed of multiple signal layers, multiple ground plane layers, and multiple power layers, wherein the top and bottom layers of the stacked structure are signal layers; the electrostatic impedance, the common-mode resistor, the AC coupling capacitor, the common-mode filter, and multiple dielectric-related interfaces are all mounted on the top layer; a predetermined number of layers are cut out on the side of the electrostatic impedance, the common-mode resistor, the AC coupling capacitor, and the common-mode filter facing the bottom layer so that the area below the electrostatic impedance, the common-mode resistor, the AC coupling capacitor, and the common-mode filter is a ground plane layer.

3. The printed circuit board according to claim 2, characterized in that, Also includes: A reserved capacitor is installed on the top layer and positioned between the common-mode filter and the control chip.

4. The printed circuit board according to claim 1, characterized in that, The media-related interfaces include multiple interfaces, and the pads of the media-related interfaces corresponding to the same signal are spaced at a preset distance.

5. The printed circuit board according to claim 1, characterized in that, On the routing path of the differential signal line, the pads of the medium-related interface corresponding to the high-speed signal are spaced at a preset distance from adjacent pads.

6. The printed circuit board according to claim 1, characterized in that, The line width, line spacing, reference plane, and distance between the differential signal lines and the copper foil of the reference plane are set based on the 100Mbps automotive Ethernet specification.

7. The printed circuit board according to claim 1, characterized in that, The blank areas within the preset range of the differential signal line routing path are provided with through holes from the top layer to the bottom layer.

8. The printed circuit board according to claim 1, characterized in that, The differential signal lines are curved.

9. A communication device, characterized in that, include: The printed circuit board according to any one of claims 1 to 8.

10. A vehicle, characterized in that, include: The communication device according to claim 9.

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