Display panel and display device

Abstract

The utility model provides a display panel and a display device, relates to the technical field of display, and can realize the narrow frame design of the display panel. The display panel comprises a display area and a peripheral area surrounding the display area. The display panel comprises a substrate, a blocking dam, a first metal layer, a first electrode layer and a packaging structure, the blocking dam is arranged on the substrate, and the blocking dam is located in the peripheral area and surrounds the display area; the first metal layer is arranged on the substrate, and the first metal layer comprises a first power supply signal line located in the peripheral area; the first electrode layer is arranged on the side, away from the substrate, of the first metal layer and extends to the peripheral area to be electrically connected with the first power signal line, and the boundary of the first electrode layer is located on the side, close to the display area, of the blocking dam. The packaging structure is arranged on the side, away from the substrate, of the first electrode layer and comprises a first inorganic layer, a first organic layer and a second inorganic layer which are stacked in the direction away from the substrate, and the boundary of the first inorganic layer is flush with or roughly flush with the boundary of the first electrode layer.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] With the continuous development of the display industry, users have increasingly higher demands for narrow bezel designs in display products. Therefore, achieving narrow bezel designs in display products has become a key development focus. Utility Model Content

[0003] The technical problem addressed by the embodiments of this disclosure is how to achieve a narrow or ultra-narrow bezel design for a display panel.

[0004] On one hand, a display panel is provided. The display panel includes a display area and a peripheral area surrounding the display area; the display panel includes a substrate, a barrier dam, a first metal layer, a first electrode layer, and an encapsulation structure, wherein the barrier dam is disposed on the substrate, the barrier dam is located in the peripheral area and surrounds the display area; the first metal layer is disposed on the substrate, the first metal layer includes a first power signal line located in the peripheral area; the first electrode layer is disposed on the side of the first metal layer away from the substrate, the first electrode layer extends to the peripheral area and is electrically connected to the first power signal line, and the boundary of the first electrode layer is located on the side of the barrier dam closer to the display area; the encapsulation structure is disposed on the side of the first electrode layer away from the substrate, the encapsulation structure includes a first inorganic layer, a first organic layer and a second inorganic layer stacked in a direction away from the substrate, the boundary of the first inorganic layer is flush with or substantially flush with the boundary of the first electrode layer.

[0005] In the aforementioned display panel, by utilizing a first inorganic thin film as a temporary encapsulation structure for the first electrode thin film, contact between the first electrode thin film and the developing solution used to develop the photoresist can be avoided during the fabrication process. Simultaneously, by using the portion of the first inorganic layer etched away from the barrier dam and the portion of the barrier dam away from the display area as a mask, the use of developing solution during the formation of the first electrode layer can be avoided. This prevents the developing solution from diffusing towards the display area AA of the display panel along the boundary of the formed first electrode layer, thus avoiding interference with the bonding of the first power signal line between the first electrode layer and the first metal layer; or affecting the bonding of the transition pattern between the first electrode layer and the second electrode layer, thereby affecting the bonding of the first electrode layer and the first metal layer. The first power signal line of the metal layer is connected; and the first electrode film can be set in a whole layer by vapor deposition process, and then the part of the first electrode film located on the barrier dam and the part located on the side of the barrier dam away from the display area are etched away, so that the first electrode layer is located on the side of the barrier dam closer to the display area. In this process, the range of etching the first electrode film can be precisely controlled, that is, the part of the first electrode film located on the barrier dam and the part located on the side of the barrier dam away from the display area can be etched away as needed, without having to consider the redundant distance caused by the manufacturing tolerance of the vapor deposition process. The redundant distance between the boundary of the first electrode layer and the barrier dam can be eliminated, and the design of narrow bezel or ultra-narrow bezel can be realized.

[0006] In some embodiments, the second inorganic layer contacts the upper surface of the barrier dam, and the boundary of the second inorganic layer is located on the side of the barrier dam away from the display area.

[0007] In some embodiments, the boundary of the first organic layer is flush with or substantially flush with the boundary of the first electrode layer.

[0008] In some embodiments, the display panel further includes a third inorganic layer disposed between the first inorganic layer and the first organic layer, the third inorganic layer being in contact with the upper surface of the barrier dam, and the boundary of the third inorganic layer being located on the side of the barrier dam away from the display area.

[0009] In some embodiments, the display panel further includes a second organic layer disposed between the first inorganic layer and the third inorganic layer, wherein the boundary of the second organic layer is flush with or substantially flush with the boundary of the first electrode layer.

[0010] In some embodiments, the display panel further includes a partition structure disposed on the side of the barrier dam near the display area, and the first electrode layer is disconnected at the partition structure.

[0011] In some embodiments, the first power signal line includes a first portion located on the side of the barrier closer to the display area; the first portion includes a first side surface away from the display area, the first side surface being provided with a first groove, the first groove forming a partition structure.

[0012] In some embodiments, the first power signal line further includes a second portion located on the side of the barrier dam near the substrate; the second portion includes a second side surface near the display area, the second side surface being located on the side of the barrier dam near the display area; the second side surface is provided with a second groove, the second groove forming a partition structure.

[0013] In some embodiments, the first power signal line further includes at least one third portion located between the first portion and the second portion; the third portion includes two third side surfaces disposed opposite to each other in the extension direction perpendicular to the first power signal line, and at least one third side surface is provided with a third groove, the third groove forming a partition structure.

[0014] In some embodiments, the display panel further includes a second electrode layer and a partition post; the second electrode layer is disposed between the first metal layer and the first electrode layer, the second electrode layer includes a transition pattern located in the peripheral region, and the first electrode layer is electrically connected to a first power signal line through the transition pattern; the partition post is disposed on the side of the second electrode layer away from the substrate and located in the peripheral region; the partition post forms a partition structure.

[0015] In some embodiments, the partition post includes two fourth side surfaces disposed opposite each other in an extension direction perpendicular to the first power signal line, and at least one fourth side surface is provided with a fourth groove for discontinuing the first electrode layer at the fourth groove.

[0016] On the other hand, a display panel is provided. The display panel includes a display area and a peripheral area surrounding the display area; the display panel includes a substrate, a barrier dam, a first metal layer, a first electrode layer, and a partition structure; the barrier dam is disposed on the substrate, located in the peripheral area, and surrounding the display area; the first metal layer is disposed on the substrate, and the first metal layer includes a first power signal line located in the peripheral area; the first electrode layer is disposed on the side of the first metal layer away from the substrate, and the first electrode layer extends into the peripheral area and is electrically connected to the first power signal line; the partition structure is disposed on the side of the barrier dam close to the display area, and the first electrode layer is disconnected at the partition structure.

[0017] In some embodiments, the first power signal line includes a first portion located on the side of the barrier closer to the display area; the first portion includes a first side surface away from the display area, the first side surface being provided with a first groove, the first groove forming a partition structure.

[0018] In some embodiments, the first power signal line further includes a second portion located on the side of the barrier dam near the substrate; the second portion includes a second side surface near the display area, the second side surface being located on the side of the barrier dam near the display area; the second side surface is provided with a second groove, the second groove forming a partition structure.

[0019] In some embodiments, the first power signal line further includes at least one third portion located between the first portion and the second portion; the third portion includes two third side surfaces disposed opposite to each other in the extension direction perpendicular to the first power signal line, and at least one third side surface is provided with a third groove, the third groove forming a partition structure.

[0020] In some embodiments, the display panel further includes a second electrode layer and a partition post. The second electrode layer is disposed between the first metal layer and the first electrode layer, and the second electrode layer includes a transition pattern located in the peripheral region. The first electrode layer is electrically connected to a first power signal line through the transition pattern. The partition post is disposed on the side of the second electrode layer away from the substrate and located in the peripheral region. The partition post forms a partition structure.

[0021] In some embodiments, a portion of the first electrode layer is located on the side of the barrier dam away from the substrate.

[0022] In another aspect, a display device is provided, which includes a display panel as described in some of the embodiments above and a driver chip connected to the display panel. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0024] Figure 1 This is a plan view of a display device according to some embodiments;

[0025] Figure 2 This is a plan view of a display panel according to some embodiments;

[0026] Figure 3 for Figure 2 A cross-sectional view along section line BB;

[0027] Figure 4 for Figure 2 A cross-sectional view along section line AA;

[0028] Figure 5 for Figure 2 Another cross-sectional view along section line AA;

[0029] Figure 6 for Figure 2 Another cross-sectional view along section line AA;

[0030] Figure 7 for Figure 2 Another cross-sectional view along section line AA;

[0031] Figure 8 for Figure 2 Another cross-sectional view along section line AA;

[0032] Figure 9 for Figure 2 Another cross-sectional view along section line AA;

[0033] Figure 10 for Figure 2 Another cross-sectional view along section line AA;

[0034] Figure 11 for Figure 2 Another cross-sectional view along section line AA;

[0035] Figure 12 for Figure 2 Another cross-sectional view along section line AA;

[0036] Figure 13 for Figure 2 Another cross-sectional view along section line AA;

[0037] Figure 14 for Figure 2 Another cross-sectional view along section line AA;

[0038] Figure 15 for Figure 2 Another cross-sectional view along section line AA;

[0039] Figure 16 for Figure 2 Another cross-sectional view along section line AA;

[0040] Figure 17 for Figure 2 Another cross-sectional view along section line AA;

[0041] Figure 18 for Figure 2 Another cross-sectional view along section line AA. Detailed Implementation

[0042] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0043] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0044] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0045] In describing some embodiments, the term "connection" and its derivative expressions may be used. For example, the term "connection" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0046] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable deviation range, which is determined by those skilled in the art taking into account the measurement under discussion and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable deviation range for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable deviation range for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable deviation range for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0047] It should be understood that when a layer or element is referred to as being on another layer or substrate, it may mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate. Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views as idealized exemplary drawings. In the drawings, the thickness of the layers and the area of ​​the regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Therefore, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing. For example, an etched area shown as rectangular would typically have a curved feature. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0048] like Figure 1 As shown, the display device 1000 may include, for example, a display panel 100 and a driver chip 200 connected to the display panel 100.

[0049] For example, the display device 1000 can be any device that displays either moving (e.g., video) or stationary (e.g., still image), and whether it is text or image. The display device 1000 includes, but is not limited to, televisions, mobile phones, wearable devices, personal digital assistants (PDAs), augmented reality (AR) devices, virtual reality (VR) devices, handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, camcorders, game consoles, clocks, calculators, television monitors, flat panel displays, computer monitors, in-vehicle displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.

[0050] For example, such as Figure 1 As shown, the display device 1000 includes a display panel 100 and a driver chip 200 (Integrated Circuit, IC); the display panel 100 is coupled to the driver chip 200, which is configured to provide electrical signals to the display panel 100, such as control signals.

[0051] For example, the driver chip 200 can be a central processing unit, a digital signal processor, a microcontroller, a programmable logic controller, etc. For instance, the driver chip 200 may also include a memory, a power supply module, etc., and implement power supply and signal input / output functions through separately provided wires, signal lines, etc. For instance, the driver chip 200 may also include hardware circuitry and computer-executable code. The hardware circuitry may include conventional very-large-scale integrated circuits (VLSI) or gate arrays, as well as existing semiconductors or other discrete components such as logic chips and transistors; the hardware circuitry may also include field-programmable gate arrays, programmable array logic, programmable logic devices, etc.

[0052] For example, display panel 100, such as OLED (Organic Light-Emitting Diode) display panel or QLED (Quantum Dot Light Emitting Diodes) display panel, has been increasingly widely used in various display products such as mobile phones, tablets, computers, and televisions due to its self-emissive characteristics.

[0053] like Figure 2 As shown, the display panel 100 includes a display area AA and a peripheral area BB surrounding the display area AA. The display area AA is provided with a plurality of sub-pixels P, which are arranged in an array, for example. The sub-pixels P are the smallest unit for displaying images on the display panel 100. Each sub-pixel P can display a single color, such as red (R), green (G), or blue (B). Each sub-pixel P includes a connected light-emitting device E and a pixel driving circuit D that drives the light-emitting device E to emit light. The pixel driving circuit D drives the light-emitting device E to emit light, thereby enabling the display area AA to display an image.

[0054] The peripheral area BB is equipped with GOA (Gate on Array) circuitry and signal lines. The GOA circuitry and signal lines are connected to the pixel driving circuit D of the display area AA. The GOA circuitry and signal lines provide signals to the pixel driving circuit D, ensuring the normal display of the display area AA. For example... Figure 2 As shown, the signal line of the peripheral area BB may include a first power signal line 1, which can be used to transmit power signals, such as VSS signals.

[0055] In the display panel 100, moisture and oxygen in the air can easily penetrate into the display area AA along the outer edge of the display panel 100, corroding the film layers in the display area AA and affecting the display of the display panel 100. Furthermore, during the fabrication of some film layers (e.g., organic encapsulation layers) of the display panel 100, the material of these film layers can easily overflow to the outside of the display panel 100 (the organic material of the organic encapsulation layer is fluid and easily overflows), affecting the encapsulation effect and performance of the display panel 100. Therefore, as... Figure 2 As shown, a barrier dam 100-1 can be set in the surrounding area BB. For example, two barrier dams 100-1 can be set. Each barrier dam 100-1 can be set around the display area AA. The barrier dam 100-1 can be used to prevent some film layers (such as organic encapsulation layers) of the display panel 100 from overflowing to the outside of the display panel 100. It can also lengthen the intrusion path of water and oxygen in the air and prevent water and oxygen in the air from penetrating into the display area AA.

[0056] like Figure 3 , Figure 4 As shown, and refer to Figure 2 ,in, Figure 3 for Figure 2 Cross-sectional view along section line BB. Figure 4 for Figure 2 A cross-sectional view along section line AA. The display panel 100 may include multiple metal layers and insulating layers between adjacent metal layers. The multiple metal layers are used to form sub-pixels P of the display area AA and GOA circuits and signal lines of the peripheral area BB. For example, the display panel 100 may include, from bottom to top, a substrate 101, an active layer 102, a first insulating layer 103, a gate metal layer 104, a second insulating layer 105, a second metal layer 106, a first planarization layer 107, a first metal layer 108, a second planarization layer 109, a second electrode layer 110, a pixel defining layer 111, a light-emitting layer 112, a light-emitting functional layer 113, a first electrode layer 114, and a packaging structure 115.

[0057] like Figure 3 , Figure 4 As shown, and refer to Figure 2The substrate 101 can be used to support other film layers of the display panel 100; the active layer 102, the gate metal layer 104, and the second metal layer 106 can be used to form the transistors of the pixel driving circuit D of the display area AA; the second metal layer 106 and the first metal layer 108 can be used to form the GOA circuit and signal lines of the peripheral area BB; the second electrode layer 110 can be, for example, an anode layer, which can be used to form the anode of the light-emitting device E of the display area AA, and can also be used to form the transition pattern 3 of the peripheral area BB to realize the transition of the signal lines; the pixel defining layer 111 can include multiple openings, one opening exposing the anode of one light-emitting device E; the light-emitting layer 112 is formed in the opening of the pixel defining layer 111 and is in contact with the anode exposed by the opening. The light-emitting functional layer 113 is disposed in the entire display area AA and is in contact with the light-emitting layer 112 to realize the light emission of the light-emitting layer 112; the first electrode layer 114 can be, for example, a cathode layer, which can be used to form the cathode of the light-emitting device E. The material of the first electrode layer 114 can be, for example, a magnesium-silver alloy, etc. The first electrode layer 114 can be disposed in the entire layer; the encapsulation structure 115 can include a first inorganic layer 115-1, a first organic layer 115-2 and a second inorganic layer 115-3, which can be used to encapsulate the display panel 100 to prevent the light-emitting device E of the display panel 100 from being exposed to the air, so that the water and oxygen in the air can corrode and damage the light-emitting device E. The encapsulation structure 115 must completely cover the first electrode layer 114.

[0058] like Figure 3 , Figure 4 As shown, the first insulating layer 103, the second insulating layer 105, the first planarization layer 107, and the second planarization layer 109 are used to isolate adjacent metal layers to prevent short circuits; one or more insulating layers can be used to form a barrier dam 100-1, for example, the first planarization layer 107, and / or the second planarization layer 109 and / or the pixel defining layer 111 can be used to form the barrier dam 100-1.

[0059] like Figure 3 , Figure 4 As shown, and refer to Figure 2Since the pixel driving circuit D and the light-emitting device E are disposed in the display area AA of the display panel 100, the film layers forming the pixel driving circuit D and the light-emitting device E, such as the active layer 102, the first insulating layer 103, the gate metal layer 104, the second insulating layer 105, the light-emitting layer 112, and the light-emitting functional layer 113, can be located only in the display area AA. The substrate 101, the second metal layer 106, the first planarization layer 107, the first metal layer 108, the second planarization layer 109, the second electrode layer 110, the pixel defining layer 111, the first electrode layer 114, and the encapsulation structure 115 can be located in the display area AA and the peripheral area BB; in the peripheral area BB, the area indicated by arrow M is used to set the GOA circuit and signal lines, and the GOA circuit and signal lines can be formed by the patterns of the second metal layer 106 and the first metal layer 108.

[0060] The barrier dam 100-1 is formed before the first electrode layer 114 (cathode layer), so a portion of the first electrode layer 114, which is formed as a whole, will cover the barrier dam 100-1. Since the barrier dam 100-1 has a certain height, the first electrode layer 114 will span a greater height at the location of the barrier dam 100-1 so that the first electrode layer 114 covers the barrier dam 100-1.

[0061] Because the barrier dam 100-1 is narrow, the contact area between the first electrode layer 114 and the barrier dam 100-1 is small. Furthermore, the portion of the first electrode layer 114 on the barrier dam 100-1 spans a considerable height, making it prone to delamination between the first electrode layer 114 and the barrier dam 100-1. Additionally, the boundary of the first electrode layer 114 is close to the outer edge of the display panel 100. After delamination occurs between the first electrode layer 114 and the barrier dam 100-1, the cracks in this delamination can easily extend to the outer edge of the display panel 100, exposing it. Water and oxygen in the air can then penetrate into the display panel 100 through the outer edge and intrude into the display area AA through the first electrode layer 114, leading to encapsulation failure and damage to the display panel 100. Therefore, in order to avoid delamination between the portion of the first electrode layer 114 on the barrier dam 100-1 and the barrier dam 100-1, the boundary of the first electrode layer 114 can be set on the side of the barrier dam 100-1 closer to the display area AA, that is, the first electrode layer 114 is not set above the barrier dam 100-1 and on the side of the barrier dam 100-1 away from the display area AA.

[0062] When preparing the first electrode layer 114, a photomask with the first electrode pattern needs to be placed above the prepared film layer, and the first electrode layer 114 is prepared by processes such as vapor deposition. At this time, the first electrode pattern on the photomask needs to correspond to the side of the barrier dam 100-1 in the display panel 100 that is close to the display area AA, so that the boundary of the prepared first electrode layer 114 is located on the side of the barrier dam 100-1 that is close to the display area AA. However, during the preparation of the first electrode layer 114 by processes such as vapor deposition, there will be preparation tolerances. The vapor-deposited first electrode layer 114 may shift to the left, right, up, or down, causing the boundary of the prepared first electrode layer 114 to be located above the barrier dam 100-1. Therefore, it is necessary to ensure that there is a certain distance between the boundary of the first electrode pattern on the photomask and the barrier dam 100-1, leaving room for the offset caused by preparation tolerances, so as to ensure that the boundary of the prepared first electrode layer 114 is located on the side of the barrier dam 100-1 that is close to the display area AA.

[0063] In this case, such as Figure 4 As shown, there is a certain redundant distance X between the boundary of the first electrode layer 114 and the barrier dam 100-1. This redundant distance X can be, for example, 100μm to 150μm. With the development of display technology, full-screen or narrow-bezel display products, with their larger screen-to-body ratios, have gradually become the development trend of display products. The size of the peripheral area BB of the display panel 100 in these display products is limited, and the width of the peripheral area BB needs to be small. Therefore, the redundant distance X between the boundary of the first electrode layer 114 and the barrier dam 100-1 restricts the design of narrow or ultra-narrow bezels.

[0064] In some embodiments, such as Figure 5 , Figure 6 , Figure 7As shown, a display panel 100 is provided. The display panel 100 includes a display area AA and a peripheral area BB surrounding the display area AA; the display panel 100 includes a substrate 101, a barrier dam 100-1, a first metal layer 108, a first electrode layer 114, and an encapsulation structure 115. The barrier dam 100-1 is disposed on the substrate 101, and the barrier dam 100-1 is located in the peripheral area BB and surrounds the display area AA; the first metal layer 108 is disposed on the substrate 101, and the first metal layer 108 includes a first power signal line 1 located in the peripheral area BB; the first electrode layer 114 is disposed on the first metal layer 108 away from the substrate. On one side of the substrate 101, the first electrode layer 114 extends to the peripheral area BB and is electrically connected to the first power signal line 1. The boundary of the first electrode layer 114 is located on the side of the barrier dam 100-1 near the display area AA. The encapsulation structure 115 is disposed on the side of the first electrode layer 114 away from the substrate 101. The encapsulation structure 115 includes a first inorganic layer 115-1, a first organic layer 115-2 and a second inorganic layer 115-3 stacked in a direction away from the substrate 101. The boundary of the first inorganic layer 115-1 is flush with or approximately flush with the boundary of the first electrode layer 114.

[0065] For example, such as Figure 5 As shown, the display panel 100 may include a substrate 101, a first metal layer 108, a second planarization layer 109, and a first electrode layer 114 stacked from bottom to top. The first metal layer 108 may include a pattern of signal lines and a pattern of GOA circuitry disposed in the peripheral area BB. The signal lines may include a first power signal line 1, which can be used to transmit power signals. The first power signal line 1, which transmits power signals, is relatively thick (the first power signal line 1 has a larger dimension in its width direction). To reduce the width of the peripheral area BB, a portion of the first power signal line 1 in its width direction may be disposed below the barrier dam 100-1.

[0066] like Figure 5 As shown, the first electrode layer 114 is used, for example, to form the cathode of the light-emitting device. The first electrode layer 114 can extend from the display area AA to the peripheral area BB and is connected to the first power signal line 1 of the first metal layer 108. The second planarization layer 109 is used to separate the first metal layer 108 and the first electrode layer 114 to prevent short circuits. For example, the second planarization layer 109 can shield the GOA circuit of the first metal layer 108. The first electrode layer 114 is formed above the portion of the second planarization layer 109 that shields the GOA circuit of the first metal layer 108, preventing the first electrode layer 114 from contacting the GOA circuit and short-circuiting. The first electrode layer 114 can be connected to the first power signal line 1 of the first metal layer 108 through a via penetrating the second planarization layer 109.

[0067] For example, such as Figure 6 , Figure 7 As shown, the display panel 100 may further include a second metal layer 106 and a first planarization layer 107 located between the substrate 101 and the first metal layer 108, wherein the first planarization layer 107 is located between the first metal layer 108 and the second metal layer 106. The first metal layer 108 may include a pattern of a portion of signal lines disposed in the peripheral area BB and a portion of the GOA circuit pattern. The second metal layer 106 may include another portion of signal lines disposed in the peripheral area BB and another portion of the GOA circuit pattern. The portion of the GOA circuit pattern of the first metal layer 108 and the other portion of the GOA circuit pattern of the second metal layer 106 constitute a complete GOA circuit. The first planarization layer 107 separates the first metal layer 108 and the second metal layer 106 to prevent short circuits.

[0068] Among them, such as Figure 6 , Figure 7 As shown, the signal lines of the second metal layer 106 may include a second power signal line 2, which can be used to transmit power signals; the first power signal line 1 of the first metal layer 108 can contact the second power signal line 2 of the second metal layer 106 through a via through the first planarization layer 107, so that the first power signal line 1 and the second power signal line 2 are connected and transmit the same power signal.

[0069] At the same time, such as Figure 6 , Figure 7 As shown, the second power signal line 2 can be thicker (the second power signal line 2 has a larger dimension in its width direction), and the contact area between the second power signal line 2 and the first power signal line 1 is larger, which can ensure the transmission performance of the power signal; in order to reduce the width of the peripheral area BB, a portion of the second power signal line 2 in its width direction can be placed below the barrier dam 100-1.

[0070] For example, such as Figure 6 , Figure 7 As shown, the display panel 100 may further include a second electrode layer 110 located between the second planarization layer 109 and the first electrode layer 114. The second electrode layer 110 is used, for example, to form the anode of the light-emitting device E. The second electrode layer 110 includes a transition pattern 3 located in the peripheral region BB. The first electrode layer 114 is connected to the first power signal line 1 of the first metal layer 108 through the transition pattern 3, that is, the first electrode layer 114 is connected to the transition pattern 3. The transition pattern 3 is connected to the first power signal line 1 of the first metal layer 108 through a via penetrating the second planarization layer 109. The contact area between the transition pattern 3 and the first power signal line 1 of the first metal layer 108 can be large, increasing the overlap area between the transition pattern 3 and the first power signal line 1, and ensuring the transmission performance of the power signal.

[0071] like Figure 6 , Figure 7 As shown, in the peripheral area BB of the display panel 100, the first electrode layer 114 can directly contact the transition pattern 3 of the second electrode layer 110, thereby achieving the connection between the first electrode layer 114 and the transition pattern 3. The contact area between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110 can be relatively large, increasing the overlap area between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, and ensuring the transmission performance of power signals.

[0072] For example, such as Figure 5 , Figure 6 , Figure 7 As shown, the second planarization layer 109 may include a portion of the barrier dam pattern located in the peripheral area BB; the display panel 100 may also include a pixel defining layer 111, which may include another portion of the barrier dam pattern located in the peripheral area BB; a portion of the barrier dam pattern of the second planarization layer 109 and another portion of the barrier dam pattern of the pixel defining layer 111 may form barrier dam 100-1. Or, as Figure 5 As shown, the blocking dam pattern of only pixel-defining layer 111 can form blocking dam 100-1.

[0073] For example, such as Figure 6 , Figure 7 As shown, the first flattening layer 107 may include another part of the barrier dam pattern located in the peripheral area BB. The other part of the barrier dam pattern of the first flattening layer 107, a part of the barrier dam pattern of the second flattening layer 109, and another part of the barrier dam pattern of the pixel defining layer 111 can form a barrier dam 100-1.

[0074] For example, such as Figure 5 , Figure 6 , Figure 7 As shown, and refer to Figure 1 The barrier dam 100-1 is located in the peripheral area BB and surrounds the display area AA. The signal lines of the peripheral area BB and the GOA circuit are located on the outermost edge of the barrier dam 100-1, close to the display area AA. The barrier dam 100-1 is located on the substrate 101, has a certain height, and has a gap between two adjacent barrier dams 100-1.

[0075] The outermost barrier 100-1 refers to the barrier 100-1 that is furthest from the display area AA. The outer boundary of the barrier 100-1 means that the barrier 100-1 includes two boundaries in its width direction, which can be the inner boundary and the outer boundary, respectively. The outer boundary is farther away from the display area AA than the inner boundary.

[0076] For example, such as Figure 6 , Figure 7 As shown, the transition pattern 3 of the second electrode layer 110 can extend into the blocking dam 100-1, for example. For example, a portion of the blocking dam pattern of the second planarization layer 109 and another portion of the blocking dam pattern of the pixel defining layer 111 form the blocking dam 100-1; since the second electrode layer 110 is located between the second planarization layer 109 and the pixel defining layer 111, the transition pattern 3 of the second electrode layer 110 can extend into the blocking dam 100-1, that is, a portion of the transition pattern 3 can be located in the blocking dam 100-1.

[0077] For example, the transition pattern 3 of the second electrode layer 110 may also be located only on the side of the barrier dam 100-1 near the display area AA.

[0078] For example, such as Figure 5 , Figure 6 , Figure 7 As shown, the display panel 100 may further include an encapsulation structure 115 located on the side of the first electrode layer 114 away from the substrate 101. The encapsulation structure 115 is used to encapsulate the film layer of the display panel 100, that is, the encapsulation structure 115 covers the display area AA and the peripheral area BB of the display panel 100, preventing the film layer (e.g., the first electrode layer 114) of the display panel 100 from being exposed to the external environment, so that water and oxygen in the external environment can enter the display panel 100 along the film layer, causing corrosion to the light-emitting devices E in the display panel 100, thereby shortening the lifespan of the display panel 100 or damaging the display panel 100.

[0079] like Figure 5 , Figure 6 , Figure 7 As shown, the encapsulation structure 115 may include a first inorganic layer 115-1, a first organic layer 115-2, and a second inorganic layer 115-3 stacked along a direction away from the substrate 101 (i.e., from bottom to top). The first inorganic layer 115-1 and the second inorganic layer 115-3 are made of inorganic materials, and the preparation process generally adopts plasma chemical vapor deposition. The materials and preparation process determine that the first inorganic layer 115-1 and the second inorganic layer 115-3 are thin films with uniform film thickness. The first organic layer 115-2 is made of organic materials and has fluidity. The preparation process generally adopts inkjet printing. The materials and preparation process determine that the first organic layer 115-2 is a thin film with a flat surface and non-uniform film thickness.

[0080] For example, such as Figure 5 , Figure 6 , Figure 7As shown, in order to avoid the first electrode layer 114 covering the barrier dam 100-1 and to eliminate the redundant distance between the boundary of the first electrode layer 114 and the barrier dam 100-1, and to achieve a narrow or ultra-narrow bezel design, after the first electrode film is set in a whole layer (the first electrode film can be set in a whole layer by vapor deposition), the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA can be etched away, so that the first electrode layer 114 formed is located on the side of the barrier dam 100-1 closer to the display area AA. In other words, the boundary of the first electrode layer 114 formed is located on the side of the barrier dam 100-1 closer to the display area AA.

[0081] The portion of the first electrode film exposed to the photoresist (the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located on the side away from the substrate 101) can be etched by depositing photoresist on the side of the first electrode film away from the substrate 101, exposing and developing the photoresist. However, since the photoresist is in direct contact with the first electrode film, during the development of the photoresist (developing the portion of the photoresist corresponding to the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA, thus exposing the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA), the developing solution used to develop the photoresist will inevitably come into contact with the exposed portion of the first electrode film. Even if the portion of the first electrode film exposed by the photoresist is etched away in subsequent processes, there will still be residual developing solution. The residual developing solution will diffuse towards the display area AA of the display panel 100 along the boundary of the formed first electrode layer 114, affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108; or affecting the connection between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, thereby affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108.

[0082] Therefore, the first inorganic layer 115-1 can be used as a mask to etch the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA, thereby forming the first electrode layer 114.

[0083] Specifically, after the first electrode film is deposited in its entirety (by vapor deposition), a first inorganic film is deposited in its entirety on the side of the first electrode film away from the substrate 101; photoresist is deposited on the side of the first inorganic film away from the substrate 101; after exposure and development of the photoresist, the photoresist exposes the portion of the first inorganic film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA; the exposed portion of the first inorganic film is etched to form a first inorganic layer 115-1; then, using the formed first inorganic layer 115-1 as a mask, the portion of the first electrode film exposed by the first inorganic layer 115-1 is etched to form a first electrode layer 114.

[0084] During this process, when the developer develops the photoresist, the developer will come into contact with the first inorganic film, but will not come into contact with the first electrode film on the side of the first inorganic film near the substrate 101. Furthermore, when etching the portion of the first inorganic film exposed by the photoresist, no developer is used. Therefore, it is possible to prevent the developer from spreading along the boundary of the formed first electrode layer 114 towards the display area AA of the display panel 100, thus affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108; or affecting the connection between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, thereby affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108.

[0085] like Figure 5 , Figure 6 , Figure 7 As shown, since the first inorganic layer 115-1 is used as a mask to prepare the first electrode layer 114, the boundary of the finally formed first electrode layer 114 is flush or approximately flush with the boundary of the first inorganic layer 115-1.

[0086] "Roughly level" refers to the state where objects or things are on the same plane or line, meaning that their height, width, or position are basically the same, without obvious differences or unevenness.

[0087] By using the first inorganic thin film as a temporary encapsulation structure for the first electrode thin film, the contact between the first electrode thin film and the developing solution used to develop the photoresist can be avoided during the fabrication process. At the same time, by using the portion of the first inorganic layer 115-1 that has been etched away from the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA as a mask, the use of developing solution can be avoided when forming the first electrode layer 114. This prevents the developing solution from spreading along the boundary of the formed first electrode layer 114 towards the display area AA of the display panel 100, thus avoiding affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108; or affecting the connection between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, thereby affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108.

[0088] Furthermore, the first electrode film can be deposited as a whole layer using a vapor deposition process. Then, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA are etched away, so that the first electrode layer 114 is located on the side of the barrier dam 100-1 closer to the display area AA. During this process, the etching range of the first electrode film can be precisely controlled. That is, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA can be etched away as needed. There is no need to consider the redundant distance X caused by the manufacturing tolerance of the vapor deposition process. The redundant distance X between the boundary of the first electrode layer 114 and the barrier dam 100-1 can be eliminated, realizing the design of narrow bezel or ultra-narrow bezel.

[0089] For example, the boundaries of the first electrode layer 114 and the first inorganic layer 115-1 can be a certain distance from the barrier dam 100-1. This distance is small and does not affect the design of the narrow or ultra-narrow bezel of the display panel 100. Alternatively, there can be no distance between the boundaries of the first electrode layer 114 and the first inorganic layer 115-1 and the barrier dam 100-1, that is, the boundaries of the first electrode layer 114 and the first inorganic layer 115-1 are adjacent to the barrier dam 100-1, thereby achieving the design of the narrow or ultra-narrow bezel of the display panel 100.

[0090] In some embodiments, such as Figure 5 , Figure 6 As shown, the second inorganic layer 115-3 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the second inorganic layer 115-3 is located on the side of the barrier dam 100-1 away from the display area AA.

[0091] For example, the second inorganic layer 115-3 can be the film layer furthest from the substrate 101 in the encapsulation structure 115. To achieve the encapsulation function of the encapsulation structure 115 and ensure the flatness of the display panel 100, the second inorganic layer 115-3 can be a single layer. The second inorganic layer 115-3 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the second inorganic layer 115-3 can be located on the side of the barrier dam 100-1 away from the display area AA. That is, the second inorganic layer 115-3 covers the display area AA and the peripheral area BB of the display panel 100. The inorganic material of the second inorganic layer 115-3 can better prevent moisture and oxygen from the external environment from entering the display panel 100.

[0092] In some embodiments, such as Figure 5 , Figure 6 As shown, the barrier dam 100-1 can be used to block the overflow of the relevant organic layer (e.g., the first organic layer 115-2) during the preparation process. Therefore, the boundary of the first organic layer 115-2 can be located on the side of the barrier dam 100-1 close to the display area AA.

[0093] Among them, such as Figure 5 , Figure 6 As shown, the boundary of the first organic layer 115-2 can be closer to the barrier dam 100-1 than the boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1, meaning the first organic layer 115-2 can cover the boundaries of the first electrode layer 114 and the first inorganic layer 115-1. In this case, the first organic layer 115-2 can be formed after the first electrode layer 114 and the first inorganic layer 115-1 are formed, thereby allowing the first organic layer 115-2 to cover the boundaries of the first electrode layer 114 and the first inorganic layer 115-1.

[0094] In some embodiments, such as Figure 8 As shown, the boundary of the first organic layer 115-2 is flush with or approximately flush with the boundary of the first electrode layer 114.

[0095] For example, the first organic layer 115-2 can be used as a mask to etch the portions of the first inorganic thin film and the first electrode thin film located on the barrier dam 100-1 and the portions of the barrier dam 100-1 located away from the display area AA, thereby forming the first inorganic layer 115-1 and the first electrode layer 114, respectively.

[0096] Specifically, after the first electrode film is deposited in its entirety (by vapor deposition), a first inorganic film is deposited in its entirety on the side of the first electrode film away from the substrate 101; a first organic layer 115-2 is deposited on the side of the first inorganic film away from the substrate 101, with the boundary of the first organic layer 115-2 located on the side of the barrier dam 100-1 near the display area AA; using the first organic layer 115-2 as a mask, the portion of the first inorganic film exposed by the first organic layer 115-2 is etched, that is, the portion of the first inorganic film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA is etched to form the first inorganic layer 115-1; the portion of the first electrode film exposed by the formed first inorganic layer 115-1 is etched, that is, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA is etched to form the first electrode layer 114.

[0097] In this case, such as Figure 8 As shown, the boundary of the first organic layer 115-2 is flush or nearly flush with the boundary of the first inorganic layer 115-1, and also flush or nearly flush with the boundary of the first electrode layer 114. Furthermore, the second inorganic layer 115-3 contacts the upper surface of the barrier dam 100-1, and the boundary of the second inorganic layer 115-3 is located on the side of the barrier dam 100-1 away from the display area AA. That is, the second inorganic layer 115-3 can be a single, continuous layer, covering the display area AA and the surrounding area BB of the display panel 100. The inorganic material of the second inorganic layer 115-3 can better prevent moisture and oxygen from the external environment from entering the display panel 100.

[0098] In this process, there is no need to set up photoresist and develop it. The first inorganic layer 115-1 and the first electrode layer 114 can be prepared using the film layer that exists in the display panel 100 itself, which can greatly save production costs. At the same time, there is no need to use developing solution, which can prevent the developing solution from spreading to the display area AA side of the display panel 100 along the boundary of the formed first electrode layer 114, affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108; or affecting the connection between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, thereby affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108.

[0099] Furthermore, the first electrode film can be deposited as a whole layer using a vapor deposition process. Then, using the first organic layer 115-2 as a mask, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA are etched away, so that the first electrode layer 114 is located on the side of the barrier dam 100-1 closer to the display area AA. During this process, the etching range of the first electrode film can be precisely controlled. That is, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA can be etched away as needed. There is no need to consider the redundant distance X caused by the fabrication tolerance of the vapor deposition process. The redundant distance X between the boundary of the first electrode layer 114 and the barrier dam 100-1 can be eliminated, realizing the design of narrow bezel or ultra-narrow bezel.

[0100] For example, the boundaries of the first organic layer 115-2, the first inorganic layer 115-1, and the first electrode layer 114 can be a certain distance from the barrier dam 100-1. This distance is small and does not affect the design of the narrow or ultra-narrow bezel of the display panel 100. Alternatively, there can be no distance between the boundaries of the first organic layer 115-2, the first inorganic layer 115-1, and the first electrode layer 114 and the barrier dam 100-1, i.e., the boundaries of the first organic layer 115-2, the first inorganic layer 115-1, and the first electrode layer 114 are adjacent to the barrier dam 100-1, thereby achieving the design of the narrow or ultra-narrow bezel of the display panel 100.

[0101] In some embodiments, such as Figure 7 As shown, the display panel 100 also includes a third inorganic layer 115-4, which is disposed between the first inorganic layer 115-1 and the first organic layer 115-2. The third inorganic layer 115-4 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the third inorganic layer 115-4 is located on the side of the barrier dam 100-1 away from the display area AA.

[0102] For example, such as Figure 5 , Figure 6As shown, after forming the first electrode layer 114 using the first inorganic layer 115-1 as a mask, the boundary of the first inorganic layer 115-1 of the encapsulation structure 115 is located on the side of the barrier dam 100-1 near the display area AA. The boundary of the first organic layer 115-2 of the encapsulation structure 115 is located on the side of the barrier dam 100-1 near the display area AA. The second inorganic layer 115-3 of the encapsulation structure 115 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the second inorganic layer 115-3 is located on the side of the barrier dam 100-1 away from the display area AA. Only one inorganic layer (the second inorganic layer 115-3) is provided on the upper surface of the barrier dam 100-1 and on the side of the barrier dam 100-1 away from the display area AA. The ability of a single inorganic layer to block water and oxygen from the external environment is poor, resulting in a poor encapsulation effect of the encapsulation structure 115.

[0103] Therefore, as Figure 7 As shown, the encapsulation structure 115 of the display panel 100 may further include a third inorganic layer 115-4, which is disposed between the first inorganic layer 115-1 and the first organic layer 115-2. The third inorganic layer 115-4 can be disposed as a single layer. When there is a certain distance between the boundary of the first electrode layer 114 and the first inorganic layer 115-1 and the barrier dam 100-1, the third inorganic layer 115-4 can cover the boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1. The third inorganic layer 115-4 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the third inorganic layer 115-4 is located on the side of the barrier dam 100-1 away from the display area AA. The inorganic material of the third inorganic layer 115-4 can better prevent moisture and oxygen from the external environment from entering the display panel 100. Meanwhile, the second inorganic layer 115-3 is also set as a whole layer, that is, the second inorganic layer 115-3 covers the part of the third inorganic layer 115-4 located on the barrier dam 100-1, and the second inorganic layer 115-3 covers the part of the third inorganic layer 115-4 located on the side of the barrier dam 100-1 away from the display area AA.

[0104] like Figure 7 As shown, two inorganic layers (a third inorganic layer 115-4 and a second inorganic layer 115-3) are provided on the side of the barrier dam 100-1 away from the substrate 101 and on the side of the barrier dam 100-1 away from the display area AA. The two inorganic layers have a good ability to block water and oxygen from the external environment, which makes the encapsulation effect of the encapsulation structure 115 better.

[0105] In some embodiments, such as Figure 9 As shown, the display panel 100 also includes a second organic layer 115-5, which is disposed between the first inorganic layer 115-1 and the third inorganic layer 115-4. The boundary of the second organic layer 115-5 is flush with or substantially flush with the boundary of the first electrode layer 114.

[0106] For example, such as Figure 9 As shown, the encapsulation structure 115 of the display panel 100 may also include a second organic layer 115-5. The second organic layer 115-5 is disposed between the first inorganic layer 115-1 and the third inorganic layer 115-4. The material of the second organic layer 115-5 is an organic material with fluidity. The preparation process generally adopts inkjet printing process. Its material and preparation process determine that the second organic layer 115-5 is a thin film with a flat surface and uneven film thickness.

[0107] For example, the barrier dam 100-1 can also be used to block the overflow of the relevant organic layer (e.g., the second organic layer 115-5) during the preparation process. Therefore, the boundary of the second organic layer 115-5 can be located on the side of the barrier dam 100-1 close to the display area AA.

[0108] For example, the second organic layer 115-5 can be used as a mask to etch the portions of the first inorganic thin film and the first electrode thin film located on the barrier dam 100-1 and the portions of the barrier dam 100-1 located away from the display area AA, thereby forming the first inorganic layer 115-1 and the first electrode layer 114, respectively.

[0109] Specifically, after the first electrode film is deposited in its entirety (by vapor deposition), a first inorganic film is deposited in its entirety on the side of the first electrode film away from the substrate 101; a second organic layer 115-5 is deposited on the side of the first inorganic film away from the substrate 101, with the boundary of the second organic layer 115-5 located on the side of the barrier dam 100-1 near the display area AA; using the second organic layer 115-5 as a mask, the portion of the first inorganic film exposed by the second organic layer 115-5 is etched, that is, the portion of the first inorganic film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA is etched to form the first inorganic layer 115-1; the portion of the first electrode film exposed by the formed first inorganic layer 115-1 is etched, that is, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA is etched to form the first electrode layer 114.

[0110] In this case, such as Figure 9As shown, the boundary of the second organic layer 115-5 is flush or substantially flush with the boundary of the first inorganic layer 115-1, and also flush or substantially flush with the boundary of the first electrode layer 114. Furthermore, the third inorganic layer 115-4 contacts the upper surface of the barrier dam 100-1, and the boundary of the third inorganic layer 115-4 is located on the side of the barrier dam 100-1 away from the display area AA; that is, the third inorganic layer 115-4 can be a single, continuous layer, covering the display area AA and the peripheral area BB of the display panel 100. Simultaneously, the second inorganic layer 115-3 is also a single, continuous layer, covering the portion of the third inorganic layer 115-4 located on the barrier dam 100-1, and also covering the portion of the third inorganic layer 115-4 located on the side of the barrier dam 100-1 away from the display area AA.

[0111] In this process, there is no need to set up photoresist and develop it. The first inorganic layer 115-1 and the first electrode layer 114 can be prepared using the film layer that exists in the display panel 100 itself, which can greatly save production costs. At the same time, there is no need to use developing solution, which can prevent the developing solution from spreading to the display area AA side of the display panel 100 along the boundary of the formed first electrode layer 114, affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108; or affecting the connection between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, thereby affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108.

[0112] Furthermore, the first electrode film can be deposited as a whole layer using a vapor deposition process. Then, using the second organic layer 115-5 as a mask, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA are etched away. This results in the first electrode layer 114 being located on the side of the barrier dam 100-1 closer to the display area AA. During this process, the etching range of the first electrode film can be precisely controlled. That is, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA can be etched away as needed. There is no need to consider the redundant distance X caused by the fabrication tolerance of the vapor deposition process. This eliminates the redundant distance X between the boundary of the first electrode layer 114 and the barrier dam 100-1, enabling a narrow bezel or ultra-narrow bezel design.

[0113] For example, the boundaries of the formed second organic layer 115-5, the first inorganic layer 115-1, and the first electrode layer 114 can be a certain distance from the barrier dam 100-1. This distance is small and does not affect the design of the narrow or ultra-narrow bezel of the display panel 100. Alternatively, there can be no distance between the boundaries of the formed second organic layer 115-5, the first inorganic layer 115-1, and the first electrode layer 114 and the barrier dam 100-1. That is, the boundaries of the formed second organic layer 115-5, the first inorganic layer 115-1, and the first electrode layer 114 are adjacent to the barrier dam 100-1, thereby achieving the design of the narrow or ultra-narrow bezel of the display panel 100.

[0114] When there is a certain distance between the boundary of the second organic layer 115-5, the boundary of the first inorganic layer 115-1, and the boundary of the first electrode layer 114 and the barrier dam 100-1, the third inorganic layer 115-4 can cover the boundary of the second organic layer 115-5, the boundary of the first inorganic layer 115-1, and the boundary of the first electrode layer 114. The third inorganic layer 115-4 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the third inorganic layer 115-4 is located on the side of the barrier dam 100-1 away from the display area AA. The inorganic material of the third inorganic layer 115-4 can better prevent water vapor and oxygen from the external environment from entering the display panel 100. Meanwhile, the second inorganic layer 115-3 is also set as a whole layer, that is, the second inorganic layer 115-3 covers the part of the third inorganic layer 115-4 located on the barrier dam 100-1, and the second inorganic layer 115-3 covers the part of the third inorganic layer 115-4 located on the side of the barrier dam 100-1 away from the display area AA.

[0115] In some embodiments, such as Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 As shown, the display panel 100 also includes a partition structure 4, which is disposed on the side of the barrier dam 100-1 near the display area AA, and the first electrode layer 114 is disconnected at the partition structure 4.

[0116] For example, since the first electrode layer 114 is a continuous film layer and extends from the display area AA to the peripheral area BB, water and oxygen in the external environment can easily enter the display area AA of the display panel 100 along the first electrode layer 114, causing corrosion and damage to the light-emitting device E in the display area AA. Although the boundary of the first electrode layer 114 is located on the side of the barrier dam 100-1 close to the display area AA, and the barrier dam 100-1 can block water and oxygen in the external environment from entering the display panel 100, a small amount of water and oxygen in the external environment will still cross the barrier dam 100-1 and enter the display panel 100, and enter the display area AA along the first electrode layer 114.

[0117] Therefore, as Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 As shown, a partition structure 4 can be provided on the side of the barrier dam 100-1 near the display area AA. The number of partition structures 4 is not limited and can be set according to the actual situation. The first electrode layer 114 is broken at the partition structure 4, that is, the partition structure 4 can divide the first electrode layer 114 into an independent first part and at least one second part. The first part is located in the display area AA and extends to the side of the partition structure 4 near the display area AA to connect with the first power signal line 1; the second part is located on the side of the first part away from the display area AA.

[0118] Even if a small amount of water and oxygen from the external environment crosses the barrier dam 100-1 and enters the display panel 100, this portion of water and oxygen from the external environment will first penetrate to the second part of the first electrode layer 114. Since the second part is independent of the first part, the water and oxygen on the second part cannot be transferred to the first part, thus ensuring that water and oxygen from the external environment cannot enter the first part of the first electrode layer 114, thereby effectively blocking water and oxygen from the external environment from entering the display area AA, further improving the encapsulation effect of the display panel 100. Furthermore, the more partition structures 4 there are, the more independent second parts are formed, and water and oxygen from the external environment need to penetrate multiple second parts before penetrating to the first part, further improving the encapsulation effect of the display panel 100.

[0119] For example, such as Figure 11As shown, the transition pattern 3 of the second electrode layer 110 may include, for example, two independent parts. One part may be located on the side of the barrier dam 100-1 near the display area AA, and the boundary of this part of the transition pattern 3 may be located on the side of the innermost partition structure 4 near the display area AA, with the first part of the first electrode layer 114 covering the boundary of this part of the transition pattern 3. The other part may be disposed in the barrier dam 100-1, and the boundary of this other part of the transition pattern 3 may be located on the side of the outermost partition structure 4 away from the display area AA. For example, a part of the barrier dam pattern of the second planarization layer 109 and another part of the barrier dam pattern of the pixel defining layer 111 form the barrier dam 100-1; since the second electrode layer 110 is located between the second planarization layer 109 and the pixel defining layer 111, this other part of the transition pattern 3 may be located in the barrier dam 100-1.

[0120] For example, such as Figure 10 , Figure 12 , Figure 13 As shown, the transition pattern 3 of the second electrode layer 110 may be located only on the side of the barrier dam 100-1 near the display area AA; and the boundary of the transition pattern 3 may be located on the side of the partition structure 4 near the display area AA, and the first part of the first electrode layer 114 covers the boundary of the transition pattern 3.

[0121] In some embodiments, such as Figure 10 , Figure 11 , Figure 12 , Figure 13 As shown, the first power signal line 1 includes a first part 1-1, which is located on the side of the barrier dam 100-1 close to the display area AA; the first part 1-1 includes a first side surface 1-11 on the side away from the display area AA, and the first side surface 1-11 is provided with a first groove 4-1, which forms a partition structure 4.

[0122] For example, such as Figure 10 , Figure 11 , Figure 12 , Figure 13 As shown, the first power signal line 1 can be used to form the isolation structure 4. For example, in the width direction of the first power signal line 1, the first power signal line 1 may include a first part 1-1, the first part 1-1 is located on the side of the barrier 100-1 close to the display area AA, and the boundary of the first part 1-1 away from the display area AA may have a certain distance from the barrier 100-1, for example, the distance between the boundary of the first part 1-1 away from the display area AA and the barrier 100-1 may be 10um.

[0123] For example, such as Figure 10 , Figure 11 , Figure 12 , Figure 13 As shown, the first part 1-1 may include a first side surface 1-11 on the side away from the display area AA, and the first side surface 1-11 is provided with a first groove 4-1. The material of the first power signal line 1 can be, for example, a titanium-aluminum-titanium structure. Therefore, the first groove 4-1 can be formed on the first side surface 1-11 of the first power signal line 1 using dry etching, wet etching or other processes.

[0124] Due to the presence of the first groove 4-1, when the first electrode layer 114 is set, it will extend beyond the first groove 4-1, making it impossible for the first electrode layer 114 to be continuously set at the first side surface 1-11 of the first portion 1-1. The first electrode layer 114 is broken at the first groove 4-1, forming independent first and second portions. Therefore, the first groove 4-1 of the first side surface 1-11 of the first portion 1-1 in the first power signal line 1 forms a partition structure 4.

[0125] In some embodiments, such as Figure 11 , Figure 12 , Figure 13 As shown, the first power signal line 1 also includes a second part 1-2, which is located on the side of the barrier dam 100-1 near the substrate 101; the second part 1-2 includes a second side surface 1-21 near the display area AA, which is located on the side of the barrier dam 100-1 near the display area AA; the second side surface 1-21 is provided with a second groove 4-2, which forms a partition structure 4.

[0126] For example, such as Figure 11 , Figure 12 , Figure 13 As shown, in the width direction of the first power signal line 1, the first power signal line 1 may also include a second part 1-2. The second part 1-2 is independent of the first part 1-1. The second part 1-2 is located on the side of the barrier dam 100-1 near the substrate 101. That is, a part of the second part 1-2 may be located below the barrier dam 100-1, and the other part may be located on the side of the barrier dam 100-1 near the display area AA.

[0127] For example, such as Figure 11 , Figure 12 , Figure 13As shown, the second part 1-2 may include a second side surface 1-21 near the display area AA. The second side surface 1-21 is located on the side of the barrier dam 100-1 near the display area AA, and a second groove 4-2 is provided on the second side surface 1-21. Due to the presence of the second groove 4-2, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the second groove 4-2, making it impossible to continuously set the first electrode layer 114 at the second side surface 1-21 of the second part 1-2. The first electrode layer 114 is broken at the second groove 4-2, forming independent first and second parts. Therefore, the second groove 4-2 of the second side surface 1-21 of the second part 1-2 in the first power signal line 1 forms a partition structure 4.

[0128] In some embodiments, such as Figure 13 As shown, the first power signal line 1 also includes at least one third part 1-3, which is located between the first part 1-1 and the second part 1-2. The third part 1-3 includes two third side surfaces 1-31 arranged opposite to each other in the extension direction perpendicular to the first power signal line 1. At least one third side surface 1-31 is provided with a third groove 4-3, which forms a partition structure 4.

[0129] For example, such as Figure 13 As shown, in the width direction of the first power signal line 1, the first power signal line 1 may further include at least one third part 1-3, the third part 1-3 being located between the first part 1-1 and the second part 1-2, and the third part 1-3, the second part 1-2 and the first part 1-1 being independent of each other; when the first power signal line 1 includes multiple third parts 1-3, the multiple third parts 1-3 are independent of each other.

[0130] For example, such as Figure 13 As shown, the third part 1-3 includes two third side surfaces 1-31 arranged opposite to each other in the extension direction perpendicular to the first power signal line 1. That is, in the width direction of the first power signal line 1, the third part 1-3 includes two opposing third side surfaces 1-31. At least one third side surface 1-31 is provided with a third groove 4-3, for example, all third side surfaces 1-31 are provided with a third groove 4-3. Due to the presence of the third groove 4-3, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the third groove 4-3, so that the first electrode layer 114 cannot be continuously set at the third side surface 1-31 of the third part 1-3. The first electrode layer 114 is broken at the third groove 4-3, forming an independent first part and a second part. Therefore, the third groove 4-3 of the third side surface 1-31 of the third part 1-3 in the first power signal line 1 forms a partition structure 4.

[0131] In some embodiments, such as Figure 14As shown, the display panel 100 also includes a second electrode layer 110 and a partition post 4-4; the second electrode layer 110 is disposed between the first metal layer 108 and the first electrode layer 114, and the second electrode layer 110 includes a transition pattern 3 located in the peripheral area BB, and the first electrode layer 114 is electrically connected to the first power signal line 1 through the transition pattern 3; the partition post 4-4 is disposed on the side of the second electrode layer 110 away from the substrate 101 and is located in the peripheral area BB; the partition post 4-4 forms a partition structure 4.

[0132] For example, the second electrode layer 110 is described as in the previous embodiments and will not be repeated here.

[0133] For example, such as Figure 14 As shown, the display panel 100 may further include a third metal layer 116 disposed between the second electrode layer 110 and the first electrode layer 114. The material of the third metal layer 116 may be, for example, titanium-aluminum-titanium. The third metal layer 116 may include a partition post 4-4, which is disposed on the side of the second electrode layer 110 away from the substrate 101 and located in the peripheral region BB; that is, the partition post 4-4 is disposed between the second electrode layer 110 and the first electrode layer 114. For example, the partition post 4-4 may be disposed above the transition pattern 3 of the second electrode layer 110, and the first electrode layer 114 may be broken at the location of the partition post 4-4, forming a partition structure 4.

[0134] In some embodiments, such as Figure 14 As shown, the partition column 4-4 includes two fourth side surfaces 4-41 arranged opposite each other in the extension direction perpendicular to the first power signal line 1. At least one fourth side surface 4-41 is provided with a fourth groove 4-411, which is used to disconnect the first electrode layer 114 at the fourth groove 4-411.

[0135] For example, such as Figure 14 As shown, the partition post 4-4 includes two fourth side surfaces 4-41 arranged opposite each other in the extension direction perpendicular to the first power signal line 1. That is, in the width direction of the first power signal line 1, the partition post 4-4 may include two fourth side surfaces 4-41 arranged opposite each other, and at least one of the fourth side surfaces 4-41 is provided with a fourth groove 4-411, for example, both fourth side surfaces 4-41 are provided with a fourth groove 4-411. Due to the presence of the fourth groove 4-411, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the fourth groove 4-411, so that the first electrode layer 114 cannot be continuously set at the fourth side surface 4-41 of the partition post 4-4. The first electrode layer 114 is broken at the fourth groove 4-411, forming an independent first part and a second part. Therefore, the fourth groove 4-411 of the fourth side surface 4-41 of the partition post 4-4 forms the partition structure 4.

[0136] In some embodiments, a display panel 100 is provided. For example... Figure 15 , Figure 16 , Figure 17 , Figure 18 As shown, the display panel 100 includes a display area AA and a peripheral area BB surrounding the display area AA; the display panel 100 includes a substrate 101, a barrier dam 100-1, a first metal layer 108, a first electrode layer 114, and a partition structure 4; the barrier dam 100-1 is disposed on the substrate 101, the barrier dam 100-1 is located in the peripheral area BB and surrounds the display area AA; the first metal layer 108 is disposed on the substrate 101, the first metal layer 108 includes a first power signal line 1 located in the peripheral area BB; the first electrode layer 114 is disposed on the side of the first metal layer 108 away from the substrate 101, the first electrode layer 114 extends to the peripheral area BB and is electrically connected to the first power signal line 1; the partition structure 4 is disposed on the side of the barrier dam 100-1 close to the display area AA, and the first electrode layer 114 is disconnected at the partition structure 4.

[0137] For example, the substrate 101, the barrier dam 100-1, and the first metal layer 108 of the display panel 100 are described as in the previous embodiments and will not be repeated here.

[0138] For example, such as Figure 15 , Figure 16 , Figure 17 , Figure 18 As shown, the first electrode layer 114 extends from the display area AA to the peripheral area BB and is electrically connected to the first power signal line 1. The first electrode layer 114 can be set as a whole, that is, a part of the first electrode layer 114 can be located on the upper surface of the barrier dam 100-1, and the boundary of the first electrode layer 114 can be located on the side of the barrier dam 100-1 away from the display area AA.

[0139] The first electrode layer 114 can be set as a whole, which means that the first electrode layer 114 is laid out as a whole at once according to its preset size, without the need to set the first electrode layer 114 in a patterned manner.

[0140] For example, the preset size of the first electrode layer 114 is not limited here. The preset size of the first electrode layer 114 may be slightly smaller than the preset size of the substrate 101, that is, the boundary of the first electrode layer 114 is located on the substrate 101. The boundary of the first electrode layer 114 may be located on the barrier dam 100-1, or it may be located on the side of the barrier dam 100-1 away from the display area AA.

[0141] For example, since the barrier dam 100-1 has a certain height, the first electrode layer 114 will span a considerable height at the location of the barrier dam 100-1 so that the first electrode layer 114 covers the barrier dam 100-1. Because the barrier dam 100-1 is narrow, the contact area between the first electrode layer 114 and the barrier dam 100-1 is small. Simultaneously, the portion of the first electrode layer 114 on the barrier dam 100-1 spans a considerable height, therefore, the portion of the first electrode layer 114 on the barrier dam 100-1 is prone to delamination with the barrier dam 100-1. Furthermore, the boundary of the first electrode layer 114 is close to the outer edge of the display panel 100. After delamination occurs between the first electrode layer 114 and the barrier dam 100-1, the cracks in this delamination can easily extend to the outer edge of the display panel 100, exposing the outer edge of the display panel 100. Water and oxygen in the air can then penetrate into the display panel 100 through the outer edge. Since the first electrode layer 114 is a continuous film, water and oxygen in the air can penetrate into the display area AA through the first electrode layer 114, causing corrosion and damage to the light-emitting device E within the display area AA, leading to encapsulation failure and damage to the display panel 100. Therefore, to prevent water and oxygen in the air from penetrating into the display panel 100 through the outer edge and penetrating into the display area AA through the first electrode layer 114, such as... Figure 15 , Figure 16 , Figure 17 , Figure 18 As shown, a partition structure 4 can be installed on the side of the barrier dam 100-1 near the display area AA. The number of partition structures 4 is not limited and can be set according to the actual situation. The partition structure 4 is used to disconnect the first electrode layer 114 at this position.

[0142] like Figure 15 , Figure 16 , Figure 17 , Figure 18 As shown, the partition structure 4 can divide the first electrode layer 114 into an independent first part and at least one second part. The first part is located in the display area AA and extends to the side of the partition structure 4 near the display area AA and is connected to the first power signal line 1. The second part is located on the side of the first part away from the display area AA.

[0143] After water and oxygen in the air permeate into the display panel 100 through the outer edge of the display panel 100, they will first permeate to the second part of the first electrode layer 114. Since the second part is independent of the first part, the water and oxygen on the second part cannot be transferred to the first part, which can ensure that water and oxygen in the external environment cannot enter the first part of the first electrode layer 114, thereby effectively blocking water and oxygen in the external environment from entering the display area AA and improving the encapsulation effect of the display panel 100. Furthermore, the more partition structures 4 there are, the more independent second parts are formed, and water and oxygen in the external environment need to permeate through multiple second parts before permeating to the first part, which further improves the encapsulation effect of the display panel 100.

[0144] In some embodiments, such as Figure 15 , Figure 16 , Figure 17 As shown, the first power signal line 1 includes a first part 1-1, which is located on the side of the barrier dam 100-1 close to the display area AA; the first part 1-1 includes a first side surface 1-11 on the side away from the display area AA, and the first side surface 1-11 is provided with a first groove 4-1, which forms a partition structure 4.

[0145] For example, such as Figure 15 , Figure 16 , Figure 17 As shown, the first power signal line 1 can be used to form the partition structure 4. For example, in the width direction of the first power signal line 1, the first power signal line 1 may include a first part 1-1, the first part 1-1 is located on the side of the barrier 100-1 close to the display area AA, and the boundary of the first part 1-1 away from the display area AA may have a certain distance from the barrier 100-1.

[0146] For example, such as Figure 15 , Figure 16 , Figure 17 As shown, the first part 1-1 may include a first side surface 1-11 on the side away from the display area AA, and the first side surface 1-11 is provided with a first groove 4-1. Due to the presence of the first groove 4-1, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the first groove 4-1, so the first electrode layer 114 cannot be set continuously at the first side surface 1-11 of the first part 1-1. The first electrode layer 114 is broken at the first groove 4-1, forming an independent first part and a second part. Therefore, the first groove 4-1 of the first side surface 1-11 of the first part 1-1 in the first power signal line 1 forms a partition structure 4.

[0147] In some embodiments, such as Figure 16 , Figure 17As shown, the first power signal line 1 also includes a second part 1-2, which is located on the side of the barrier dam 100-1 near the substrate 101; the second part 1-2 includes a second side surface 1-21 near the display area AA, which is located on the side of the barrier dam 100-1 near the display area AA; the second side surface 1-21 is provided with a second groove 4-2, which forms a partition structure 4.

[0148] For example, such as Figure 16 , Figure 17 As shown, in the width direction of the first power signal line 1, the first power signal line 1 may also include a second part 1-2. The second part 1-2 is independent of the first part 1-1. The second part 1-2 is located on the side of the barrier dam 100-1 near the substrate 101. That is, a part of the second part 1-2 may be located below the barrier dam 100-1, and the other part may be located on the side of the barrier dam 100-1 near the display area AA.

[0149] For example, such as Figure 16 , Figure 17 As shown, the second part 1-2 may include a second side surface 1-21 near the display area AA. The second side surface 1-21 is located on the side of the barrier dam 100-1 near the display area AA, and a second groove 4-2 is provided on the second side surface 1-21. Due to the presence of the second groove 4-2, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the second groove 4-2, making it impossible to continuously set the first electrode layer 114 at the second side surface 1-21 of the second part 1-2. The first electrode layer 114 is broken at the second groove 4-2, forming independent first and second parts. Therefore, the second groove 4-2 of the second side surface 1-21 of the second part 1-2 in the first power signal line 1 forms a partition structure 4.

[0150] In some embodiments, such as Figure 17 As shown, the first power signal line 1 also includes at least one third part 1-3, which is located between the first part 1-1 and the second part 1-2. The third part 1-3 includes two third side surfaces 1-31 arranged opposite to each other in the extension direction perpendicular to the first power signal line 1. At least one third side surface 1-31 is provided with a third groove 4-3, which forms a partition structure 4.

[0151] For example, such as Figure 17As shown, in the width direction of the first power signal line 1, the first power signal line 1 may further include at least one third part 1-3, the third part 1-3 being located between the first part 1-1 and the second part 1-2, and the third part 1-3, the second part 1-2 and the first part 1-1 being independent of each other; when the first power signal line 1 includes multiple third parts 1-3, the multiple third parts 1-3 are independent of each other.

[0152] For example, such as Figure 17 As shown, the third part 1-3 includes two third side surfaces 1-31 arranged opposite to each other in the extension direction perpendicular to the first power signal line 1. That is, in the width direction of the first power signal line 1, the third part 1-3 includes two opposing third side surfaces 1-31. At least one third side surface 1-31 is provided with a third groove 4-3, for example, all third side surfaces 1-31 are provided with a third groove 4-3. Due to the presence of the third groove 4-3, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the third groove 4-3, so that the first electrode layer 114 cannot be continuously set at the third side surface 1-31 of the third part 1-3. The first electrode layer 114 is broken at the third groove 4-3, forming an independent first part and a second part. Therefore, the third groove 4-3 of the third side surface 1-31 of the third part 1-3 in the first power signal line 1 forms a partition structure 4.

[0153] In some embodiments, such as Figure 18 As shown, the display panel 100 also includes a second electrode layer 110 and a partition post 4-4. The second electrode layer 110 is disposed between the first metal layer 108 and the first electrode layer 114. The second electrode layer 110 includes a transition pattern 3 located in the peripheral area BB. The first electrode layer 114 is electrically connected to the first power signal line 1 through the transition pattern 3. The partition post 4-4 is disposed on the side of the second electrode layer 110 away from the substrate 101 and is located in the peripheral area BB. The partition post 4-4 forms a partition structure 4.

[0154] For example, the second electrode layer 110 is described as in the previous embodiments and will not be repeated here.

[0155] For example, such as Figure 18As shown, the display panel 100 may further include a third metal layer 116 disposed between the second electrode layer 110 and the first electrode layer 114. The material of the third metal layer 116 may be, for example, titanium-aluminum-titanium. The third metal layer 116 may include a partition post 4-4, which is disposed on the side of the second electrode layer 110 away from the substrate 101 and located in the peripheral region BB; that is, the partition post 4-4 is disposed between the second electrode layer 110 and the first electrode layer 114. For example, the partition post 4-4 may be disposed above the transition pattern 3 of the second electrode layer 110, and the first electrode layer 114 may be broken at the location of the partition post 4-4, forming a partition structure 4.

[0156] In some embodiments, such as Figure 18 As shown, the partition column 4-4 includes two fourth side surfaces 4-41 arranged opposite each other in the extension direction perpendicular to the first power signal line 1. At least one fourth side surface 4-41 is provided with a fourth groove 4-411, which is used to disconnect the first electrode layer 114 at the fourth groove 4-411.

[0157] For example, such as Figure 18 As shown, the partition post 4-4 includes two fourth side surfaces 4-41 arranged opposite each other in the extension direction perpendicular to the first power signal line 1. That is, in the width direction of the first power signal line 1, the partition post 4-4 may include two fourth side surfaces 4-41 arranged opposite each other, and at least one of the fourth side surfaces 4-41 is provided with a fourth groove 4-411, for example, both fourth side surfaces 4-41 are provided with a fourth groove 4-411. Due to the presence of the fourth groove 4-411, when the first electrode layer 114 is set, the first electrode layer 114 will extend beyond the fourth groove 4-411, so that the first electrode layer 114 cannot be continuously set at the fourth side surface 4-41 of the partition post 4-4. The first electrode layer 114 is broken at the fourth groove 4-411, forming an independent first part and a second part. Therefore, the fourth groove 4-411 of the fourth side surface 4-41 of the partition post 4-4 forms the partition structure 4.

[0158] In some embodiments, such as Figure 15 , Figure 16 , Figure 17 , Figure 18 As shown, a portion of the first electrode layer 114 is located on the side of the barrier dam 100-1 away from the substrate 101. That is, a portion of the first electrode layer 114 can be located on the upper surface of the barrier dam 100-1.

[0159] In some embodiments, a method for manufacturing a display panel 100 is provided, including (refer to...) Figure 5 , Figure 6 , Figure 7 , Figure 8 , Figure 9):

[0160] S1. A first metal layer 108 is formed on the substrate 101. The first metal layer 108 includes a first power signal line 1 located in the peripheral region BB.

[0161] For example, the first power signal line 1 can be used to transmit power signals. In order to ensure the stability of the power signal, the first power signal line 1 can be thicker (the first power signal line 1 has a larger dimension in its width direction). In order to reduce the width of the peripheral area BB, a portion of the first power signal line 1 in its width direction can be disposed below the subsequently formed barrier dam 100-1.

[0162] S2. A barrier dam 100-1 is formed on the substrate 101. The barrier dam 100-1 is located in the peripheral area BB and surrounds the display area AA.

[0163] For example, the barrier 100-1 has a certain height, and there may be a gap between two adjacent barrier 100-1.

[0164] For example, a blocking dam 100-1 can be formed using a portion of the blocking dam pattern of the second flattening layer 109 and another portion of the blocking dam pattern of the pixel defining layer 111; a blocking dam 100-1 can also be formed using only the blocking dam pattern of the pixel defining layer 111; or a blocking dam 100-1 can be formed using a portion of the blocking dam pattern of the first flattening layer 107, a portion of the blocking dam pattern of the second flattening layer 109, and a portion of the blocking dam pattern of the pixel defining layer 111. This disclosure is not intended to limit the scope of the invention.

[0165] S3. A first electrode thin film and a first inorganic thin film are sequentially formed on the side of the first metal layer 108 away from the substrate 101;

[0166] For example, the first electrode film and the first inorganic film are integrally formed, that is, the first electrode film and the first inorganic film are sequentially formed on the substrate 101, without the need to pattern the first electrode film and the first inorganic film.

[0167] S4. Etch the first inorganic thin film and the first electrode thin film to form the first inorganic layer 115-1 and the first electrode layer 114. The first electrode layer 114 extends to the peripheral area BB and is electrically connected to the first power signal line 1. The boundary of the first inorganic layer 115-1 and the boundary of the first electrode layer 114 are located on the side of the barrier dam 100-1 near the display area AA, and the boundary of the first inorganic layer 115-1 is flush with or approximately flush with the boundary of the first electrode layer 114.

[0168] For example, the first electrode thin film and the first inorganic thin film are patterned to form the first electrode layer 114 and the first inorganic layer 115-1, respectively.

[0169] For example, the formed first electrode layer 114 extends from the display area AA to the peripheral area BB and is connected to the first power signal line 1 of the first metal layer 108 on the side of the first electrode layer 114 near the substrate 101. A second planarization layer 109 may be disposed between the first electrode layer 114 and the first metal layer 108. The second planarization layer 109 is used to separate the first metal layer 108 and the first electrode layer 114 to prevent short circuits. For example, the second planarization layer 109 can shield the GOA circuit of the first metal layer 108. The first electrode layer 114 is formed above the portion of the second planarization layer 109 that shields the GOA circuit of the first metal layer 108, preventing the first electrode layer 114 from contacting the GOA circuit and short-circuiting. The first electrode layer 114 can be connected to the first power signal line 1 of the first metal layer 108 through a via penetrating the second planarization layer 109.

[0170] For example, the first inorganic layer 115-1 can be used as a mask to etch the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA, thereby forming the first electrode layer 114.

[0171] Specifically, after forming a first electrode film and a first inorganic film sequentially on the side of the first metal layer 108 away from the substrate 101, photoresist is disposed on the side of the first inorganic film away from the substrate 101. After exposing and developing the photoresist, the photoresist exposes the portion of the first inorganic film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA. The exposed portion of the first inorganic film is etched to form a first inorganic layer 115-1. Then, using the formed first inorganic layer 115-1 as a mask, the portion of the first electrode film exposed by the first inorganic layer 115-1 is etched to form a first electrode layer 114.

[0172] The boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1 are both located on the side of the barrier dam 100-1 near the display area AA, and the boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1 are flush or approximately flush.

[0173] S5. A first organic layer 115-2 and a second inorganic layer 115-3 are sequentially formed on the side of the first inorganic layer 115-1 away from the substrate 101.

[0174] For example, the first inorganic layer 115-1, the first organic layer 115-2, and the second inorganic layer 115-3 can form the encapsulation structure 115 of the display panel 100.

[0175] For example, the barrier dam 100-1 can be used to block the overflow of the relevant organic layer (e.g., the first organic layer 115-2) during the preparation process. Therefore, the boundary of the first organic layer 115-2 can be located on the side of the barrier dam 100-1 close to the display area AA.

[0176] For example, the second inorganic layer 115-3 can be the film layer furthest from the substrate 101 in the encapsulation structure 115. To achieve the encapsulation function of the encapsulation structure 115 and ensure the flatness of the display panel 100, the second inorganic layer 115-3 can be a single layer. The second inorganic layer 115-3 is in contact with the upper surface of the barrier dam 100-1, and the boundary of the second inorganic layer 115-3 can be located on the side of the barrier dam 100-1 away from the display area AA. That is, the second inorganic layer 115-3 covers the display area AA and the peripheral area BB of the display panel 100. The inorganic material of the second inorganic layer 115-3 can better prevent moisture and oxygen from the external environment from entering the display panel 100.

[0177] By using the first inorganic thin film as a temporary encapsulation structure for the first electrode thin film, it is possible to avoid contact between the first electrode thin film and the developing solution used to develop the photoresist during the fabrication process. At the same time, by using the portion of the first inorganic layer 115-1 that has been etched away from the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA as a mask, it is possible to avoid using the developing solution when forming the first electrode layer 114. This prevents the developing solution from spreading along the boundary of the formed first electrode layer 114 towards the display area AA of the display panel 100, thus avoiding affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108; or affecting the connection between the first electrode layer 114 and the transition pattern 3 of the second electrode layer 110, thereby affecting the connection between the first electrode layer 114 and the first power signal line 1 of the first metal layer 108.

[0178] Furthermore, the first electrode film can be deposited as a whole layer using a vapor deposition process. Then, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA are etched away, so that the first electrode layer 114 is located on the side of the barrier dam 100-1 closer to the display area AA. During this process, the etching range of the first electrode film can be precisely controlled. That is, the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA can be etched away as needed. There is no need to consider the redundant distance X caused by the manufacturing tolerance of the vapor deposition process. The redundant distance X between the boundary of the first electrode layer 114 and the barrier dam 100-1 can be eliminated, realizing the design of narrow bezel or ultra-narrow bezel.

[0179] In some embodiments, S4, etching the first inorganic thin film and the first electrode thin film to form the first inorganic layer 115-1 and the first electrode layer 114, may include (see reference) Figure 5 , Figure 6 , Figure 7 ):

[0180] S4.1, Etching the first inorganic thin film to form the first inorganic layer 115-1;

[0181] For example, photoresist can be disposed on the side of the first inorganic thin film away from the substrate 101. After the photoresist is exposed and developed, the photoresist exposes the portion of the first inorganic thin film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA. The exposed portion of the first inorganic thin film is etched to form the first inorganic layer 115-1.

[0182] S4.2 Using the first inorganic layer 115-1 as a mask, etch the portion of the first electrode film not covered by the first inorganic layer 115-1 to form the first electrode layer 114.

[0183] For example, the first inorganic layer 115-1 can be used as a mask to etch the portion of the first electrode film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA, thereby forming the first electrode layer 114. That is, the portion of the first electrode film exposed by the first inorganic layer 115-1 can be etched to form the first electrode layer 114.

[0184] The boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1 are both located on the side of the barrier dam 100-1 near the display area AA, and the boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1 are flush or approximately flush.

[0185] Alternatively, in some embodiments, S4, etching the first inorganic thin film and the first electrode thin film to form the first inorganic layer 115-1 and the first electrode layer 114, may include (refer to...) Figure 8 ):

[0186] S4-1, the first organic layer 115-2 is formed before etching the first inorganic thin film and the first electrode thin film.

[0187] For example, in step S3, after the first electrode film and the first inorganic film are formed sequentially on the side of the first metal layer 108 away from the substrate 101, a first organic layer 115-2 can be formed on the side of the first inorganic film away from the substrate 101. The boundary of the first organic layer 115-2 can be located on the side of the barrier dam 100-1 close to the display area AA.

[0188] S4-2. Using the first organic layer 115-2 as a mask, etch the first inorganic thin film and the first electrode thin film to form the first inorganic layer 115-1 and the first electrode layer 114.

[0189] For example, the first organic layer 115-2 can be used as a mask to etch the portions of the first inorganic thin film and the first electrode thin film located on the barrier dam 100-1 and the portions of the barrier dam 100-1 located away from the display area AA. That is, the portions of the first inorganic thin film and the first electrode thin film not covered by the first organic layer 115-2 are etched to form the first inorganic layer 115-1 and the first electrode layer 114, respectively.

[0190] The boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1 are both located on the side of the barrier dam 100-1 near the display area AA, and the boundary of the first electrode layer 114 and the boundary of the first inorganic layer 115-1 are flush or approximately flush.

[0191] In some embodiments, S4, etching the first inorganic thin film and the first electrode thin film to form the first inorganic layer 115-1 and the first electrode layer 114, may include (see reference) Figure 9 ):

[0192] S41. A second organic layer 115-5 is formed on the side of the first inorganic thin film away from the substrate 101, and the boundary of the second organic layer 115-5 is located on the side of the barrier dam 100-1 near the display area AA.

[0193] For example, in step S3, after the first electrode film and the first inorganic film are sequentially formed on the side of the first metal layer 108 away from the substrate 101, a second organic layer 115-5 can be formed on the side of the first inorganic film away from the substrate 101. The material of the second organic layer 115-5 can be an organic material. The barrier dam 100-1 can be used to block the overflow of the relevant organic layer (e.g., the second organic layer 115-5) during the preparation process. Therefore, the boundary of the second organic layer 115-5 can be located on the side of the barrier dam 100-1 close to the display area AA.

[0194] S42. Using the second organic layer 115-5 as a mask, etch the first inorganic thin film and the first electrode thin film to form the first inorganic layer 115-1 and the first electrode layer 114.

[0195] For example, the second organic layer 115-5 can be used as a mask to etch the portions of the first inorganic thin film and the first electrode thin film located on the barrier dam 100-1 and the portions of the barrier dam 100-1 located away from the display area AA, thereby forming the first inorganic layer 115-1 and the first electrode layer 114, respectively.

[0196] Specifically, the second organic layer 115-5 can be used as a mask to etch the portion of the first inorganic thin film exposed by the second organic layer 115-5, that is, to etch the portion of the first inorganic thin film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA, to form the first inorganic layer 115-1; and the portion of the first electrode thin film exposed by the formed first inorganic layer 115-1 can be etched, that is, to etch the portion of the first electrode thin film located on the barrier dam 100-1 and the portion of the barrier dam 100-1 located away from the display area AA, to form the first electrode layer 114.

[0197] The boundaries of the first electrode layer 114, the first inorganic layer 115-1, and the second organic layer 115-5 formed therefrom are all located on the side of the barrier dam 100-1 near the display area AA, and the boundaries of the first electrode layer 114, the first inorganic layer 115-1, and the second organic layer 115-5 are flush or approximately flush.

[0198] In some embodiments, S1, a first metal layer 108 is formed on the substrate 101. The first metal layer 108 includes a first power signal line 1 located in the peripheral region BB, which may include (refer to...) Figure 10 ):

[0199] S1.1, Etch the first power signal line 1 to form the first part 1-1, the first part 1-1 is located on the side of the barrier dam 100-1 near the display area AA.

[0200] For example, the first power signal line 1 can be patterned to form a first portion 1-1 of the first power signal. The first portion 1-1 is located only on the side of the barrier 100-1 near the display area AA.

[0201] S1.2 A first groove 4-1 is formed on the first side 1-11 of the first part 1-1 away from the display area AA, and the first groove 4-1 forms a partition structure 4.

[0202] For example, the first portion 1-1 of the first power signal line 1 can be patterned, that is, a first groove 4-1 is formed on the first side surface 1-11 of the first portion 1-1 away from the display area AA, and the first groove 4-1 is recessed inward relative to the first side surface 1-11. The material of the first power signal line 1 can be, for example, a titanium-aluminum-titanium structure. Therefore, the first groove 4-1 can be formed on the first side surface 1-11 of the first power signal line 1 using dry etching, wet etching, or other processes.

[0203] The first groove 4-1 can form a partition structure 4, so that the first electrode layer 114 formed subsequently can be disconnected at the position of the first groove 4-1, effectively improving the encapsulation effect of the display panel 100.

[0204] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0205] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A display panel, characterized in that, Includes the display area and the surrounding area of ​​the display area; The display panel includes: Substrate; A barrier dam is disposed on the substrate, the barrier dam being located in the peripheral area and surrounding the display area; A first metal layer is disposed on the substrate, and the first metal layer includes a first power signal line located in the peripheral region; A first electrode layer is disposed on the side of the first metal layer away from the substrate. The first electrode layer extends to the peripheral area and is electrically connected to the first power signal line. The boundary of the first electrode layer is located on the side of the barrier dam closer to the display area. An encapsulation structure is disposed on the side of the first electrode layer away from the substrate. The encapsulation structure includes a first inorganic layer, a first organic layer, and a second inorganic layer stacked in a direction away from the substrate. The boundary of the first inorganic layer is flush with or substantially flush with the boundary of the first electrode layer.

2. The display panel according to claim 1, characterized in that, The second inorganic layer is in contact with the upper surface of the barrier dam, and the boundary of the second inorganic layer is located on the side of the barrier dam away from the display area.

3. The display panel according to claim 2, characterized in that, The boundary of the first organic layer is flush with or approximately flush with the boundary of the first electrode layer.

4. The display panel according to claim 1, characterized in that, It also includes a third inorganic layer disposed between the first inorganic layer and the first organic layer, wherein the third inorganic layer is in contact with the upper surface of the barrier dam, and the boundary of the third inorganic layer is located on the side of the barrier dam away from the display area.

5. The display panel according to claim 4, characterized in that, It also includes a second organic layer disposed between the first inorganic layer and the third inorganic layer, wherein the boundary of the second organic layer is flush with or substantially flush with the boundary of the first electrode layer.

6. The display panel according to any one of claims 1 to 5, characterized in that, It also includes a partition structure disposed on the side of the barrier dam near the display area, wherein the first electrode layer is disconnected at the partition structure.

7. The display panel according to claim 6, characterized in that, The first power signal line includes a first portion, which is located on the side of the barrier closer to the display area; The first part includes a first side surface away from the display area, the first side surface being provided with a first groove, the first groove forming the partition structure.

8. The display panel according to claim 7, characterized in that, The first power signal line also includes a second portion, which is located on the side of the barrier dam closer to the substrate; The second part includes a second side surface near the display area, the second side surface being located on the side of the barrier dam near the display area; The second side is provided with a second groove, which forms the partition structure.

9. The display panel according to claim 8, characterized in that, The first power signal line further includes at least one third portion, the at least one third portion being located between the first portion and the second portion; The third part includes two third side surfaces arranged opposite to each other in the extension direction perpendicular to the first power signal line, and at least one of the third side surfaces is provided with a third groove, the third groove forming the partition structure.

10. The display panel according to any one of claims 7 to 9, characterized in that, It also includes, A second electrode layer is disposed between the first metal layer and the first electrode layer. The second electrode layer includes a transition pattern located in the peripheral area. The first electrode layer is electrically connected to the first power signal line through the transition pattern. A partition post is disposed on the side of the second electrode layer away from the substrate and located in the peripheral region; the partition post forms the partition structure.

11. The display panel according to claim 10, characterized in that, The partition post includes two fourth side surfaces disposed opposite each other in a direction perpendicular to the extension of the first power signal line, and at least one of the fourth side surfaces is provided with a fourth groove, the fourth groove being used to disconnect the first electrode layer at the fourth groove.

12. A display panel, characterized in that, Includes the display area and the surrounding area of ​​the display area; The display panel includes: Substrate; A barrier dam is disposed on the substrate, the barrier dam being located in the peripheral area and surrounding the display area; A first metal layer is disposed on the substrate, and the first metal layer includes a first power signal line located in the peripheral region; A first electrode layer is disposed on the side of the first metal layer away from the substrate, and the first electrode layer extends to the peripheral area and is electrically connected to the first power signal line; A partition structure is provided on the side of the barrier dam near the display area, and the first electrode layer is disconnected at the partition structure.

13. The display panel according to claim 12, characterized in that, The first power signal line includes a first portion, which is located on the side of the barrier closer to the display area; The first part includes a first side surface away from the display area, the first side surface being provided with a first groove, the first groove forming the partition structure.

14. The display panel according to claim 13, characterized in that, The first power signal line also includes a second portion, which is located on the side of the barrier dam closer to the substrate; The second part includes a second side surface near the display area, the second side surface being located on the side of the barrier dam near the display area; The second side is provided with a second groove, which forms the partition structure.

15. The display panel according to claim 14, characterized in that, The first power signal line further includes at least one third portion, the at least one third portion being located between the first portion and the second portion; The third part includes two third side surfaces arranged opposite to each other in the extension direction perpendicular to the first power signal line, and at least one of the third side surfaces is provided with a third groove, the third groove forming the partition structure.

16. The display panel according to any one of claims 12 to 15, characterized in that, Also includes: A second electrode layer is disposed between the first metal layer and the first electrode layer. The second electrode layer includes a transition pattern located in the peripheral area. The first electrode layer is electrically connected to the first power signal line through the transition pattern. A partition post is disposed on the side of the second electrode layer away from the substrate and located in the peripheral region; the partition post forms the partition structure.

17. The display panel according to any one of claims 12 to 15, characterized in that, A portion of the first electrode layer is located on the side of the barrier dam away from the substrate.

18. A display device, characterized in that, include: The display panel as described in any one of claims 1 to 17; The driver chip connected to the display panel.

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