Chip pin leading-out structure and liquid crystal writing device
By using multiple rows of staggered arc-shaped FPC pads to connect the LCD driver chip pins in the LCD writing device, the short circuit problem of the pads was solved and the production cost was reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SHANDONG LANBEI YISHU INFORMATION TECH CO LTD
- Filing Date
- 2025-04-22
- Publication Date
- 2026-05-12
AI Technical Summary
In existing LCD writing devices, the pins of the LCD driver chip are prone to short circuits when connected to the FPC pads, and the existing packaging method increases production costs.
The FPC pads are arranged in multiple rows of arcs, with each row of pads staggered. The chip pins are connected to the pads in sequence to avoid short circuits. The chip pins are led out through the FPC pads, eliminating the need for hard packaging.
The increased pad spacing prevents short circuits, reduces production costs, ensures reliable connections, and lowers product manufacturing costs.
Smart Images
Figure CN224233907U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of liquid crystal writing technology, and in particular to a chip pin lead-out structure and a liquid crystal writing device. Background Technology
[0002] The statements in this section are merely background information related to this utility model and do not necessarily constitute prior art.
[0003] To achieve the partial erasure function of a liquid crystal writing device, existing technology divides the upper and lower ITO conductive layers of the liquid crystal writing device into multiple mutually insulated strip-shaped conductive regions. By applying different voltages to each conductive region, a voltage difference is formed between the upper and lower conductive regions to achieve partial erasure.
[0004] In existing technologies, liquid crystal driver chips (such as STN liquid crystal driver chips or VFD driver chips) are typically used to apply different voltages to each conductive area. Since the pins of liquid crystal driver chips are very dense, and most existing FPC pads are arranged in a single row in a straight line, if the pins are directly connected to the FPC pads, short circuits often occur because the gaps between the pads are too small.
[0005] Therefore, existing technologies require packaging the liquid crystal driver chip, placing the packaged chip on an FPC, and then connecting it to the various conductive areas of the upper and lower ITO conductive layers via the FPC. Alternatively, COF (Chip-on-Flush) technology can be used to connect the pins of the liquid crystal driver chip to the various conductive areas of the upper and lower ITO conductive layers. However, both of these methods require packaging the liquid crystal driver chip, and COF fixtures are expensive and have a high unit price, which greatly increases the production cost of the product. Utility Model Content
[0006] To address the aforementioned issues, this invention proposes a chip pin lead-out structure and a liquid crystal writing device. It features multiple rows of arc-shaped FPC pads, with each row staggered. Chip pins are sequentially wire-bonded to each pad, increasing the spacing between the FPC pads and preventing short circuits caused by insufficient spacing. Furthermore, it eliminates the need for hard packaging of the chip, allowing the chip pins to be led out directly through the FPC pads.
[0007] In some implementations, the following technical solutions are adopted:
[0008] A chip pin lead-out structure includes: a chip to be led out and an FPC circuit board. The FPC circuit board includes a first end and a second end, wherein the second end is provided with at least two rows of pads arranged in an arc shape, and the pads arranged in the arc shape are staggered with each other.
[0009] As a further solution, the second end is provided with two rows of pads arranged in an arc. The pins of the chip to be led out are sequentially wired to each pad in the arc direction, and adjacent pins are respectively connected to pads on different arc rows.
[0010] Alternatively, the second end has three rows of pads arranged in an arc. The pins of the chip to be led out are sequentially wired to each pad in the arc direction, and three adjacent pins are respectively connected to pads on different arc rows.
[0011] As a further solution, the pins of the chip to be brought out are connected to the corresponding pads on the FPC circuit board by wire bonding.
[0012] As a further option, the chip to be brought out is a liquid crystal driver chip. The liquid crystal driver chip is either an STN liquid crystal driver chip or a VFD driver chip.
[0013] In other embodiments, the following technical solutions are adopted:
[0014] A liquid crystal writing device includes a first conductive layer, a liquid crystal layer, and a second conductive layer arranged sequentially; the first conductive layer and the second conductive layer are respectively divided into multiple mutually insulated conductive regions; characterized in that it further includes the aforementioned chip pin lead-out structure.
[0015] The pins of the liquid crystal driver chip corresponding to the first conductive layer are led out through the chip pin lead-out structure described above, and connected to the conductive area on the first conductive layer through the first end of the FPC circuit board.
[0016] The pins of the liquid crystal driver chip corresponding to the second conductive layer are led out through the chip pin lead-out structure described above, and connected to the conductive area on the second conductive layer through the first end of the FPC circuit board.
[0017] Compared with the prior art, the beneficial effects of this utility model are:
[0018] (1) By setting at least two rows of arc-shaped pads, this utility model increases the spacing between adjacent pads and avoids short circuits caused by too small gaps between pads. With the chip pin lead-out structure of this utility model, the dense pins of the chip can be led out without hard packaging of the chip, while ensuring a reliable connection between the chip and the pads, which greatly reduces the production cost of the product.
[0019] Other features and advantages of this invention will be set forth in part in the description which follows, and in part will be obvious from the description or may be learned by practice of this aspect. Attached Figure Description
[0020] Figure 1This is a schematic diagram of the pad arrangement at the second end of the FPC circuit board in Embodiment 1 of this utility model;
[0021] Figure 2 This is a schematic diagram of the connection method between the second end pad of the FPC circuit board and the chip pin in Embodiment 1 of this utility model;
[0022] Figure 3 This is a schematic diagram of the pad arrangement at the second end of the FPC circuit board in Embodiment 2 of this utility model;
[0023] Figure 4 This is a schematic diagram of the conductive regions on the first and second conductive layers in an embodiment of the present invention;
[0024] Among them, 1. First conductive layer, 2. Second conductive layer, 3. Pin of chip to be led out, 4. Pads arranged in an arc. Detailed Implementation
[0025] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used in this utility model have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.
[0026] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.
[0027] Example 1
[0028] In one or more embodiments, a chip pin lead-out structure is disclosed, specifically including: a chip to be led out (die) and an FPC circuit board. The FPC circuit board includes a first end and a second end, wherein the second end is provided with at least two rows of pads 4 arranged in an arc shape, and the pads arranged in an arc shape are staggered with each other.
[0029] To ensure effective connection between each pin of the chip to be brought out and each pad on the second end of the FPC circuit board, and to avoid short circuits caused by insufficient gaps between pads, the vertical distance between two adjacent arc-shaped rows in this embodiment can be set between 1mm and 2mm, and the horizontal distance between two adjacent pads in the same arc-shaped row can be set between 0.2mm and 0.8mm.
[0030] In this embodiment, the pads can be through-hole pads, and the pad shape is generally circular, square, or elliptical. The chip to be brought out is a liquid crystal driver chip, such as an STN liquid crystal driver chip or a VFD driver chip. The pins of the chip to be brought out are connected to the corresponding pads on the FPC circuit board by wire bonding.
[0031] Combination Figure 1 This embodiment provides a schematic diagram of a structure with two rows of arc-shaped pads at the second end. The spacing between the pads in each arc-shaped row is the same or close, and the two rows of pads are staggered. That is, the second row of pads corresponds to the gap between two adjacent pads in the first row, and the first row of pads corresponds to the gap between two adjacent pads in the second row. By setting the pads to be arc-shaped and the two rows of pads to be staggered or misaligned, the spacing between the pads can be increased without increasing the length of the FPC circuit board, ensuring that there is no crossing or overlap of leads when the chip pins are connected to the two rows of pads in sequence.
[0032] In this embodiment, the pin 3 of the chip to be brought out is sequentially connected to each pad in the arc direction, and adjacent pins are connected to pads on different arc rows respectively. Figure 2 A specific connection example is given. The pins of the chip to be brought out are connected to the two rows of pads in order from left to right (or from right to left) (the pads in the same row are indicated by the same color). The first pin is connected to the first pad of the second row, the second pin is connected to the first pad of the first row, the third pin is connected to the second pad of the second row, the fourth pin is connected to the second pad of the first row, and so on, to complete the connection between the chip pins and the pads on the FPC circuit board.
[0033] Compared to the linear arrangement of pads in the prior art, this embodiment uses two rows of arc-shaped pads to bring out all the dense pins of the chip, which can increase the spacing between adjacent pads by at least 3 times, avoiding short circuits caused by insufficient pad spacing when connecting leads, and ensuring that there is no crossing or overlap of leads when the chip pins are connected to each pad in sequence.
[0034] Example 2
[0035] In one or more embodiments, a chip pin lead-out structure is disclosed, specifically including: a chip to be led out and an FPC circuit board. The FPC circuit board includes a first end and a second end, wherein the second end is provided with at least two rows of pads 4 arranged in an arc shape, and the pads arranged in an arc shape are staggered with each other.
[0036] The difference between this embodiment and Embodiment 1 is that this embodiment uses three rows of arc-shaped pads, with each arc-shaped pad staggered relative to the others; specifically as follows... Figure 3 As shown.
[0037] The more rows of pads there are, the fewer pads there can be in each row, and the greater the spacing between adjacent pads in each row.
[0038] The connection method between pin 3 of the chip to be brought out and each pad is similar to that in Embodiment 1. Specifically, the pin of the chip to be brought out is sequentially connected to each pad in the arc direction, and three adjacent pins are connected to pads on different arc rows. For example, the pin of the chip to be brought out is connected to three rows of pads (pads in the same row are indicated by the same color) in order from left to right (or from right to left). The first pin is connected to the first pad of the third row, the second pin is connected to the first pad of the second row, the third pin is connected to the first pad of the first row, the fourth pin is connected to the second pad of the third row, the fifth pin is connected to the second pad of the second row, the sixth pin is connected to the second pad of the first row, and so on, to complete the connection between the chip pin and each pad on the FPC circuit board.
[0039] Of course, more arc-shaped rows can be set according to actual needs, such as four rows, five rows, etc.; the specific structure and connection method of the chip and pad are the same as in Example 1, and will not be described in detail again.
[0040] Example 3
[0041] In one or more embodiments, a liquid crystal writing device is disclosed, comprising a first conductive layer 1, a liquid crystal layer, and a second conductive layer 2 disposed sequentially; combined with Figure 4 The first conductive layer and the second conductive layer are respectively divided into multiple conductive regions that are mutually insulated; it also includes the chip pin lead-out structure described in Embodiment 1 or Embodiment 2.
[0042] The pins of the liquid crystal driving chip corresponding to the first conductive layer are led out through the chip pin lead-out structure described in Embodiment 1 or Embodiment 2, and connected to the conductive area on the first conductive layer through the first end of the FPC circuit board; the pins of the liquid crystal driving chip corresponding to the second conductive layer are led out through the chip pin lead-out structure described in Embodiment 1 or Embodiment 2, and connected to the conductive area on the second conductive layer through the first end of the FPC circuit board.
[0043] The LCD driver chip can be an STN LCD driver chip (such as the SDN8080 driver chip) or a VFD driver chip (such as the PT6391 driver chip or the MAX6922 driver chip).
[0044] The chip pin lead-out structure in this embodiment eliminates the need for chip packaging, greatly reducing product manufacturing costs.
[0045] Although the specific embodiments of the present utility model have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present utility model. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solution of the present utility model are still within the scope of protection of the present utility model.
Claims
1. A chip pin lead-out structure, characterized in that, include: The chip to be brought out and the FPC circuit board are provided. The FPC circuit board includes a first end and a second end. The second end is provided with at least two rows of pads arranged in an arc shape, and the pads arranged in an arc shape are staggered with each other.
2. The chip pin lead-out structure as described in claim 1, characterized in that, The second end has two rows of solder pads arranged in an arc shape.
3. The chip pin lead-out structure as described in claim 2, characterized in that, The pins of the chip to be brought out are sequentially wired to the pads on the arc direction, and adjacent pins are connected to pads on different arcs.
4. The chip pin lead-out structure as described in claim 1, characterized in that, The second end has three rows of solder pads arranged in an arc shape.
5. The chip pin lead-out structure as described in claim 4, characterized in that, The pins of the chip to be brought out are sequentially wired to the pads on the arc direction, and three adjacent pins are connected to pads on different arcs respectively.
6. A chip pin lead-out structure as described in any one of claims 1-5, characterized in that, The pins of the chip to be brought out are connected to the corresponding pads on the FPC circuit board by wire bonding.
7. A chip pin lead-out structure as described in any one of claims 1-5, characterized in that, The chip to be extracted is a liquid crystal driver chip.
8. A chip pin lead-out structure as described in claim 7, characterized in that, The liquid crystal driver chip is an STN liquid crystal driver chip or a VFD driver chip.
9. A liquid crystal writing device, comprising a first conductive layer, a liquid crystal layer, and a second conductive layer disposed sequentially; the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions; characterized in that, It also includes: the chip pin lead-out structure according to any one of claims 1-8; The pins of the liquid crystal driving chip corresponding to the first conductive layer are led out through the chip pin lead-out structure described in any one of claims 1-8, and connected to the conductive area on the first conductive layer through the first end of the FPC circuit board. The pins of the liquid crystal driving chip corresponding to the second conductive layer are led out through the chip pin lead-out structure described in any one of claims 1-8, and connected to the conductive area on the second conductive layer through the first end of the FPC circuit board.