Watchdog circuit

Abstract

The utility model discloses a watchdog circuit, which relates to the technical field of electronic circuits and comprises a watchdog chip U33, a central processing unit (CPU), an abnormal prompt circuit and an emergency braking circuit. The watchdog chip U33 comprises a VCC pin, a WD I pin, a WDO pin, a GND pin and an MR pin; 3.3 V direct current voltage is connected to the VCC pin; the WD I pin is connected with the CPU; the WDO pin is connected with the abnormity prompting circuit; the GND pin is grounded; and the MR pin is connected with the emergency braking circuit. The watchdog circuit has the beneficial effects that the square wave output of the CPU is used as the input of the watchdog circuit, so that the design of a square wave generating circuit is simplified, and the cost is saved.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and more specifically, to a watchdog circuit. Background Technology

[0002] In computer control systems, interference from external electromagnetic fields is common, causing programs to malfunction and enter infinite loops. To address this, a chip specifically designed for monitoring the operational status of the main control system—commonly known as a watchdog timer—was developed.

[0003] A watchdog timer can automatically reset and restart the main control system when the system or circuit is disturbed, thereby ensuring that the system recovers from software and hardware errors and preventing system malfunctions. However, existing watchdog circuits require many pins, are cumbersome to implement, have complex functions, consume a lot of circuit resources, and are costly.

[0004] Therefore, this utility model provides a watchdog circuit that simplifies the design of the square wave generation circuit by using the CPU's built-in square wave output as the input of the watchdog circuit, thereby saving costs. Utility Model Content

[0005] To overcome the shortcomings of the existing technology, this utility model provides a watchdog circuit that can use the square wave output of the CPU as the input of the watchdog circuit, simplifying the design of the square wave generation circuit and thus saving costs.

[0006] The technical solution adopted by this utility model to solve its technical problem is: a watchdog circuit, the improvement of which is that the watchdog circuit includes a watchdog chip U33, a CPU, an abnormality indication circuit, and an emergency braking circuit; the watchdog chip U33 includes a VCC pin, a WDI pin, a WDO pin, a GND pin, and an MR pin; the VCC pin is connected to a 3.3V DC voltage; the WDI pin is connected to the CPU; the WDO pin is connected to the abnormality indication circuit; the GND pin is grounded; and the MR pin is connected to the emergency braking circuit.

[0007] Furthermore, the abnormality indication circuit includes a light-emitting diode D1 and a resistor R1; the cathode of the light-emitting diode D1 is connected to the WDO pin of the watchdog chip U33, and the anode is connected to one end of the resistor R1; the other end of the resistor R1 is connected to a 3.3V DC voltage.

[0008] Furthermore, the abnormality indication circuit includes a buzzer and a resistor R2; the positive terminal of the buzzer is connected to one end of the resistor R2, and the negative terminal is connected to the WDO pin of the watchdog chip U33; the other end of the resistor R2 is connected to a 3.3V DC voltage.

[0009] Furthermore, the emergency braking circuit includes a brake switch, a filter circuit, and a voltage regulator circuit; one end of the brake switch is grounded, and the other end is connected to the MR pin of the watchdog chip U33; both the filter circuit and the voltage regulator circuit are connected to the MR pin of the watchdog chip U33.

[0010] Furthermore, the filter circuit includes a resistor R3 and a capacitor C1. One end of the resistor R3 is connected to a 3.3V DC voltage, and the other end is connected to the MR pin of the watchdog chip U33. The positive terminal of the capacitor C1 is connected to the MR pin of the watchdog chip U33, and the negative terminal is grounded.

[0011] Furthermore, the voltage regulator circuit includes a bidirectional Zener diode CR1, one end of which is connected to the MR pin of the watchdog chip U33, and the other end is grounded.

[0012] Furthermore, the watchdog chip U33 is model TPS3820.

[0013] The beneficial effects of this utility model are as follows: This solution uses the 32.768kHz system clock signal output by the CPU as the input square wave signal to the watchdog chip U33. The watchdog chip U33 determines whether the system is operating normally based on whether it detects the square wave signal. Furthermore, users can intuitively identify whether the system is operating normally based on the abnormality indication circuit, and use the emergency braking circuit to apply emergency braking to the system, preventing it from entering an unrecoverable state, thus facilitating subsequent system maintenance and recovery. In this process, no square wave generation circuit is designed as the input to the watchdog chip U33. Therefore, this utility model simplifies the design of the square wave generation circuit by utilizing the CPU's built-in square wave output as the input to the watchdog circuit, thereby saving costs. Attached Figure Description

[0014] Figure 1 This is a connection block diagram of a watchdog circuit according to the present invention;

[0015] Figure 2 This is a circuit connection diagram of a watchdog circuit according to the present invention. Figure 1 ;

[0016] Figure 3 This is a circuit connection diagram of a watchdog circuit according to the present invention. Figure 2 . Detailed Implementation

[0017] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0018] The following will clearly and completely describe the concept, specific structure, and technical effects of this utility model in conjunction with embodiments and accompanying drawings, so as to fully understand the purpose, features, and effects of this utility model. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are all within the scope of protection of this utility model. Furthermore, all connections / linkages involved in the patent do not simply refer to direct contact between components, but rather to the ability to form a better connection structure by adding or reducing connecting accessories according to specific implementation conditions. The various technical features in this utility model can be combined interactively without contradicting each other.

[0019] Example 1:

[0020] Reference Figure 1 and Figure 2 As shown, this utility model discloses a watchdog circuit, which includes a watchdog chip U33, a CPU, an anomaly warning circuit, and an emergency braking circuit. The watchdog chip U33 includes a VCC pin, a WDI pin, a WDO pin, a GND pin, and an MR pin. The VCC pin is connected to a 3.3V DC voltage. The WDI pin is connected to the CPU. The WDO pin is connected to the anomaly warning circuit. The GND pin is grounded. The MR pin is connected to the emergency braking circuit. The watchdog chip U33 is a TPS3820.

[0021] It should be noted that in this embodiment, the 32.768kHz system clock signal output by the CPU serves as the square wave signal detected by the watchdog circuit; the watchdog chip U33 is used to detect whether the system is operating normally; the anomaly alert circuit is used to alert the user to abnormal system operation. Specifically, the anomaly alert circuit includes a light-emitting diode (LED) D1 and a resistor R1; the cathode of the LED D1 is connected to the WDO pin of the watchdog chip U33, and the anode is connected to one end of the resistor R1. The light signal emitted by the LED D1 serves as an alert signal for abnormal system operation; that is, when the system is operating abnormally, the LED D1 lights up, and when the system is operating normally, the LED D1 does not light up; the other end of the resistor R1 is connected to a 3.3V DC voltage. The emergency braking circuit is used to brake the system's operating status. In this specific implementation, when the system is running normally, the watchdog chip U33 continuously receives the square wave signal output by the CPU within a preset time interval. When the system malfunctions, the watchdog chip U33 does not receive the square wave signal output by the CPU. At this time, the WDO pin of the watchdog chip U33 outputs a low level. Since resistor R1 is connected to a 3.3V DC voltage, the LED D1 conducts and lights up to alert the user of the system malfunction. When the user discovers a system malfunction, the emergency braking circuit can brake the abnormal operation of the system, facilitating maintenance personnel to repair and restore the system, preventing the system from entering an unrecoverable state. In the above process, no specific square wave generation circuit is designed as the input to the watchdog chip U33. Therefore, this embodiment simplifies the design of the square wave generation circuit by utilizing the CPU's built-in square wave output as the input to the watchdog circuit, thereby saving costs.

[0022] Continue to refer to Figure 1 and Figure 2 As shown, the emergency braking circuit includes a brake switch, a filter circuit, and a voltage regulator circuit. One end of the brake switch is grounded, and the other end is connected to the MR pin of the watchdog chip U33. Both the filter circuit and the voltage regulator circuit are connected to the MR pin of the watchdog chip U33. The filter circuit includes a resistor R3 and a capacitor C1. One end of the resistor R3 is connected to a 3.3V DC voltage, and the other end is connected to the MR pin of the watchdog chip U33. The positive terminal of the capacitor C1 is connected to the MR pin of the watchdog chip U33, and the negative terminal is grounded. The voltage regulator circuit includes a bidirectional Zener diode CR1. One end of the bidirectional Zener diode CR1 is connected to the MR pin of the watchdog chip U33, and the other end is grounded.

[0023] It should be noted that in this embodiment, when the user discovers that the system is running abnormally, he presses the brake switch. At this time, the brake switch sends a brake signal to the MR pin of the watchdog chip U33 through the user's braking operation to brake the abnormal operation of the system. The filtering circuit can ensure that the braking signal is clean and noise-free, avoiding false triggering caused by electrical noise. The voltage regulator circuit ensures that the voltage of the MR pin of the watchdog chip U33 is kept within a safe range, preventing false operation caused by voltage fluctuations.

[0024] Example 2:

[0025] Reference Figure 1 and Figure 3 As shown, this utility model discloses a watchdog circuit, which includes a watchdog chip U33, a CPU, an anomaly warning circuit, and an emergency braking circuit. The watchdog chip U33 includes a VCC pin, a WDI pin, a WDO pin, a GND pin, and an MR pin. The VCC pin is connected to a 3.3V DC voltage. The WDI pin is connected to the CPU. The WDO pin is connected to the anomaly warning circuit. The GND pin is grounded. The MR pin is connected to the emergency braking circuit. The watchdog chip U33 is a TPS3820.

[0026] It should be noted that in this embodiment, the 32.768kHz system clock signal output by the CPU serves as the square wave signal detected by the watchdog circuit; the watchdog chip U33 is used to detect whether the system is operating normally; the anomaly alert circuit is used to alert the user to abnormal system operation. Specifically, the anomaly alert circuit includes a buzzer and a resistor R2; the positive terminal of the buzzer is connected to one end of the resistor R2, and the negative terminal is connected to the WDO pin of the watchdog chip U33; the other end of the resistor R2 is connected to a 3.3V DC voltage; wherein, the sound signal emitted by the buzzer serves as the alert signal for abnormal system operation, that is, the buzzer will sound when the system is operating abnormally, and will not sound when the system is operating normally; the other end of the resistor R1 is connected to a 3.3V DC voltage. A 3V DC voltage is used; the emergency braking circuit is used to brake the system's operating state in an emergency. In the specific implementation of this utility model, when the system is running normally, the watchdog chip U33 will continuously receive the square wave signal output by the CPU within a preset time interval. When the system is running abnormally, the watchdog chip U33 will not receive the square wave signal output by the CPU. At this time, the level output of the WDO pin of the watchdog chip U33 will be low. Since the resistor R1 is connected to a 3.3V DC voltage, the buzzer will be turned on and emit a sound to alert the user of the abnormal system operation. When the user discovers the abnormal system operation, the emergency braking circuit can brake the abnormal operation of the system, so that maintenance personnel can repair and restore the system and prevent the system from entering an unrecoverable state. In the above process, no specific square wave generation circuit is designed as the input of the watchdog chip U33. Therefore, this embodiment can simplify the design of the square wave generation circuit by using the square wave output of the CPU as the input of the watchdog circuit, thereby saving costs.

[0027] Continue to refer to Figure 1 and Figure 3 As shown, the emergency braking circuit includes a brake switch, a filter circuit, and a voltage regulator circuit. One end of the brake switch is grounded, and the other end is connected to the MR pin of the watchdog chip U33. Both the filter circuit and the voltage regulator circuit are connected to the MR pin of the watchdog chip U33. The filter circuit includes a resistor R3 and a capacitor C1. One end of the resistor R3 is connected to a 3.3V DC voltage, and the other end is connected to the MR pin of the watchdog chip U33. The positive terminal of the capacitor C1 is connected to the MR pin of the watchdog chip U33, and the negative terminal is grounded. The voltage regulator circuit includes a bidirectional Zener diode CR1. One end of the bidirectional Zener diode CR1 is connected to the MR pin of the watchdog chip U33, and the other end is grounded.

[0028] It should be noted that in this embodiment, when the user discovers that the system is running abnormally, he presses the brake switch. At this time, the brake switch sends a brake signal to the MR pin of the watchdog chip U33 through the user's braking operation to brake the abnormal operation of the system. The filtering circuit can ensure that the braking signal is clean and noise-free, avoiding false triggering caused by electrical noise. The voltage regulator circuit ensures that the voltage of the MR pin of the watchdog chip U33 is kept within a safe range, preventing false operation caused by voltage fluctuations.

[0029] The above is a detailed description of the preferred embodiments of the present utility model. However, the present utility model is not limited to the described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present utility model. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A watchdog circuit, characterized in that, The watchdog circuit includes a watchdog chip U33, a CPU, an anomaly warning circuit, and an emergency braking circuit. The watchdog chip U33 includes a VCC pin, a WD I pin, a WDO pin, a GND pin, and an MR pin. The VCC pin is connected to a 3.3V DC voltage. The WD I pin is connected to the CPU. The WDO pin is connected to the anomaly warning circuit. The GND pin is grounded. The MR pin is connected to the emergency braking circuit.

2. A watchdog circuit according to claim 1, characterized in that, The abnormality indication circuit includes a light-emitting diode D1 and a resistor R1; the cathode of the light-emitting diode D1 is connected to the WDO pin of the watchdog chip U33, and the anode is connected to one end of the resistor R1; the other end of the resistor R1 is connected to a 3.3V DC voltage.

3. A watchdog circuit according to claim 1, characterized in that, The abnormality indication circuit includes a buzzer and a resistor R2; the positive terminal of the buzzer is connected to one end of the resistor R2, and the negative terminal is connected to the WDO pin of the watchdog chip U33; the other end of the resistor R2 is connected to a 3.3V DC voltage.

4. A watchdog circuit according to claim 1, characterized in that, The emergency braking circuit includes a brake switch, a filter circuit, and a voltage regulator circuit; one end of the brake switch is grounded, and the other end is connected to the MR pin of the watchdog chip U33; both the filter circuit and the voltage regulator circuit are connected to the MR pin of the watchdog chip U33.

5. A watchdog circuit according to claim 4, characterized in that, The filter circuit includes a resistor R3 and a capacitor C1. One end of the resistor R3 is connected to a 3.3V DC voltage, and the other end is connected to the MR pin of the watchdog chip U33. The positive terminal of the capacitor C1 is connected to the MR pin of the watchdog chip U33, and the negative terminal is grounded.

6. A watchdog circuit according to claim 4, characterized in that, The voltage regulator circuit includes a bidirectional Zener diode CR1, one end of which is connected to the MR pin of the watchdog chip U33, and the other end is grounded.

7. A watchdog circuit according to claim 1, characterized in that, The watchdog chip U33 is model TPS3820.

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