Integrated circuit cooling system
By using a liquid cooling structure with multiple impact openings and valves in integrated circuits to dynamically adjust the coolant flow rate, the problem that traditional cooling structures cannot effectively control the temperature of the active area not directly below the inlet is solved, achieving more efficient heat management and reducing failure points.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
- Filing Date
- 2025-04-21
- Publication Date
- 2026-05-22
Smart Images
Figure CN224267258U_ABST
Abstract
Description
Technical Field
[0001] Some embodiments of this utility model relate to integrated circuit cooling systems. Background Technology
[0002] In integrated circuits, inefficiencies and resistance within semiconductor devices cause some energy to be released as heat. The accumulated heat within integrated circuits can lead to increased resistance and power demands, threshold voltage shifts in transistor operation, and potential failures of circuit components. In recent years, various methods have been developed for cooling integrated devices, including using heat sinks, fans, and liquid cooling systems to remove heat from the integrated device. Utility Model Content
[0003] Some embodiments of this utility model provide an integrated circuit cooling system. The integrated circuit cooling system includes an impact coolant block, an inlet opening, multiple pipes, multiple valves, multiple impact openings, and an outlet opening. The impact coolant block is coated on a semiconductor die. The inlet opening is located within the impact coolant block and coupled to an inlet. The pipes extend directly below the inlet opening in a first direction and have multiple first ends and multiple second ends. The pipes are centered on multiple first axes. The valves couple the first ends of the pipes to the inlet opening. The impact openings are located within the impact coolant block and surround the second ends of the pipes. The impact openings are centered on the first axes. The outlet opening is located within the impact coolant block and between the inlet opening and the impact openings, physically coupling the impact openings to an outlet.
[0004] In some embodiments, the impact coolant block has an intermediate coolant block layer, an inlet opening is separated from an outlet opening by the intermediate coolant block layer, and valves are distributed throughout the intermediate coolant block layer.
[0005] In some embodiments, the semiconductor die is separated from the impact coolant block by a thermal interface material, wherein the thermal interface material contacts both the semiconductor die and the impact coolant block.
[0006] In some embodiments, a plurality of outer sidewalls of the outlet opening extend along a second direction perpendicular to the first direction through a plurality of outer sidewalls of the inlet opening.
[0007] In some embodiments, the conduits and impact openings are distributed in a grid pattern perpendicular to a first direction, such that the impact openings are arranged in multiple rows and columns, extending across an upper surface of a semiconductor die.
[0008] In some embodiments, the semiconductor die includes a first region containing a higher concentration of high-power devices than a second region of the semiconductor die, and wherein impact openings are distributed such that a third region of the impact coolant block directly above the first region has a higher concentration of impact openings than a fourth region of the impact coolant block directly above the second region.
[0009] In some embodiments, the semiconductor die includes a fifth region separated from the first region and containing a higher concentration of high-power devices than a second region of the semiconductor die, wherein the impact openings are distributed such that a sixth region of the impact coolant block located directly above the fifth region has a higher concentration of impact openings than the fourth region.
[0010] In some embodiments, the integrated circuit cooling system further includes a second semiconductor die. The second semiconductor die is located directly below the impact coolant block, and the semiconductor die and the second semiconductor die include a plurality of single-wafer system-in-one devices. The second semiconductor die includes a fifth region separated from the first region and containing a higher concentration of high-power devices than the second region of the semiconductor die, and the impact openings are distributed such that a sixth region of the impact coolant block, located directly above the fifth region of the second semiconductor die, has a higher concentration of impact openings than the fourth region.
[0011] In some embodiments, the integrated circuit cooling system further includes a high-bandwidth memory die. The high-bandwidth memory die is located directly below the impact coolant block. The impact openings are distributed such that a seventh region of the impact coolant block directly above the high-bandwidth memory die has a higher concentration of impact openings than a fourth region.
[0012] Some embodiments of this utility model provide an integrated circuit cooling system. The integrated circuit cooling system includes an impact coolant block, an inlet opening, a conduit, an impact opening, and an outlet opening. The impact coolant block is coated on a semiconductor die. The inlet opening is located within the impact coolant block and coupled to an inlet. The conduit extends in a first direction below the inlet opening and has a first end and a second end extending between a plurality of first internal sidewalls, wherein the first end faces the inlet opening and the second end faces the semiconductor die. The impact opening is located within the impact coolant block and has a plurality of second internal sidewalls surrounding and concentric with the first internal sidewalls of the conduit. The outlet opening is located within the impact coolant block and between the inlet opening and the impact opening, wherein the outlet opening physically couples the impact opening to an outlet.
[0013] Some embodiments of this utility model provide a method for forming an integrated circuit cooling system. The method includes forming a coolant bulk substrate over a semiconductor die; etching an outlet opening and a plurality of impact openings into the coolant bulk substrate; and filling the outlet opening and impact openings with a first sacrificial layer. The method also includes etching the first sacrificial layer to form a plurality of conduit openings within the first sacrificial layer, the conduit openings extending to the impact openings. The method further includes forming a plurality of conduits within the conduit openings; filling the conduits with a second sacrificial layer; forming a plurality of valves covering the conduits and the second sacrificial layer; forming a third sacrificial layer covering the valves; and forming an upper coolant bulk structure surrounding the third sacrificial layer. The method further includes performing isotropic etching to remove the third sacrificial layer, the second sacrificial layer, and the first sacrificial layer from the coolant bulk substrate and the upper coolant bulk structure, thereby removing the filler of the inlet opening, outlet opening, and impact openings. Attached Figure Description
[0014] The various aspects of this utility model can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, based on standard industry practice, the various features are not shown to scale. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of discussion.
[0015] Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 1E , Figure 1F Cross-sectional and top views of some embodiments of a liquid cooling system with multiple openings are shown, with the openings guiding a coolant at specific regions of a semiconductor die.
[0016] Figure 2A , Figure 2B , Figure 2C , Figure 2D A top view of some embodiments of a liquid cooling system with multiple openings is shown, wherein the openings guide a coolant at specific regions of a semiconductor die, and a larger volume of the openings is located above hot spots of the semiconductor die.
[0017] Figure 3A , Figure 3B , Figure 3C , Figure 3D A top view of some embodiments of a liquid cooling system with multiple openings is shown, wherein the openings guide a coolant at specific regions of a semiconductor die, and the majority volume of the openings is located above multiple hot spots of the semiconductor die.
[0018] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E Top and cross-sectional views of some embodiments of a liquid cooling system with multiple openings are shown, wherein the openings guide a coolant at specific regions of multiple semiconductor grains, and the majority volume of the openings is located above hot spots of the semiconductor grains.
[0019] Figure 5 , Figure 6 , Figure 7A , Figure 7B , Figures 8 to 12 , Figure 13A , Figure 13B , Figure 14A , Figure 14B A series of cross-sectional views illustrate some embodiments of a method for forming a liquid cooling system with multiple openings, wherein the openings use multiple valves to guide a coolant at a specific region of a semiconductor die.
[0020] Figure 15 A flowchart illustrating a method for forming a liquid cooling system having multiple openings, wherein the openings use multiple valves to guide a coolant at a specific region of a semiconductor die.
[0021] The reference numerals in the attached figures are explained as follows:
[0022] 100a: Sectional View
[0023] 100b: Sectional View
[0024] 100c: Sectional View
[0025] 100d: Sectional View
[0026] 100e: Sectional View
[0027] 100f: Sectional View
[0028] 102: Coolant containment structure
[0029] 103: Impact Cooling Block
[0030] 104: First semiconductor die
[0031] 105: Active Area
[0032] 106: Thermal interface materials
[0033] 108: Bottom Fill Layer
[0034] 109: Substrate
[0035] 110: Reinforcing component
[0036] 112: Entrance opening
[0037] 114: Entrance
[0038] 115: Coolant Controller
[0039] 116: Valve
[0040] 117: First Coolant Delivery Line
[0041] 118: Piping
[0042] 118e: Pipe end
[0043] 118s: Internal sidewall
[0044] 119: Thermal Energy
[0045] 120: Impact opening
[0046] 121: Export
[0047] 121a: First Exit
[0048] 121b: Second Exit
[0049] 122: Exit opening
[0050] 123: Horizontal plane of the first conductor
[0051] 124: First Direction
[0052] 125: Second coolant delivery line
[0053] 126: Second Direction
[0054] 127: Valve controller
[0055] 128: Third-party
[0056] 132: Central axis
[0057] 134: Line
[0058] 136: Column
[0059] 200a: Top view
[0060] 200b: Top view
[0061] 200c: Top view
[0062] 200d: Top view
[0063] 202: Area 1
[0064] 204: Second Zone
[0065] 300a: Top view
[0066] 300b: Top view
[0067] 300c: Top view
[0068] 300d: Top View
[0069] 302: Third Zone
[0070] 304: Area 4
[0071] 400a: Top view
[0072] 400b: Top view
[0073] 400c: Top view
[0074] 400d: Top view
[0075] 400e: Sectional View
[0076] 402: Second semiconductor die
[0077] 403: Second Active Region
[0078] 404: Third semiconductor die
[0079] 405: Third Active Region
[0080] 406: Fourth semiconductor die
[0081] 407: Fourth Active Region
[0082] 408: Fifth District
[0083] 410: High-bandwidth memory chip
[0084] 412: Conductive bump
[0085] 414: Intermediate substrate
[0086] 500: Sectional View
[0087] 600: Sectional View
[0088] 602: Coolant block base
[0089] 700a: Sectional View
[0090] 700b: Sectional View
[0091] 702: First Sacrifice Layer
[0092] 800: Sectional View
[0093] 802: Third Etching
[0094] 804: Third mask layer
[0095] 806: Pipe opening
[0096] 900: Sectional View
[0097] 902: Conformal Piping Layer
[0098] 1000: Sectional View
[0099] 1002: Fourth Etching
[0100] 1004: Fourth mask layer
[0101] 1100: Sectional View
[0102] 1102: Second Sacrifice Layer
[0103] 1200: Sectional View
[0104] 1202: Intermediate coolant bulk layer
[0105] 1300a: Sectional View
[0106] 1300b: Sectional View
[0107] 1302: Upper layer of coolant block
[0108] 1304: Third Sacrifice Layer
[0109] 1306: Sidewall
[0110] 1400a: Sectional View
[0111] 1400b: Sectional View
[0112] 1402: Fifth Etching
[0113] 1500: Flowchart
[0114] 1502: Steps
[0115] 1504: Steps
[0116] 1506: Steps
[0117] 1508: Steps
[0118] 1510: Steps
[0119] 1512: Steps
[0120] 1514: Steps
[0121] 1516: Steps
[0122] 1518: Steps
[0123] 1520: Steps Detailed Implementation
[0124] This utility model provides many different embodiments or examples to implement different features of the utility model. Specific examples of components and their arrangements are described below to simplify the utility model. Of course, these are merely examples and are not intended to be limiting. For example, if this specification describes a first feature formed above or on a second feature, it indicates that embodiments may include situations where the first and second features are in direct contact, or embodiments where an additional feature is formed between the first and second features such that the first feature may not be in direct contact with the second feature. Furthermore, in various examples, the utility model may use repeated symbols and / or letters. Such repetition is for simplification and clarity and does not imply an association between the various embodiments and / or configurations discussed.
[0125] Furthermore, the spatially related terms used in this specification, such as "below," "below," "lower," "above," "higher," etc., are for the convenience of describing the relationship between one element or feature and another element(s) in the accompanying drawings. In addition to the orientations shown in the drawings, these spatially related terms are intended to cover different orientations of the device in use or operation. The device may be turned to different orientations (rotated 90 degrees or other orientations), and the spatially related terms used herein shall be interpreted accordingly.
[0126] A liquid cooling structure includes an inlet and an outlet. The liquid cooling structure is located on or near an integrated device to more effectively transfer heat away from the integrated device. Conventional liquid cooling structures operate by introducing coolant liquid from the inlet and across the surface of the integrated device to the outlet. Excess heat from the integrated device is transferred to the coolant liquid before it flows out of the outlet and away from the integrated device, thus achieving the transfer of excess heat away. Although designs with direct flow of coolant between the inlet and outlet are easy to manufacture, coolant traveling across the surface is less effective for heat transfer than coolant directly impacting the surface, meaning that the most efficient heat transfer occurs only directly below the inlet. In some embodiments, a radiator is disposed between the integrated device and the liquid cooling structure to further distribute excess heat away from the integrated device.
[0127] With advancements in semiconductor manufacturing technology, semiconductor devices utilizing new technologies are typically fabricated more densely to reduce form factor, minimize size constraints, and increase manufacturing yield. These new technologies may also have lower tolerance for excess heat, and heat may accumulate more quickly in smaller areas. In some embodiments, conventional liquid cooling structures may be insufficient to control the temperature of the active regions of the integrated device that are not directly below the inlet, because coolant flowing across a surface is less effective for heat transfer than coolant directly impacting a surface below the inlet. Furthermore, the coolant systems described above have a static path required for the coolant and may deliver coolant to inactive areas that are not overheated. In some embodiments, the integrated device may have various active regions that generate heat at different times during operation, where conventional liquid cooling structures may not be able to completely eliminate the effects of excess heat generated in the dynamically changing active regions of the integrated device. Therefore, a liquid cooling structure that can dynamically adjust the liquid flow rate and directly impact specific regions of the integrated circuit is desired.
[0128] This invention provides a liquid cooling structure comprising multiple impingement openings and multiple valves to dynamically regulate the flow rate and volume of coolant flowing to the multiple impingement openings. The multiple impingement openings are distributed across the upper surface of an integrated device. The multiple valves are actuated to guide the liquid coolant to flow towards and impinge on a specific opening located above the active region of the integrated device. Excess heat from overheated areas is transferred to the impinging liquid, thereby reducing excess heat within the integrated device. The liquid coolant is then removed from the impingement openings, thereby transferring excess heat away from the overheated areas.
[0129] During operation, the amount of excess heat in the overheated area can inform the number of valves actuated above the overheated area. This can be based on heat measurements within the integrated unit, or it can be a status indicator, informing which areas of the integrated unit can be operated as active zones. Because the number and position of actuated valves and the flow rate of the liquid coolant can be dynamically determined during operation, the controller can determine the overheated areas of the cooling integrated unit. Furthermore, in terms of the effectiveness of transferring heat energy from the surface, coolant liquid that directly impacts the surface is more effective than the same coolant liquid flowing across the surface, resulting in a more efficient cooling system. Dynamically responding to specific overheated areas by directly impacting them with liquid coolant of adjustable volume achieves better control and efficiency in the cooling integrated unit.
[0130] Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 1E , Figure 1FCross-sectional views 100a, 100b, 100c and top views 100d, 100e, 100f show some embodiments of a liquid cooling system having multiple openings, with the openings guiding a coolant at specific regions of a semiconductor grain. Figure 1C The cross-sectional view 100c is along Figure 1A The line D-D' was obtained (please also refer to...) Figure 1D , Figure 1E , Figure 1F (Line D-D'). Figure 1D The top view 100d is along Figure 1A The line A-A' is obtained. Figure 1E The top view 100e is along Figure 1A The line B-B' was obtained. Figure 1F The top view 100f is along Figure 1A The line C-C' is obtained. The following also describes... Figure 1A And 1B.
[0131] like Figure 1A Sectional view 100a and Figure 1B As shown in cross-sectional view 100b, in a first direction 124, an impact cooling block 103 covers a first semiconductor die 104. The impact cooling block 103 includes a coolant containment structure 102, which is separated from the first semiconductor die 104 by a thermal interface material 106. In some embodiments, the first semiconductor die 104 is separated from a substrate 109 by a bottom filler layer 108. In some embodiments, a plurality of reinforcements 110 extend from the substrate 109 and surround the first semiconductor die 104 to reduce damage that may be caused by impact or drop.
[0132] The impact cooling block 103 also includes an inlet opening 112 located at the top of the impact cooling block 103. The inlet opening 112 is coupled to an inlet 114. The inlet 114 is coupled to a coolant controller 115 via a first coolant delivery line 117. During operation, the coolant controller 115 directs coolant to the inlet opening 112. A plurality of valves 116 are arranged aligned with the bottom surface of the inlet opening 112. The plurality of valves 116 are distributed along the bottom surface of the inlet opening 112 in a second direction 126 perpendicular to a first direction 124 and in a third direction 128 perpendicular to both the first direction 124 and the second direction 126. The inlet opening 112 is separated from the plurality of valves 116 by a plurality of conduits 118. In some embodiments, a first conductor horizontal plane 123 is embedded within the coolant containment structure 102 and includes a plurality of conductors coupling the plurality of valves 116 to a valve controller 127. In some embodiments, valve controller 127 is an integrated circuit coupled to and communicating with coolant controller 115 to coordinate the flow volume and number of impact openings 120 in use.
[0133] Multiple conduits 118 include internal sidewalls 118s extending to conduit ends 118e, and the conduit ends 118e couple the interior of the multiple conduits 118 to multiple impact openings 120. The multiple impact openings 120 are distributed across the lower region of the impact cooling block 103 and surround the conduit ends 118e of the multiple conduits 118. In some embodiments, the multiple conduits 118 extend along a central axis 132 in a first direction 124, and the multiple impact openings 120 are concentric with the multiple conduits 118. That is, the multiple impact openings 120 have a second central axis that coincides with the position of the central axis 132. The multiple impact openings 120 are coupled to one end of an outlet opening 122. The outlet opening 122 covers the multiple impact openings 120 and is coupled to one or more outlets 121. The one or more outlets 121 couple the outlet opening 122 to multiple second coolant delivery lines 125, and the second coolant delivery lines 125 are further coupled to a coolant controller 115.
[0134] During operation, multiple conduits 118 direct coolant to multiple impact openings 120 located in the region below the impact cooling block 103. Thermal energy 119 from the operation of the first semiconductor die 104 is conducted to the impact cooling block 103 via a thermal interface material 106. The thermal energy 119 is then transferred to the coolant, which impacts the impact cooling block 103 within the multiple impact openings 120. The continuous flow of coolant through the impact cooling block 103 pushes the coolant within the multiple impact openings 120 into an outlet opening 122 and through one or more outlets 121. The one or more outlets 121 then guide the coolant to a second coolant delivery line 125, where the coolant returns to the coolant controller 115. In some embodiments, the coolant includes one or more of water, silicone oil, mineral oil, fluorinated liquids, dielectric liquids, etc.
[0135] In some embodiments, during operation, the first semiconductor die 104 has one or more active regions 105. The active region 105 is a region of the first semiconductor die 104 containing multiple circuit components that transmit or convert electrical signals. Resistance in the circuit components causes heat to be released into the first semiconductor die 104. The accumulation of heat increases the temperature in the first semiconductor die 104, which may lead to increased inefficiency of the circuit components and an increase in potential failures. During operation, multiple valves 116 of the impact cooling block 103 are actuated to regulate the temperature of the first semiconductor die 104. By controlling the number of valves 116 that are opened, the multiple valves 116 are used to control the volume of coolant directed at the active region 105.
[0136] Furthermore, in some embodiments, different regions of the first semiconductor die 104 may become part of one or more active regions 105. For example, the first semiconductor die 104 may have multiple circuits that perform different functions and are active at different times. Multiple valves 116 may be controlled to direct coolant in the current active region 105 while stopping coolant flow to other regions where there is no risk of overheating. Dynamic control of flow volume and higher precision in the direction of coolant toward the active region 105 of the first semiconductor die 104 result in a more efficient and effective impact cooling block 103. In addition, because the coolant directly impacts the region of the impact cooling block 103 located directly above the active region 105 rather than flowing across this region, the effectiveness of heat transfer is increased, thereby further increasing the effectiveness of the impact cooling block 103.
[0137] like Figure 1C As shown in cross-sectional view 100c, in the second direction 126, the outlet opening 122 has an outermost sidewall extending through the inlet opening 112. The inlet opening 112 is located directly between a first outlet 121a and a second outlet 121b of the outlet 121. Figure 1D As shown in the top view 100d, in some embodiments, there are four outlets 121 spaced apart around the outer edge of the inlet opening 112. In some embodiments, the inlet 114 (shown in dashed lines) is located directly above the center of the inlet opening 112. Figure 1E As shown in cross-sectional view 100e, in some embodiments, a plurality of conduits 118 are evenly distributed across the impact cooling block 103 in a grid pattern. That is, in some embodiments, the plurality of conduits 118 are arranged to have multiple rows 134 extending in a third direction 128 and multiple columns 136 extending in a second direction 126. Figure 1F As shown in the top view 100f, in some embodiments, the plurality of impact openings 120 have a square cross-section when viewed from above. In other embodiments (see reference...) Figure 2B When viewed from above, the multiple impact openings 120 have a circular cross-section. The multiple impact openings 120 extend across the impact cooling block 103 in the same pattern as the multiple pipes 118.
[0138] Figure 2A , 2B , Figure 2C , Figure 2D A top view of some embodiments of a liquid cooling system with multiple openings is shown, wherein the openings guide a coolant at specific regions of a semiconductor die, and a larger volume of the openings is located above hot spots of the semiconductor die. Figure 2A as well as Figure 2C This is a cross-sectional view of the first semiconductor die 104, showing the location of the active region 105 in some embodiments. Figure 2B as well as Figure 2D Showing the corresponding Figure 2A as well as Figure 2C Some embodiments of the distribution of multiple impact openings 120 at the location of the active region 105.
[0139] like Figure 2A As shown in top view 200a, in some embodiments, the first semiconductor die 104 has an active region 105 centered on the first semiconductor die 104 in a second direction 126 and a third direction 128. In some embodiments, the active region 105 has a higher concentration of circuit components within its area compared to the surrounding area. In other embodiments, the active region 105 is defined by high-power devices with a higher concentration compared to the surrounding area. High-power devices are integrated circuit components that utilize higher voltages and greater currents to achieve functionality compared to other devices, such as high-voltage transistor arrays compared to low-voltage transistor arrays. The higher the voltage and current utilized by the high-power device, the greater the amount of heat energy it may generate. In some embodiments, the active region 105 includes power management circuitry, one or more processors, a central processing unit, a graphics processing unit, etc. In further embodiments, the surrounding area of the active region 105 may include a memory array, a control system, logic circuitry, etc.
[0140] In some embodiments, the location of the active region 105 (e.g., a region that releases significant amounts of heat during operation) may be determined by testing or analysis of the grain layout. In other embodiments, it may be determined during operation by a mechanism coupled to a valve controller (see reference). Figure 1B The thermal sensor of (127) senses the position of the active region 105, and the position of the active region 105 can be programmed to the valve controller before operation (see reference). Figure 1B In section 127), or, it can be based on the valve controller (see reference). Figure 1B The received logic signal (127) determines the position of the active region 105.
[0141] like Figure 2B As shown in top view 200b, in some embodiments, a plurality of impact openings 120 are distributed in a first region 202 with a higher concentration of impact openings 120 (compared to a second region 204), wherein the first region 202 is directly above the active region 105, and the second region 204 is not directly above the active region 105. Figure 2B As shown, in some embodiments, when viewed from above, the plurality of impact openings 120 have a circular cross-section. Figure 2B The illustrated embodiments are compared to Figure 1FThe illustrated embodiment has a smaller number of impact openings 120. This is because multiple impact openings 120 are respectively coupled to multiple valves (see reference). Figure 1A The piping in the multiple pipes 118 of (116) and the fewer impact openings 120 reduce the number of electronic components in the impact cooling block 103 while maintaining control over the flow volume of coolant above the active region 105. Reducing the number of electronic components reduces the number of failure points in the impact cooling block 103, thereby increasing the service life of the device.
[0142] like Figure 2C As shown in the top view 200c, in some embodiments, the first semiconductor die 104 has an active region 105 offset from the center of the first semiconductor die 104 in the second direction 126 or the third direction 128, or the first semiconductor die 104 has an active region 105 offset from the center of the first semiconductor die 104 in both the second direction 126 and the third direction 128. Figure 2D As shown in the cross-sectional view 200d, in some embodiments, the first region 202 of the impact opening 120 with a high concentration is in the second direction 126 and the third direction 128 in conjunction with the active region (see reference). Figure 2C The same offset from the first semiconductor die 104 (see reference 105) Figure 2C The center offset of 104).
[0143] Figure 3A , Figure 3B , Figure 3C , Figure 3D Top views 300a, 300b, 300c, and 300d show some embodiments of a liquid cooling system having multiple impingement openings, wherein the impingement openings guide a coolant at specific regions of a semiconductor die, and the majority volume of the impingement openings is located above multiple hot spots of the semiconductor die. Figure 3A as well as Figure 3C This is a cross-sectional view of the first semiconductor die 104, showing the location of the active region 105 in some embodiments. Figure 3B as well as Figure 3D Showing the corresponding Figure 3A as well as Figure 3C Some embodiments of the distribution of multiple impact openings 120 at the location of the active region 105.
[0144] like Figure 3A As shown in top view 300a and top view 300c of Figure 3c, in some embodiments, there are multiple active regions 105 spaced apart from each other. In further embodiments, because the included circuitry may perform different functions, the multiple active regions 105 are not always active simultaneously. Figure 3BAs shown in the top view 300b, in some embodiments having two active regions 105, there are a first region 202 and a third region 302, which have a higher impact opening 120 per unit area volume compared to the second region 204. Figure 3D As shown in the top view 300d, in some embodiments with three active regions 105, there are a first region 202, a third region 302, and a fourth region 304, which have a higher impact opening 120 per unit area volume compared to the second region 204. In other embodiments, the impact opening 120 may be distributed in a grid pattern across the first semiconductor die 104, wherein the valve controller ( Figure 1B 127) is configured to actuate the valve above the active region 105.
[0145] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E Top views 400a, 400b, 400c, 400d and cross-sectional view 400e of some embodiments of a liquid cooling system having multiple openings are shown, wherein the openings guide a coolant at specific regions of multiple semiconductor grains, and the majority volume of the openings is located above hot spots of the semiconductor grains.
[0146] like Figure 4A As shown in the top view 400a, in some embodiments, the first semiconductor die 104, the second semiconductor die 402, the third semiconductor die 404, and the fourth semiconductor die 406 are located directly below the impact cooling block 103. In other embodiments, different numbers of semiconductor dies may be located directly below the impact cooling block 103. The first semiconductor die 104, the second semiconductor die 402, the third semiconductor die 404, and the fourth semiconductor die 406 are system-on-a-chip (SoC) dies. The second semiconductor die 402, the third semiconductor die 404, and the fourth semiconductor die 406 each have a second active region 403, a third active region 405, and a fourth active region 407, respectively. Figure 4BAs shown in top view 400b, in some embodiments, there are four active regions 105, including a first region 202, a third region 302, a fourth region 304, and a fifth region 408, which has a higher impact opening 120 per unit area volume compared to the second region 204. Because the impact cooling block 103 is spaced apart from one or more semiconductor grains (e.g., the first semiconductor grain 104, the second semiconductor grain 402, etc.), the impact cooling block can be used to cool multiple semiconductor grains having any combination of active regions (in the same way as cooling a single semiconductor grain (e.g., the first semiconductor grain 104) having one or more active regions 105).
[0147] like Figure 4C As shown in top view 400c, in some embodiments, multiple high bandwidth memory (HBM) wafers 410 are located directly below the shock cooling block 103. The HBM wafers 410 are coupled to a first semiconductor die 104, a second semiconductor die 402, a third semiconductor die 404, and a fourth semiconductor die 406 to extend the functionality of these semiconductor dies. Figure 4D As shown in the top view 400d, in some embodiments, there are four active regions 105, including a first region 202, a third region 302, a fourth region 304, and a fifth region 408, which have a higher impact opening 120 per unit area volume compared to the second region 204. Furthermore, one or more impact openings 120 are also located directly above the plurality of high-bandwidth memory chips 410.
[0148] like Figure 4E As shown in cross-sectional view 400e, in some embodiments, the shock cooling bulk 103 is overlaid on a pseudo-three-dimensional (2.5-dimensional) or three-dimensional stacked circuit structure. In some embodiments, the circuit structure includes a combination of one or more semiconductor dies (e.g., first semiconductor die 104, second semiconductor die 402, third semiconductor die 404, high-bandwidth memory chip 410) spaced vertically and / or horizontally spaced from each other, wherein the one or more semiconductor dies are coupled to each other using conductive bumps 412, coupled to a substrate 109, or coupled to an underlying intermediate substrate 414. In some embodiments, the one or more semiconductor dies are separated from the shock cooling bulk 103 by a thermal interface material 106. In other embodiments, the thermal interface material 106 is separated from the one or more dies by one or more additional filler layers.
[0149] Figure 5 , Figure 6 , Figure 7A , Figure 7B , Figures 8 to 12 , Figure 13A , Figure 13B , Figure 14A , Figure 14B A series of cross-sectional views 500, 600, 700a, 700b, 800 to 1200, 1300a, 1300b, 1400a, 1400b illustrate some embodiments of a method for forming a liquid cooling system having multiple openings, wherein the openings utilize multiple valves to guide a coolant at specific regions of a semiconductor die. Although... Figure 5 , Figure 6 , Figure 7A , Figure 7B , Figures 8 to 12 , Figure 13A , Figure 13B , Figure 14A , Figure 14B The actions are described as a series of actions, but it should be understood that these actions are not limiting; the order of the actions may be changed in other embodiments, and the disclosed method is applicable to other structures. In other embodiments, some of the actions shown and / or described may be omitted entirely or partially. Figure 7B , Figure 13B , Figure 14B The cross-sectional views 700b and 1300b are respectively along... Figure 7A , Figure 13A , Figure 14A The line D-D' is obtained.
[0150] like Figure 5 As shown in the cross-sectional view 500, a thermal interface material 106 is formed above the first semiconductor die 104. In some embodiments, the thermal interface material 106 is a metal, liquid metal, polymer gel, phase change material, graphite film, etc., or the thermal interface material 106 includes a metal, liquid metal, polymer gel, phase change material, graphite film, etc. The thermal interface material 106 is formed using one or more processes such as physical vapor deposition (PVD), atomic layer deposition (ALD), chemical vapor deposition (CVD), a dispensing process (e.g., dispensing a polymer-based material for the thermal interface material), a curing process (e.g., curing the polymer-based material after dispensing it onto the first semiconductor die), and a pick-up process (e.g., placing a graphite film onto the first semiconductor die).
[0151] like Figure 6As shown in cross-sectional view 600, a coolant bulk substrate 602 is formed on a thermal interface material 106. In some embodiments, the coolant bulk substrate 602 is a thermally conductive material, or the coolant bulk substrate 602 includes a thermally conductive material, such as a metal (e.g., aluminum, copper, steel), a metal alloy, etc. The coolant bulk substrate 602 is formed using one or more processes such as physical vapor deposition, atomic layer deposition, chemical vapor deposition, etc. In some embodiments, for example, when the thermal interface material 106 does not include a solid material, the coolant bulk substrate 602 is formed on a separate substrate, and the following steps shown in Figures 7 to 14 are performed when the coolant bulk substrate is located on the substrate. Then, the completed impact cooling bulk (see reference) is... Figure 1A And 103 in Figure 14) is removed from the substrate, and the completed impact-cooled block (see reference) is then removed. Figure 1A And 103 in Figure 14) is coupled to the thermal interface material.
[0152] like Figure 7A Sectional view 700a and Figure 7B As shown in cross-sectional view 700b, multiple etching steps are performed on a coolant bulk substrate 602. These etching steps result in the formation of multiple impact openings 120 (shown in dashed lines) and an outlet opening 122 (shown in dashed lines). In some embodiments, the multiple etching steps consist of a first etching and a second etching, in which openings aligned with the multiple impact openings 120 are formed in the first etching, and the outlet opening 122 is etched in the second etching while continuing to etch the multiple impact openings 120. In some embodiments, the multiple impact openings 120 and the outlet opening 122 are patterned using a first mask layer and a second mask layer formed by photolithography. In some embodiments, the outer sidewall of the outlet opening 122 extends beyond the outermost sidewall of the impact opening 120 (e.g., ...). Figure 7B (As shown). After multiple etching steps, a first sacrificial layer 702 is used to fill the multiple impact openings 120 and the exit openings 122.
[0153] like Figure 8As shown in cross-sectional view 800, a third mask layer 804 is formed over the first sacrificial layer 702 and the coolant bulk substrate 602. In some embodiments, the third mask layer 804 is a photoresist and is patterned using a photolithography process, or the third mask layer 804 includes a photoresist and is patterned using a photolithography process. The third mask layer 804 is formed using one or more processes such as physical vapor deposition, atomic layer deposition, chemical vapor deposition, spin coating, dipping, etc. After the third mask layer 804 is formed and patterned, a third etching 802 is performed on the first sacrificial layer 702. In some embodiments, the third etching 802 is an anisotropic dry etching process. The third etching 802 produces a plurality of conduit openings 806 extending to a plurality of impact openings 120 (shown in dashed lines). In some embodiments, the plurality of conduit openings 806 have a circular cross-section when viewed from above.
[0154] like Figure 9 As shown in cross-sectional view 900, a conformal piping layer 902 is deposited above the first sacrificial layer 702 and along the sidewalls of a plurality of piping openings 806. In some embodiments, the conformal piping layer 902 is the same material as the coolant bulk substrate 602, or the conformal piping layer 902 comprises the same material as the coolant bulk substrate 602. In some embodiments, the conformal piping layer 902 is formed using one or more processes such as physical vapor deposition, atomic layer deposition, and chemical vapor deposition.
[0155] like Figure 10 As shown in the cross-sectional view 1000, a fourth mask layer 1004 is formed on the conformal piping layer (see reference). Figure 9 Above the 902). In some embodiments, the fourth mask layer 1004 is a photoresist and is patterned using a photolithography process, or the fourth mask layer 1004 includes a photoresist and is patterned using a photolithography process. The fourth mask layer 1004 is formed using one or more processes such as physical vapor deposition, atomic layer deposition, chemical vapor deposition, spin coating, and immersion coating. After the fourth mask layer 1004 is formed and patterned, a conformal pipeline layer (see reference 902) is applied. Figure 9 A fourth etch 1002 is performed on the conformal pipeline layer (see 902). In some embodiments, the fourth etch 1002 is an anisotropic dry etch process. The fourth etch 1002 causes the conformal pipeline layer (see 902) to be etched. Figure 9 The portion of pipe 118e located at the end of pipe 118 of multiple pipes 118 (902) was removed.
[0156] like Figure 11As shown in cross-sectional view 1100, a second sacrificial layer 1102 is formed within a plurality of conduits 118. In some embodiments, the second sacrificial layer 1102 is made of the same material as the first sacrificial layer 702, or the second sacrificial layer 1102 comprises the same material as the first sacrificial layer 702. In some embodiments, the second sacrificial layer 1102 is formed using one or more processes such as physical vapor deposition, atomic layer deposition, and chemical vapor deposition, followed by a planarization process (e.g., chemical mechanical polishing (CMP) process) to remove the portion of the second sacrificial layer 1102 located above the upper surface of the plurality of conduits 118.
[0157] like Figure 12 As shown in cross-sectional view 1200, a plurality of valves 116 are formed above a plurality of pipes 118. An intermediate coolant bulk layer 1202 surrounds the plurality of valves 116. In some embodiments, the plurality of valves 116 are solenoid valves. In some embodiments, a first conductor horizontal plane including a plurality of conductors (see reference) Figure 1B 123) is embedded in the intermediate coolant block layer 1202 to couple multiple valves 116 to a valve controller (see reference). Figure 1B (127).
[0158] like Figure 13A Sectional view 1300a and Figure 13B As shown in cross-sectional view 1300b, a coolant block upper layer 1302 is formed near a third sacrificial layer 1304. The coolant block upper layer 1302, the intermediate coolant block layer 1202, and the coolant block base 602 together form the coolant containment structure 102. Furthermore, the sidewalls 1306 of the inlet 114 and the outlet 121 are respectively formed as the portions surrounding the third sacrificial layer 1304 corresponding to the inlet 114 and the portions surrounding the third sacrificial layer 1304 corresponding to the outlet 121. In some embodiments, connectors are formed at the inlet 114 and the outlet 121 to couple the inlet 114 and the outlet 121 to the first coolant delivery line (see reference). Figure 1B (117) and the second coolant delivery line (see reference 117) Figure 1B (125 in the original text). The coolant bulk top layer 1302 and the third sacrificial layer 1304 are formed using multiple etching and deposition steps. In some embodiments, the third sacrificial layer 1304 comprises the same material as the first sacrificial layer 702 and the second sacrificial layer 1102. In some embodiments, the coolant bulk top layer 1302 and the sidewall 1306 comprise the same material as the coolant bulk substrate 602 and are formed in a single deposition process step. In other embodiments, the coolant bulk top layer 1302 and the sidewall 1306 are formed using multiple separate deposition steps.
[0159] like Figure 14A Sectional view 1400a and Figure 14B As shown in the cross-sectional view 1400b, in the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer (please refer to 702 in Figure 7 respectively), Figure 11 A fifth etch 1402 is performed on (1102 in Figure 13, 1304 in Figure 13). The fifth etch 1402 is an isotropic etching, or the fifth etch 1402 includes an isotropic etching that selects and etches the materials of the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer. The fifth etch removes the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer from the inlet opening 112, the multiple impact openings 120, and the outlet opening 122 (see 702 in Figure 7, respectively). Figure 11 (1102 in Figure 13, 1304 in Figure 13), thereby completing the impact cooling block 103.
[0160] Figure 15 A flowchart 1500 illustrates a method for forming a liquid cooling system having multiple openings, wherein the openings guide a coolant at specific regions of a semiconductor die using multiple valves. Although the methods shown and / or described herein, as well as other methods, are depicted as a series of actions or events, it should be understood that the invention is not limited to the shown sequence or actions. Therefore, in some embodiments, these actions may be performed in a different order than shown and / or simultaneously. Furthermore, in some embodiments, the shown actions or events may be subdivided into multiple actions or events, which may be performed at individual times or simultaneously with other actions or sub-actions. In some embodiments, some shown actions or events may be omitted, and other actions or events not shown may be included.
[0161] In step 1502, a coolant bulk substrate is formed over a semiconductor die. An example illustrating this step can be found in, for example... Figure 6 .
[0162] In step 1504, an outlet opening and a plurality of impact openings are etched into the coolant bulk substrate. An example of a diagram illustrating this step can be seen in figures such as Figure 7.
[0163] In step 1506, the outlet opening and the plurality of impact openings are filled with a first sacrificial layer. An example of a diagram illustrating this step can be seen in figures such as Figure 7.
[0164] In step 1508, the first sacrificial layer is etched to form a conduit opening within the first sacrificial layer, the conduit opening extending into the impact opening. An example illustrating this step can be found in, for example... Figure 8 .
[0165] In step 1510, multiple pipes are formed within the pipe opening. An example of a diagram illustrating this step can be found in, for example... Figure 9 as well as Figure 10 .
[0166] In step 1512, a plurality of conduits are filled with a second sacrificial layer. An example of a diagram illustrating this step can be found in, for example... Figure 11 .
[0167] In step 1514, multiple valves are formed over the multiple pipes and the second sacrificial layer. An example of a diagram illustrating this step can be found in, for example... Figure 12 .
[0168] In step 1516, a third sacrificial layer is formed covering the multiple valves. An example of a diagram illustrating this step can be seen in figures such as Figure 13.
[0169] In step 1518, an upper coolant block structure is formed around the third sacrificial layer. An example of a diagram illustrating this step can be seen in figures such as Figure 13.
[0170] In step 1520, isotropic etching is performed to remove the third sacrificial layer, the second sacrificial layer, and the first sacrificial layer from the coolant bulk substrate and the overlying coolant bulk structure, thereby removing the filler of the inlet opening, the outlet opening, and the impact opening. An example of a diagram illustrating this step can be seen in figures such as Figure 14.
[0171] Some embodiments of this utility model provide an integrated circuit cooling system. The integrated circuit cooling system includes an impact coolant block, an inlet opening, multiple pipes, multiple valves, multiple impact openings, and an outlet opening. The impact coolant block is coated on a semiconductor die. The inlet opening is located within the impact coolant block and coupled to an inlet. The pipes extend directly below the inlet opening in a first direction and have multiple first ends and multiple second ends. The pipes are centered on multiple first axes. The valves couple the first ends of the pipes to the inlet opening. The impact openings are located within the impact coolant block and surround the second ends of the pipes. The impact openings are centered on the first axes. The outlet opening is located within the impact coolant block and between the inlet opening and the impact openings, physically coupling the impact openings to an outlet.
[0172] In some embodiments, the impingement coolant block has an intermediate coolant block layer, an inlet opening is separated from an outlet opening by the intermediate coolant block layer, and valves are distributed throughout the intermediate coolant block layer. In some embodiments, a semiconductor die is separated from the impingement coolant block by a thermal interface material, and the thermal interface material contacts both the semiconductor die and the impingement coolant block. In some embodiments, a plurality of outer sidewalls of the outlet opening extend along a second direction perpendicular to a first direction through a plurality of outer sidewalls of the inlet opening. In some embodiments, the conduits and impingement openings are distributed in a grid pattern perpendicular to the first direction, such that the impingement openings are arranged in multiple rows and columns extending across an upper surface of the semiconductor die.
[0173] In some embodiments, the semiconductor die includes a first region containing a higher concentration of high-power devices than a second region of the semiconductor die, and wherein impact openings are distributed such that a third region of an impact coolant block directly above the first region has a higher concentration of impact openings than a fourth region of an impact coolant block directly above the second region. In some embodiments, the semiconductor die includes a fifth region separated from the first region and containing a higher concentration of high-power devices than a second region of the semiconductor die, and wherein impact openings are distributed such that a sixth region of an impact coolant block directly above the fifth region has a higher concentration of impact openings than the fourth region.
[0174] In some embodiments, the integrated circuit cooling system further includes a second semiconductor die. The second semiconductor die is located directly below the impact coolant block, and the semiconductor die and the second semiconductor die include a plurality of single-wafer system-in-one devices. The second semiconductor die includes a fifth region separated from the first region and containing a higher concentration of high-power devices than the second region of the semiconductor die, and the impact openings are distributed such that a sixth region of the impact coolant block, located directly above the fifth region of the second semiconductor die, has a higher concentration of impact openings than the fourth region.
[0175] In some embodiments, the integrated circuit cooling system further includes a high-bandwidth memory die. The high-bandwidth memory die is located directly below the impact coolant block. The impact openings are distributed such that a seventh region of the impact coolant block directly above the high-bandwidth memory die has a higher concentration of impact openings than a fourth region. In some embodiments, a first opening of the impact opening surrounds a first conduit of a conduit, and wherein a plurality of inner sidewalls of the first opening are spaced apart from a plurality of outer sidewalls of the first conduit.
[0176] Some embodiments of this utility model provide an integrated circuit cooling system. The integrated circuit cooling system includes an impact coolant block, an inlet opening, a conduit, an impact opening, and an outlet opening. The impact coolant block is coated on a semiconductor die. The inlet opening is located within the impact coolant block and coupled to an inlet. The conduit extends in a first direction below the inlet opening and has a first end and a second end extending between a plurality of first internal sidewalls, wherein the first end faces the inlet opening and the second end faces the semiconductor die. The impact opening is located within the impact coolant block and has a plurality of second internal sidewalls surrounding and concentric with the first internal sidewalls of the conduit. The outlet opening is located within the impact coolant block and between the inlet opening and the impact opening, wherein the outlet opening physically couples the impact opening to an outlet.
[0177] In some embodiments, the second inner sidewall has a circular cross-section when viewed from above. In some embodiments, the second inner sidewall has a square cross-section when viewed from above.
[0178] Some embodiments of this utility model provide a method for forming an integrated circuit cooling system. The method includes forming a coolant bulk substrate over a semiconductor die; etching an outlet opening and a plurality of impact openings into the coolant bulk substrate; and filling the outlet opening and impact openings with a first sacrificial layer. The method also includes etching the first sacrificial layer to form a plurality of conduit openings within the first sacrificial layer, the conduit openings extending to the impact openings. The method further includes forming a plurality of conduits within the conduit openings; filling the conduits with a second sacrificial layer; forming a plurality of valves covering the conduits and the second sacrificial layer; forming a third sacrificial layer covering the valves; and forming an upper coolant bulk structure surrounding the third sacrificial layer. The method further includes performing isotropic etching to remove the third sacrificial layer, the second sacrificial layer, and the first sacrificial layer from the coolant bulk substrate and the upper coolant bulk structure, thereby removing the filler of the inlet opening, outlet opening, and impact openings.
[0179] In some embodiments, the method further includes filling the conduit with a second sacrificial layer prior to forming the valve. In some embodiments, forming the upper coolant bulk structure further includes forming an inlet and a plurality of outlets within the upper coolant bulk structure, wherein, after isotropic etching, the inlet is coupled to an inlet opening within the upper coolant bulk structure and overlying the valve, and the outlets are coupled to an outlet opening. In some embodiments, the outlet openings extend through a plurality of outermost sidewalls of the impact opening, wherein the outlets are directly above the outlet opening in a first direction, and wherein the outlets are offset from the impact opening in a second direction perpendicular to the first direction.
[0180] In some embodiments, the method further includes forming an intermediate coolant bulk layer prior to forming the valve, wherein the valve is formed within the intermediate coolant bulk layer. In some embodiments, forming the intermediate coolant bulk layer further includes forming a plurality of wires coupled to the valve on the intermediate coolant bulk layer. In some embodiments, the impingement opening is cylindrical and extends along a plurality of first axes, and wherein the conduit opening is cylindrical and has a plurality of second axes coinciding with the first axes.
[0181] It should be understood that in this specification and the claims, the terms "first," "second," "third," etc., are merely general designations used for ease of description to distinguish different elements in a single figure or a series of figures. In themselves, these terms do not imply any temporal order or structural similarity of the elements, and are not intended to describe corresponding elements in different embodiments shown and / or embodiments not shown. For example, a "first dielectric layer" described in connection with one figure may not necessarily correspond to a "first dielectric layer" described in connection with another figure, and may not necessarily correspond to a "first dielectric layer" in an embodiment not shown.
[0182] The foregoing summary of features of several embodiments enables those skilled in the art to better understand various aspects of the present invention. Those skilled in the art should understand that the present invention can be readily used as the basis for designing or modifying other processes and structures to achieve the same objectives and / or advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent configurations do not depart from the concept and scope of the present invention, and that various changes, substitutions, and modifications can be made to the present invention without departing from its concept and scope.
Claims
1. An integrated circuit cooling system, characterized in that, include: An impact coolant block is coated on a semiconductor die; An inlet opening is located within the impact coolant block and coupled to an inlet; Multiple pipes extend in a first direction directly below the inlet opening and have multiple first ends and multiple second ends, wherein the multiple pipes are centered on multiple first axes; Multiple valves couple the multiple first ends of the multiple pipelines to the inlet opening; Multiple impact openings are located within the impact coolant block and surround the multiple second ends of the multiple pipes, wherein each of the multiple impact openings is centered on the multiple first axes; and An outlet opening is located within the impact coolant block and between the inlet opening and the plurality of impact openings, the outlet opening physically coupling the plurality of impact openings to an outlet.
2. The integrated circuit cooling system as described in claim 1, characterized in that, The impact coolant block has an intermediate coolant block layer, the inlet opening is separated from the outlet opening by the intermediate coolant block layer, and the plurality of valves are distributed throughout the intermediate coolant block layer.
3. The integrated circuit cooling system as described in claim 2, characterized in that, The semiconductor die is separated from the impact coolant block by a thermal interface material, wherein the thermal interface material contacts both the semiconductor die and the impact coolant block.
4. The integrated circuit cooling system as described in claim 1, characterized in that, The multiple outer sidewalls of the outlet opening extend along a second direction perpendicular to the first direction through the multiple outer sidewalls of the inlet opening.
5. The integrated circuit cooling system as described in claim 1, characterized in that, The plurality of conduits and the plurality of impact openings are distributed in a grid pattern perpendicular to the first direction, such that the plurality of impact openings are arranged in multiple rows and columns, extending across an upper surface of the semiconductor die.
6. The integrated circuit cooling system as described in claim 1, characterized in that, The semiconductor die includes a first region containing a higher concentration of high-power devices compared to a second region of the semiconductor die, and wherein the plurality of impact openings are distributed such that a third region of the impact coolant block directly above the first region has a higher concentration of the plurality of impact openings compared to a fourth region of the impact coolant block directly above the second region.
7. The integrated circuit cooling system as described in claim 6, characterized in that, The semiconductor die includes a fifth region separated from the first region and containing a higher concentration of high-power devices than the second region of the semiconductor die, wherein the plurality of impact openings are distributed such that a sixth region of the impact coolant block located directly above the fifth region has a higher concentration of the plurality of impact openings than the fourth region.
8. The integrated circuit cooling system as described in claim 6, characterized in that, Also includes: A second semiconductor die is located directly below the impact coolant block, wherein the semiconductor die and the second semiconductor die include multiple single-chip system integration devices; The second semiconductor die includes a fifth region separated from the first region and containing a higher concentration of high-power devices than the second region of the semiconductor die, and the plurality of impact openings are distributed such that a sixth region of the impact coolant block located directly above the fifth region of the second semiconductor die has a higher concentration of the plurality of impact openings than the fourth region.
9. The integrated circuit cooling system as described in claim 8, characterized in that, Also includes: A high-bandwidth memory die is located directly beneath the impact coolant block; The plurality of impact openings are distributed such that a seventh region of the impact coolant block located directly above the high bandwidth memory die has a higher concentration of impact openings than the fourth region.
10. An integrated circuit cooling system, characterized in that, include: An impact coolant block is coated on a semiconductor die; An inlet opening is located within the impact coolant block and coupled to an inlet; A conduit extending in a first direction below the inlet opening and having a first end and a second end extending between a plurality of first inner sidewalls, wherein the first end faces the inlet opening and the second end faces the semiconductor die. An impact opening is located within the impact coolant block, wherein the impact opening has a plurality of second internal sidewalls surrounding the plurality of first internal sidewalls of the conduit and concentric with the plurality of first internal sidewalls of the conduit; and An outlet opening is located within the impact coolant block and between the inlet opening and the impact opening, wherein the outlet opening physically couples the impact opening to an outlet.