Electronic package
By designing a three-layer vertical stacked structure and a reinforcement layer, the problem of photonic integrated circuit elements being easily bent and broken was solved, the signal transmission path was shortened and the transmission rate was increased, and the miniaturization of semiconductor packages was promoted.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SILICONWARE PRECISION IND CO LTD
- Filing Date
- 2025-04-21
- Publication Date
- 2026-05-22
AI Technical Summary
In existing semiconductor packages, photonic integrated circuit elements protrude outwards, making them prone to bending and breakage during fiber optic insertion and removal. Furthermore, the long signal transmission path leads to signal loss, and the excessively large device size hinders miniaturization.
The three-layer vertical stacked structure includes a circuit structure, electronic integrated circuit elements, photonic integrated circuit elements, and a reinforcement layer. Electrical connections are achieved through conductive vias, and a reinforcement layer with a thickness of at least 1 mm is formed on the photonic integrated circuit elements to enhance their bending resistance.
Shortening the signal transmission path, increasing the transmission rate, and avoiding bending and breakage of photonic integrated circuit components during fiber optic insertion and removal can achieve miniaturization of the device and improvement of signal transmission efficiency.
Smart Images
Figure CN224267272U_ABST
Abstract
Description
Technical Field
[0001] This application relates to a semiconductor packaging structure, and more particularly to an electronic package. Background Technology
[0002] With the booming development of the electronics industry, electronic products are gradually moving towards multifunctionality and high performance. The application of current fifth-generation (5G) communication technology has expanded to various fields such as the Internet of Things (IoT), Industrial Internet of Things (IIoT), cloud computing, artificial intelligence (AI), autonomous vehicles, and medical care. As applications expand, a massive amount of data needs to be efficiently transmitted, processed, and stored, especially data transmission. This has led industries to replace electricity with light as the data transmission medium to improve transmission capacity, efficiency, and distance, while reducing energy consumption. Against this backdrop, co-packaged optical devices have become a future trend in semiconductor and packaging technologies.
[0003] Please see Figure 1 The existing semiconductor package 1 using silicon photonics technology includes a first circuit structure 10, an electronic integrated circuit element 11 and a plurality of conductive pillars 12 bonded to the first circuit structure 10, a cladding layer 13 covering the electronic integrated circuit element 11 and the plurality of conductive pillars 12, a second circuit structure 14 formed on the cladding layer 13, and a photonic integrated circuit element 15 disposed on the second circuit structure 14. One end of the photonic integrated circuit element 15 is connected to an optical fiber (not shown), and a support is provided below the junction of the photonic integrated circuit element 15 and the optical fiber.
[0004] However, in the aforementioned semiconductor package, the photonic integrated circuit element protrudes beyond the second circuit structure (in a cantilever design), which is prone to bending and breakage during fiber optic insertion and removal. Furthermore, when the photonic integrated circuit element and the electronic integrated circuit element perform signal processing, signal transmission must be carried out through the metal lines of the second circuit structure. This not only results in an excessively large and thick overall device size, hindering the miniaturization of electronic products, but also causes excessively long signal transmission paths, leading to signal loss and problems in end-product applications.
[0005] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Utility Model Content
[0006] In view of the various deficiencies of the prior art, this application provides an electronic package, including: a circuit structure; a first electronic component disposed on the circuit structure; a second electronic component disposed on the first electronic component and protruding out of the first electronic component; and a reinforcing layer disposed on the second electronic component.
[0007] This application also provides a method for manufacturing an electronic package, comprising: providing a circuit structure; disposing a first electronic component on the circuit structure; disposing a second electronic component on the first electronic component and protruding outward from the first electronic component; and forming a reinforcing layer on the second electronic component.
[0008] In the aforementioned electronic package and its manufacturing method, the first electronic component is an electronic integrated circuit component.
[0009] In the aforementioned electronic package and its manufacturing method, the first electronic component has a plurality of conductive vias, and the plurality of conductive vias are electrically connected to the circuit structure.
[0010] In the aforementioned electronic package and its manufacturing method, the second electronic component is a photonic integrated circuit component.
[0011] In the aforementioned electronic package and its manufacturing method, the length of the second electronic component protruding from the first electronic component is at least 30% of the length of the second electronic component.
[0012] In the aforementioned electronic package and its manufacturing method, the second electronic component is attached to the first electronic component through a plurality of conductive bumps and electrically connected to the plurality of conductive vias.
[0013] In the aforementioned electronic packaging components and their manufacturing methods, the thickness of the reinforcing layer is at least 1 millimeter.
[0014] In the aforementioned electronic package and its manufacturing method, the thickness of the reinforcing layer is proportional to the length of the second electronic component that protrudes beyond the first electronic component.
[0015] In the aforementioned electronic packaging components and their manufacturing methods, the reinforcing layer is a dielectric layer or a metal layer.
[0016] In the aforementioned electronic package and its manufacturing method, the circuit structure includes an insulating layer and a circuit layer bonded to the insulating layer, and a plurality of conductive contacts are formed on one surface of the circuit structure, while a plurality of conductive elements are provided on the other surface.
[0017] As can be seen from the above, the electronic package of this application mainly places a first electronic component on the circuit structure and stacks a second electronic component on the first electronic component. The first electronic component is an electronic integrated circuit (IC) component, and the second electronic component is a photonic integrated circuit (PIC) component, forming a three-layer vertically stacked optical engine. Simultaneously, multiple conductive vias formed in the photonic integrated circuit component allow direct electrical connection between the photonic integrated circuit component, the electronic IC component, and the circuit structure, thereby shortening the signal transmission path and increasing the transmission rate. Furthermore, a reinforcement layer can be formed on the photonic integrated circuit component to enhance its bending resistance and prevent the photonic integrated circuit component from easily bending and breaking during fiber optic insertion and removal due to its protrusion from the electronic IC component. Attached Figure Description
[0018] Figure 1 This is a cross-sectional schematic diagram of a semiconductor package that uses silicon photonics technology.
[0019] Figures 2A-2C This is a cross-sectional schematic diagram of the electronic package and its manufacturing method according to this application.
[0020] Explanation of reference numerals in the attached figures
[0021] 1 Semiconductor package
[0022] 10 First Line Structure
[0023] 11 Electronic integrated circuit components
[0024] 12 conductive pillars
[0025] 13. Covering layer
[0026] 14 Second Line Structure
[0027] 15 Photonic Integrated Circuit Components
[0028] 2 Electronic Packages
[0029] 20. Circuit Structure
[0030] 20a First Surface
[0031] 20b Second Surface
[0032] 200 insulation layers
[0033] 201 Line Layer
[0034] 202 Conductive Contact
[0035] 203 Conductive Components
[0036] 21 First Electronic Component
[0037] 210 Conductive via
[0038] 22 Second electronic component
[0039] 22a First side
[0040] 22b Second side
[0041] 220 conductive bump
[0042] 23. Reinforcement layer. Detailed Implementation
[0043] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.
[0044] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," "third," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.
[0045] Please see Figures 2A-2C This is a cross-sectional schematic diagram of the electronic package and its manufacturing method of this application.
[0046] like Figure 2A As shown, a circuit structure 20 is provided, which has opposing first surfaces 20a and second surfaces 20b, and includes at least one insulating layer 200 and at least one circuit layer 201 bonded to the insulating layer 200. For example, the material forming the circuit layer 201 may be copper or other conductive materials, and the material forming the insulating layer 200 may be polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other dielectric materials.
[0047] The first surface 20a of the circuit structure 20 has a plurality of conductive contacts 202, such as solder pads / conductive bumps. The second surface 20b has a plurality of conductive elements 203, such as solder balls.
[0048] likeFigure 2B As shown, the first electronic component 21 is placed on the first surface 20a of the circuit structure 20 and electrically connected to the circuit structure 20.
[0049] The first electronic component 21 is, for example, an electronic integrated circuit (EIC) component. The first electronic component 21 also has a plurality of conductive vias 210, such as conductive through-silicon vias (TSVs), and the plurality of conductive vias 210 are electrically connected to the conductive contacts 202 of the circuit structure 20.
[0050] In this embodiment, a bottom filler can also be formed between the first electronic component 21 and the circuit structure 20.
[0051] like Figure 2C As shown, the second electronic component 22 is attached to and electrically connected to the first electronic component 21, and the second electronic component 22 protrudes outward from the side of the first electronic component 21.
[0052] The second electronic component 22 is, for example, a photonic integrated circuit (PIC) component, and the length of the second electronic component 22 protruding from the first electronic component 21 is at least 30% of the length of the second electronic component 22.
[0053] The second electronic component 22 has opposing first sides 22a and second sides 22b, wherein the second electronic component 22 is attached to the first electronic component 21 via a plurality of conductive bumps 220 (e.g., solder bumps or copper bumps) through its second side 22b and is electrically connected to the plurality of conductive vias 210. An underfill can also be formed between the second electronic component 22 and the first electronic component 21.
[0054] This application utilizes a plurality of conductive vias 210 formed in the first electronic component 21 (electronic integrated circuit component) to directly stack and electrically connect the second electronic component 22 (photonic integrated circuit component) and the circuit structure 20, thereby forming a 3D stacked structure, which shortens the interconnection distance of the first electronic component 21, the second electronic component 22 and the circuit structure 20 and improves signal transmission efficiency.
[0055] A reinforcing layer 23 is formed on the first side 22a of the second electronic component 22 to obtain the electronic package 2 of this application.
[0056] The reinforcing layer 23 is, for example, a dielectric layer (e.g., polypropylene or PET) or a metal layer (e.g., copper), and the thickness of the reinforcing layer 23 is at least 1 millimeter (mm) to enhance the bending resistance. In practical applications, the thickness of the reinforcing layer 23 is proportional to the length of the second electronic component 22 protruding from the first electronic component 21.
[0057] The reinforcing layer 23 may be formed on the second electronic component 22 after the second electronic component 22 is attached to the first electronic component 21; or the reinforcing layer 23 may be formed on the second electronic component 22 first, and then the second electronic component 22 may be attached to the first electronic component 21.
[0058] Through the aforementioned manufacturing method, this application also discloses an electronic package 2, including: a circuit structure 20; a first electronic component 21 disposed on the circuit structure 20; a second electronic component 22 disposed on the first electronic component 21; and a reinforcing layer 23 disposed on the second electronic component 22.
[0059] The first electronic component 21 is an electronic integrated circuit component and has multiple conductive vias 210 formed thereon to electrically connect to the circuit structure 20.
[0060] The second electronic component 22 is a photonic integrated circuit element that protrudes outward from the side of the first electronic component 21 and is electrically connected to the first electronic component 21 through a plurality of conductive bumps 220 and a plurality of conductive vias 210.
[0061] The reinforcing layer 23 is a dielectric layer or a metal layer, which is used to improve the bending resistance of the overall structure.
[0062] In summary, the electronic package and its manufacturing method of this application mainly involve placing a first electronic component on a circuit structure and stacking a second electronic component on the first electronic component. The first electronic component is an electronic integrated circuit (IC) component, and the second electronic component is a photonic integrated circuit (PIC) component, forming a three-layer vertically stacked optical engine. Multiple conductive vias formed in the photonic integrated circuit component allow direct electrical connection between the photonic integrated circuit component, the electronic IC component, and the circuit structure, shortening the signal transmission path and increasing the transmission rate. Furthermore, a reinforcement layer can be formed on the photonic integrated circuit component to enhance its bending resistance, preventing the photonic integrated circuit component from easily bending and breaking during fiber optic insertion and removal due to its protrusion from the electronic IC component.
[0063] The above embodiments are used to illustrate the principles and effects of this application, and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.
Claims
1. An electronic package, characterized in that, include: Line structure; The first electronic component is located on the circuit structure; The second electronic component is disposed on the first electronic component and protrudes out of the first electronic component; as well as A reinforcement layer is disposed on the second electronic component.
2. The electronic package as described in claim 1, characterized in that, The first electronic component is an electronic integrated circuit component.
3. The electronic package as described in claim 1, characterized in that, The first electronic component has multiple conductive vias, and the multiple conductive vias are electrically connected to the circuit structure.
4. The electronic package as described in claim 1, characterized in that, The second electronic component is a photonic integrated circuit component.
5. The electronic package as described in claim 1, characterized in that, The second electronic component protrudes from the first electronic component by at least 30% of the length of the second electronic component.
6. The electronic package as claimed in claim 1, characterized in that, The second electronic component is attached to and electrically connected to the first electronic component via multiple conductive bumps.
7. The electronic package as claimed in claim 1, characterized in that, The thickness of the reinforcement layer is at least 1 mm.
8. The electronic package as claimed in claim 1, characterized in that, The thickness of the reinforcing layer is proportional to the length of the second electronic component that protrudes beyond the first electronic component.
9. The electronic package as claimed in claim 1, characterized in that, The reinforcement layer is either a dielectric layer or a metal layer.
10. The electronic package as claimed in claim 1, characterized in that, The circuit structure includes an insulating layer and a circuit layer bonded to the insulating layer, and multiple conductive contacts are formed on one surface of the circuit structure, while multiple conductive elements are provided on the other surface.