A fast discharge circuit in power-off state
By designing a fast discharge circuit for the parallel switching module and drive circuit when the gateway device is powered off, and using a trigger circuit composed of voltage divider resistors and MOSFETs to achieve fast discharge of capacitor C1, the problem of residual voltage in capacitor C1 is solved, ensuring the stability and safety of the device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- UNIONMANTECH
- Filing Date
- 2025-03-31
- Publication Date
- 2026-05-26
AI Technical Summary
In the existing gateway device's fast power-off discharge circuit, capacitor C1 cannot completely discharge residual voltage when the power is off, which may cause the device to have an incorrect power-on sequence when it is powered on again.
A fast discharge circuit in the power-off state is designed. By setting the switching module and driving circuit in parallel with the energy storage element, and using the trigger circuit composed of voltage divider resistors and MOSFETs, the switching module is turned on to discharge quickly when the terminal voltage of capacitor C1 is lower than the threshold voltage. The power-on protection module prevents false turn-on and short circuit.
This enables rapid and complete discharge of capacitor C1, ensuring that the device starts from zero voltage upon the next power-on, thus improving the stability of the device system. Furthermore, the power-on protection module avoids the risk of short circuits, enhancing the safety and stability of the discharge circuit.
Smart Images

Figure CN224289358U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of rapid discharge technology, and in particular to a rapid discharge circuit in the power-off state. Background Technology
[0002] Fast-discharge circuits are mainly used to quickly release the energy stored in the circuit (such as the charge stored in the capacitor) when the device loses power (loses the external power supply), so as to avoid the adverse effects of residual charge on the device, or to meet specific application requirements, such as some circuits that need to be quickly reset.
[0003] Existing gateway devices' fast power-off discharge circuits, such as Figure 1 As shown, when the 12V DC power adapter is disconnected, the dying gasp signal voltage drops to 0V, triggering the power-off alarm function of the gateway device. At this time, the gateway device is mainly powered by the large-capacity aluminum electrolytic capacitor C1. As the charge is released, the terminal voltage of capacitor C1 will decrease. When the voltage drops to a certain threshold voltage, the fast discharge circuit module will be triggered to quickly discharge the remaining voltage of the capacitor. According to Figure 1 As can be seen from the circuit's operating principle, when the voltage across capacitor C1 drops to the turn-on voltage V of switch Q2... TN When the voltage drops below a certain level, switching transistor Q2 will stop working, which will also cause switching transistor Q3 to stop working. At this time, there will be no conduction path to provide a charge discharge channel for capacitor C1, and capacitor C1 will stop discharging. As a result, capacitor C1 will have residual voltage. If it is to discharge the charge through its own leakage current, it will take a very long time to completely discharge the residual charge of the capacitor.
[0004] Therefore, this invention proposes a fast discharge circuit in the power-off state, which can continue to completely discharge the charge of capacitor C1 even when the terminal voltage of capacitor C1 is lower than the conduction voltage of the switching transistor, so as to ensure that capacitor C1 has no residual voltage. Utility Model Content
[0005] The utility model of this invention provides a fast discharge circuit in the power-off state, which mainly solves the problem that in the current fast discharge circuit of gateway devices, capacitor C1 cannot completely discharge the residual voltage in the power-off state.
[0006] This invention proposes a fast discharge circuit in the power-off state, which is arranged in parallel with an energy storage element and includes a switching module and a driving circuit; the input terminal of the switching module is connected in parallel with the input terminal of the energy storage element and connected to a power supply; the driving circuit is connected to the input terminal of the switching module, and the output terminal of the switching module is grounded; one end of the driving circuit is connected to the input power supply, and the other end is grounded.
[0007] When powered on, the switching module is in the off state, and there is a voltage greater than the threshold voltage V on the driving circuit. gate The voltage U; in the power-off state, the voltage U on the energy storage element is less than the threshold voltage V. gate When the switch module is turned on, the energy storage element is grounded through the switch module.
[0008] Preferably, the driving circuit includes a capacitor C2; it also includes a unidirectional conduction module with one end connected to the power supply and the other end connected to the capacitor C2; the other end of the capacitor C2 is grounded;
[0009] When powered on, capacitor C2 charges to the power supply voltage; when powered off, capacitor C2 controls the switching module to turn on.
[0010] Preferably, it further includes:
[0011] The power-on protection module is connected between the input terminal of the switch module and the drive circuit.
[0012] The driving circuit also includes resistors R4 and R5 and MOSFET Q3;
[0013] The drain of the MOSFET Q3 is connected to the input terminal of the power-on protection circuit, the source is connected in parallel to the output terminal of the unidirectional conduction module and the capacitor C2, and the gate is connected to the connection terminal of the resistor R4 and the resistor R5; the other end of the resistor R4 is connected to the power supply; the other end of the resistor R5 is connected to the capacitor C2.
[0014] The threshold voltage V gate for,
[0015]
[0016] Among them, V in V is the power supply input voltage. D For the on-state voltage drop of the unidirectional conduction module; |V th | represents the absolute value of the gate-source turn-on voltage of MOSFET Q3.
[0017] Preferably, the power-on protection module includes a MOSFET Q2 and a resistor R3;
[0018] One end of the resistor R3 is connected in parallel to the power supply and the gate of the MOSFET Q2, and the other end of the resistor R3 is grounded; the drain of the MOSFET Q2 is connected to the input terminal of the switching module, and the source is connected to the drain of the MOSFET Q3.
[0019] Preferably, the switching module includes a MOSFET Q1;
[0020] The drain of the MOS transistor Q1 is connected to the power supply, the source is grounded, and the gate is connected to the driving circuit.
[0021] Preferably, it further includes:
[0022] The pull-down resistor R1 has one end connected in parallel to the gate of MOSFET Q1 and the drain of MOSFET Q2, and the other end grounded.
[0023] Preferably, it further includes:
[0024] The positive input terminal of diode D1 is connected to the power input terminal of the power-on protection module, and the negative output terminal is connected to the power input terminal of the switching module, the drive circuit, and the energy storage element.
[0025] As can be seen from the above, the following beneficial effects can be obtained by applying the technical solution provided by this utility model:
[0026] First, the fast discharge circuit in the power-off state proposed in this utility model can shorten the discharge time of capacitor C1 and ensure that the charge of capacitor C1 is completely discharged. It ensures that the device starts from zero voltage when it is powered on again, and ensures that the power-on sequence of the system will not be incorrect due to the input voltage not dropping to zero, thereby improving the stability of the device system.
[0027] Second, the fast discharge circuit in the power-off state proposed in this utility model determines the threshold voltage value of the driving circuit by setting voltage divider resistors R4 and R5 and MOSFET Q3, and ensures that MOSFET Q1 continues to conduct when the energy storage element is powered down to less than the threshold voltage value, so as to realize the rapid discharge of the residual voltage of capacitor C1.
[0028] Third, the fast discharge circuit in the power-off state proposed in this utility model improves the safety and stability of the discharge circuit by setting a power-on protection module to prevent the MOS transistor Q1 from being mis-turned when powered on, thus avoiding a short circuit. Attached Figure Description
[0029] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 This is a circuit diagram of the fast power-off discharge circuit for current gateway devices.
[0031] Figure 2 This is a circuit diagram of the fast discharge circuit in an embodiment of this utility model;
[0032] Figure 3 This is a diagram showing the current flow of the fast discharge circuit in the power-on state in an embodiment of this utility model.
[0033] Figure 4 This is a diagram showing the current flow of the fast discharge circuit in the power-off state in an embodiment of this utility model. Detailed Implementation
[0034] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the scope of protection of the present utility model.
[0035] Currently, in the fast discharge circuit of gateway devices, there is a problem that capacitor C1 cannot completely discharge residual voltage when the power is off.
[0036] like Figure 2 As shown, in order to solve the above problems, this embodiment proposes a fast discharge circuit in the power-off state, which is connected to the power supply in parallel with the energy storage element. The fast discharge circuit includes a switching module and a driving circuit; the input terminal of the switching module and the input terminal of the energy storage element are connected to the power supply in parallel; the driving circuit is connected to the input terminal of the switching module, and the output terminal of the switching module is grounded; one end of the driving circuit is connected to the input power supply, and the other end is grounded.
[0037] In this embodiment, when powered on, the switching module is in the off state, and there is a voltage greater than the threshold voltage V on the driving circuit. gate The voltage U; in the power-off state, the voltage U on the energy storage element is less than the threshold voltage V. gate When the switch module is turned on, the energy storage element is grounded through the switch module.
[0038] Preferably, the driving circuit includes a capacitor C2; it also includes a unidirectional conduction module with one end connected to the power supply and the other end connected to the capacitor C2, and the other end of the capacitor C2 is grounded; in the power-on state, the capacitor C2 is charged to the power supply voltage value; in the power-off state, the capacitor C2 controls the conduction switch module to turn on.
[0039] Preferably, the unidirectional conduction module is a diode D2, with the positive input terminal of diode D2 connected to the input power supply and the negative output terminal connected to capacitor C2.
[0040] In this embodiment, diode D2 conducts forward to charge capacitor C2 when the 12V adapter is powered on, and ensures that the charge of capacitor C2 will not be discharged in reverse when the 12V adapter is powered off. Capacitor C2 is used to provide the gate drive voltage to turn on the switching module so as to provide a charge discharge path for capacitor C1.
[0041] More specifically, it also includes a power-on protection module connected between the input terminal of the switching module and the PMOS transistor Q3; the driving circuit also includes resistors R4 and R5 and the MOS transistor Q3; the drain of the MOS transistor Q3 is connected to the input terminal of the power-on protection module, the source is connected in parallel with the output terminal of the unidirectional conduction module and capacitor C2, and the gate is connected to the connection terminal of resistors R4 and R5; the other end of resistor R4 is connected to the power supply; the other end of resistor R5 is connected to capacitor C2;
[0042] Threshold voltage V gate for,
[0043]
[0044] Among them, V in V is the power supply input voltage. D For the on-state voltage drop of the unidirectional conduction module; |V th | represents the absolute value of the gate-source turn-on voltage of MOSFET Q3.
[0045] Preferably, in this embodiment, Q3 is a PMOS transistor; V in This is the input voltage of the 12V power adapter; the unidirectional conduction module is diode D2, V D V is the forward voltage drop of diode D2; th This is the gate-source turn-on voltage of the PMOS transistor Q3, and its value is negative.
[0046] Preferably, in this embodiment, R4 and R5 are voltage divider resistors used to set the discharge voltage threshold value. Their values cannot be too small, and it is necessary to ensure that the discharge speed of capacitor C2 is much smaller than the discharge speed of capacitor C1.
[0047] In this embodiment, PMOS transistor Q3, resistors R4 and R5 work together to form a trigger circuit. Resistors R4 and R5 form a voltage divider circuit to set the discharge voltage threshold. When the voltage of capacitor C1 falls below the discharge voltage threshold, the discharge circuit starts working to provide a fast discharge path for capacitor C1.
[0048] Preferably, in this embodiment, the power-on protection module includes a MOSFET Q2 and a resistor R3; one end of the resistor R3 is connected in parallel to a power supply and the gate of the MOSFET Q2, and the other end of the resistor R3 is grounded; the drain of the MOSFET Q2 is connected to the input terminal of the switching module, and the source is connected to the drain of the MOSFET Q3.
[0049] Preferably, in this embodiment, MOS transistor Q2 is a PMOS transistor.
[0050] In this embodiment, the power-on protection circuit composed of PMOS transistor Q2 and resistor R3 pulls the gate of PMOS transistor Q2 high to 12V when the 12V adapter is powered on, thereby preventing the switch module gate from being pulled high due to mis-conduction, which would cause the switch module to conduct and cause a power short circuit. After the 12V adapter is powered off, resistor R3 can pull the gate voltage of PMOS transistor Q2 low to prepare for conduction.
[0051] More specifically, the switching module includes a MOSFET Q1; the drain of the MOSFET Q1 is connected to the power supply, the source is grounded, and the gate is connected to a driving circuit.
[0052] Preferably, in this embodiment, MOS transistor Q1 is an NMOS transistor.
[0053] Preferably, in this embodiment, the gate of NMOS transistor Q1 is connected to a power-on protection module.
[0054] More specifically, it also includes a pull-down resistor R1 with one end connected in parallel to the gate of MOSFET Q1 and the drain of MOSFET Q2, and the other end grounded.
[0055] In this embodiment, resistor R1 is used as a pull-down resistor to pull down the gate voltage of NMOS transistor Q1, so that NMOS transistor Q1 remains in the off state when there is no driving voltage.
[0056] More specifically, it also includes diode D1; the positive input terminal of diode D1 is connected to the power input terminal of the power-on protection module, and the negative output terminal is connected to the power input terminal of the switching module, the drive circuit, and the energy storage element.
[0057] like Figure 3 As shown in this embodiment, when powered on, the 12V power adapter is connected, and the voltage at point A becomes 12V. At this time, diode D1 is forward-biased, charging capacitor C1 and supplying power to the downstream circuit module. The device is in normal working condition, and the voltage of capacitor C1 after it is fully charged is approximately 11.3V (voltage at point B). During the power-on process, diode D2 is also forward-biased, charging capacitor C2 and causing its voltage to rise rapidly to 11.3V (voltage at point F). Since the capacitance of capacitor C1 is much larger than that of capacitor C2, capacitor C2 is fully charged much faster than capacitor C1. When the voltage of capacitor C2 rises to 11.3V, the voltage of capacitor C1 is still at a relatively low value. At the instant of power-on, since capacitor C1 typically has a capacitance of over 1000uF, it is essentially short-circuited. At this moment, the voltage at point B will be around 0V. However, because capacitor C2 has a smaller capacitance, the voltage at point F will instantly rise to 11.3V. This results in a voltage difference of approximately 11.3V between points F and B. According to the voltage divider principle, the voltage between points E and F at this moment is less than the gate-source turn-on voltage V of the PMOS transistor Q3. thThis causes PMOS transistor Q3 to turn on momentarily, resulting in a voltage at point G of 11.3V. Since point D is directly connected to the 12V supply, the gate voltage of Q2 is 12V (voltage at point D), while the source voltage of Q2 is 11.3V (voltage at point G). The +0.7V voltage difference between the gate and source of Q2 causes it to be in a closed state; Q2 is not conducting. Because Q2 is not conducting, the gate voltage of Q1 is pulled low by resistor R1, causing Q1 to also not conduct. This prevents a short circuit caused by a voltage misfiring from the 12V power supply turning on Q1. The presence of PMOS transistor Q2 and resistor R3 provides power-on protection. As capacitor C1 gradually charges, the voltage at point B rises above the discharge threshold voltage V. gate Afterwards, the voltage between points E and F is greater than the turn-on voltage V of PMOS transistor Q3. th At this time, PMOS transistor Q3 becomes non-conducting. All three switching transistors, NMOS transistor Q1, PMOS transistor Q2 and PMOS transistor Q3, are in a non-conducting state. The discharge circuit does not work and will not affect the normal power supply of the device.
[0058] like Figure 4 As shown, before the power outage begins, the voltage at both ends of capacitors C1 and C2 has risen to 11.3V. When the 12V adapter power supply is cut off, the voltage at point A immediately drops to 0V. Diodes D1 and D2 are reverse-biased and cut off, and capacitor C1 continues to supply power to the downstream load. The voltage at point B gradually decreases. Diode D2 being cut off blocks the discharge of capacitor C2. Because resistors R4 and R5 have relatively large resistances, capacitor C2 discharges very slowly through R4 and R5, causing capacitor C1 to discharge much faster than capacitor C2. Therefore, the voltage at point B drops much faster than at point F. When the voltage at point B drops to the discharge threshold voltage V... gate The following conditions will cause the voltage difference between points E and F to be less than the turn-on voltage V of PMOS transistor Q3. th Therefore, PMOS transistor Q3 turns on, and the voltage at point G immediately rises to 11.3V. Because resistor R3 provides a pull-down level to the gate of PMOS transistor Q2, the voltage at point D is 0V, resulting in a voltage difference of approximately -11.3V between points D and G, which causes PMOS transistor Q2 to also turn on. When PMOS transistor Q2 turns on, the voltage of capacitor C2 is smoothly supplied to the gate of NMOS transistor Q1 through PMOS transistors Q2 and Q3, causing the voltage at point C to rise, thus triggering NMOS transistor Q1 to turn on. Capacitor C1 can then be shorted to GND through NMOS transistor Q1 for rapid discharge. Because the resistance in the discharge path of capacitor C2 is very high, the discharge of C2 is very slow. During the discharge process of capacitor C1, C2 maintains a relatively high voltage, allowing Q1 to continue conducting.
[0059] Furthermore, based on the above circuit, even if a 12V power adapter is suddenly connected during a power-down discharge process, the protection circuit composed of PMOS transistor Q2 and resistor R3 will prevent NMOS transistor Q1 from conducting and short-circuiting the power supply. The protection mechanism is as follows: Connecting a 12V power adapter during a power-down discharge process causes the voltage at point D to change from 0V to 12V. Since the voltages at points F and G are always below 12V, the voltage between points D and G is positive. This causes PMOS transistor Q2 to become cut off, preventing capacitor C2 from continuing to provide drive voltage to NMOS transistor Q1. Consequently, the gate voltage of NMOS transistor Q1 is pulled low by resistor R1, causing NMOS transistor Q1 to become cut off, thus preventing the risk of the power supply being short-circuited to GND.
[0060] In summary, this embodiment proposes a fast discharge circuit in a power-down state. It utilizes two voltage divider resistors (R4 and R5) and a PMOS transistor Q3 to determine the discharge threshold value for voltage drop. A capacitor C2, an NMOS transistor Q1, and a resistor R1 form the discharge charge conduction circuit. Because the discharge path resistance of capacitor C2 is very large, the voltage drop across capacitor C2 is very slow, ensuring that the NMOS transistor Q1 remains in the conducting state throughout the discharge process, guaranteeing that the voltage across capacitor C1 can discharge to 0V. The protection circuit composed of the PMOS transistor Q2 and resistor R3 prevents short circuits to the power adapter when the device is powered on. The entire circuit uses only two PMOS transistors, one NMOS transistor, one capacitor, one diode, and four resistors. These nine components work together to achieve the discharge function and prevent short circuits during power-on, ensuring circuit stability. This invention can be used in any electronic product device. Furthermore, besides being built with discrete components, this invention can also be packaged into a chip using integrated circuit design, further reducing circuit space.
[0061] The embodiments described above do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the above embodiments should be included within the scope of protection of this technical solution.
Claims
1. A fast discharge circuit in the event of power failure, configured in parallel with an energy storage element, characterized in that: It includes a switching module and a driving circuit; the input terminal of the switching module and the input terminal of the energy storage element are connected in parallel to a power supply; the driving circuit is connected to the input terminal of the switching module, and the output terminal of the switching module is grounded; one end of the driving circuit is connected to the power supply, and the other end is grounded. In the power-on state, the switch module is in the off state, and there is a voltage U greater than a threshold voltage V gate on the driving circuit; in the power-off state, the voltage U on the energy storage element is less than the threshold voltage V gate , the switch module is turned on, and the energy storage element is grounded through the switch module.
2. The fast discharge circuit in a power-off state according to claim 1, characterized in that: The driving circuit includes a capacitor C2; it also includes a unidirectional conduction module with one end connected to the power supply and the other end connected to the capacitor C2; the other end of the capacitor C2 is grounded. When powered on, capacitor C2 is charged to the power supply voltage value; In the power-off state, the capacitor C2 controls the switching module to be turned on.
3. A quick discharge circuit for a power down state according to claim 2, wherein, Also includes: A power-on protection module is connected between the input terminal of the switch module and the drive circuit; The driving circuit also includes resistors R4 and R5 and MOSFET Q3; The drain of the MOSFET Q3 is connected to the input terminal of the power-on protection module, the source is connected in parallel to the output terminal of the unidirectional conduction module and the capacitor C2, and the gate is connected to the connection terminal of the resistor R4 and the resistor R5; the other end of the resistor R4 is connected to the power supply; the other end of the resistor R5 is connected to the capacitor C2. The threshold voltage V gate is, ; wherein, V in is the input voltage of the power supply; V on is the on voltage drop of the unidirectional conduction module; V gs is the absolute value of the gate-source on voltage of the MOS transistor Q3.
4. The fast discharge circuit in a power-off state according to claim 3, characterized in that: The power-on protection module includes a MOSFET Q2 and a resistor R3; One end of the resistor R3 is connected in parallel to the power supply and the gate of the MOSFET Q2, and the other end of the resistor R3 is grounded; the drain of the MOSFET Q2 is connected to the input terminal of the switching module, and the source is connected to the drain of the MOSFET Q3.
5. A fast discharge circuit in a power-off state according to any one of claims 1 to 4, characterized in that: The switching module includes a MOSFET Q1; The drain of the MOS transistor Q1 is connected to the power supply, the source is grounded, and the gate is connected to the driving circuit.
6. A quick discharge circuit for power down state according to claim 5, wherein, Also includes: The pull-down resistor R1 has one end connected in parallel to the gate of MOSFET Q1 and the drain of MOSFET Q2, and the other end grounded.
7. A quick discharge circuit for power down state according to claim 6, characterized in that, Also includes: The positive input terminal of diode D1 is connected to the power input terminal of the power-on protection module, and the negative output terminal is connected to the power input terminal of the switching module, the drive circuit, and the energy storage element.