A low parasitic inductance double-sided heat dissipation power module
By rationally arranging the double-sided heat dissipation power modules with low parasitic inductance, the problem of balancing heat dissipation and parasitic inductance is solved, achieving efficient heat dissipation and low inductance, and improving the stability of the modules.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- GUILIN UNIV OF ELECTRONIC TECH
- Filing Date
- 2025-07-25
- Publication Date
- 2026-05-26
AI Technical Summary
In existing power module structures, it is difficult to balance heat dissipation and parasitic inductance, resulting in poor heat dissipation and high parasitic inductance.
The power module adopts a low parasitic inductance double-sided heat dissipation design. By rationally arranging the positions of the positive power terminal, output power terminal, upper substrate, lower substrate, upper half-bridge switch chip and lower half-bridge switch chip, a multi-gap, multi-component double-sided heat dissipation structure is formed, which reduces parasitic inductance and improves heat dissipation intensity.
This improved heat dissipation and reduced parasitic inductance, thereby enhancing the module's durability and stability.
Smart Images
Figure CN224290612U_ABST
Abstract
Description
Technical Field
[0001] This utility model specifically relates to a double-sided heat dissipation power module with low parasitic inductance, belonging to the field of high-power electronic device technology. Background Technology
[0002] With the rapid development of new energy vehicles, wind power generation, high-speed rail, 5G networks, and photovoltaic energy storage, high-power electronic devices are playing an increasingly important role in energy conversion, power transmission, and drive systems. To improve their performance, efficiency, and reliability, wide-bandgap semiconductor materials, represented by silicon carbide, have received increasing attention. Currently, the application fields of power semiconductor modules are constantly expanding, and power module packaging faces a series of challenges, including heat dissipation, parasitic inductance, and reliability. For power module heat dissipation, a double-sided heat dissipation structure is currently the most efficient method. Existing single-sided modules can only dissipate heat from the bottom. To improve heat dissipation intensity, multi-sided composite heat dissipation modules are developed. However, such structures can lead to higher parasitic inductance due to their composite nature. The main reasons for this are as follows:
[0003] Firstly, in circuit wiring design, the length of the wire directly affects the inductance. When the wire is relatively long, more magnetic field coupling is generated during signal transmission, which leads to an increase in inductance and introduces parasitic inductance.
[0004] Secondly, when a loop is formed in a circuit board or wire layout, the current flowing through the loop creates a magnetic field, which in turn generates parasitic inductance. The current path in the loop structure will increase the inductance value.
[0005] Furthermore, greater distances between components also lead to increased inductance. When the distance between two components increases, the current needs to flow along a longer path, which generates more magnetic field coupling, thus inducing parasitic inductance.
[0006] Furthermore, in multilayer printed circuit boards or multilayer winding inductors, interlayer and intralayer current paths can cause mutual coupling, which is another important reason for the generation of parasitic inductance. In particular, PCB traces in power circuits and drive circuits, if poorly laid out, can generate significant parasitic inductance.
[0007] The physical structure and layout of components such as high-power switching devices, drive circuits, and protection circuits inside the power module can also generate parasitic inductance. For example, the PCB traces between the power switch and the DC bus, and the loops for drive signals to be transmitted from the driver IC to the gate of the power device, can all generate parasitic inductance.
[0008] In summary, in the current power module structure, parasitic inductance and heat dissipation intensity are inversely related, and it is difficult to simultaneously reduce parasitic inductance and improve heat dissipation intensity. Utility Model Content
[0009] To overcome the shortcomings of existing technologies, a double-sided heat dissipation power module with low parasitic inductance is provided to solve the above problems.
[0010] A low parasitic inductance double-sided heat dissipation power module includes a positive power terminal, an output power terminal, a negative power terminal, an upper substrate, a lower substrate, multiple upper half-bridge switching chips, and multiple lower half-bridge switching chips. The upper and lower substrates are arranged horizontally side-by-side from top to bottom, with a mounting gap between them. The positive power terminal, output power terminal, and negative power terminal are arranged horizontally side-by-side within the mounting gap. The lower substrate includes a base plate, a positive plate, an output plate, a negative plate, a first source metal strip, a first gate metal strip, a second source metal strip, a second gate metal strip, and a negative detection metal strip. The positive plate, output plate, and negative plate are arranged horizontally side-by-side on the base plate along its length. The positive power terminal is connected to the positive plate, and the output power terminal... The output board is connected to the positive terminal, and the negative power terminal is connected to the negative plate. A first L-shaped notch is machined on the outer side of the positive plate. The first source metal strip and the first gate metal strip are horizontally arranged side by side in the first L-shaped notch. The second source metal strip, the second gate metal strip, and the negative detection metal strip are horizontally arranged side by side between the output board and the negative plate. A first gap is formed between the outer side of the positive plate and one side of the first source metal strip. A second gap is formed between the other side of the first source metal strip and the first gate metal strip. A third gap is formed between one side of the output board and one side of the second source metal strip. A fourth gap is formed between the other side of the second source metal strip and one side of the second gate metal strip. A fifth gap is formed between the other side of the second gate metal strip and the negative detection metal strip.
[0011] As a preferred embodiment, the system further includes multiple upper half-bridge switching chips and multiple lower half-bridge switching chips. The multiple upper half-bridge switching chips are arranged horizontally side-by-side on the positive electrode plate along its length, and each upper half-bridge switching chip is connected to a first source metal strip and a first gate metal strip, respectively. The multiple lower half-bridge switching chips are arranged horizontally side-by-side on the output plate along its length, and each lower half-bridge switching chip is connected to a second source metal strip and a second gate metal strip, respectively.
[0012] The number of upper half-bridge switching chips is the same as the number of multiple lower half-bridge switching chips. Each upper half-bridge switching chip corresponds to one lower half-bridge switching chip. Each upper half-bridge switching chip includes a first chip body, a first long bonding wire, and a first short bonding wire. The first chip body is disposed on the positive electrode plate. One end of the first long bonding wire and one end of the first short bonding wire are respectively connected to the first chip body. The other end of the first long bonding wire is connected to the first gate metal strip, and the other end of the first short bonding wire is connected to the first source metal strip. The first long bonding wire is disposed close to the positive power terminal, and the first short bonding wire is disposed away from the positive power terminal.
[0013] Each lower half-bridge switch chip includes a second chip body, a second long bonding wire, and a second short bonding wire. The second chip body is disposed on the output board. One end of the second long bonding wire and one end of the second short bonding wire are respectively connected to the second chip body. The other end of the second long bonding wire is connected to the second gate metal strip, and the other end of the second short bonding wire is connected to the second source metal strip. The second short bonding wire is disposed close to the output power terminal, and the second long bonding wire is disposed away from the output power terminal.
[0014] As a preferred embodiment: a sixth gap is formed between one side of the positive electrode plate and the output plate, and a seventh gap is formed between the other side of the output plate and the negative electrode plate. The seventh gap is connected to the fourth gap and the fifth gap respectively.
[0015] As a preferred embodiment: a first protrusion is integrally connected to the outer side of the positive electrode plate, and a second L-shaped notch is machined on the side of the output plate near the positive electrode plate. The first protrusion is disposed in the second L-shaped notch, and the end and side of the first protrusion near the second L-shaped notch are respectively spaced apart from the second L-shaped notch.
[0016] As a preferred embodiment, it also includes multiple terminals. Multiple terminals are arranged in parallel on the base plate, and a terminal is connected to each of the positive plate, output plate, first source metal strip, first gate metal strip, second source metal strip, second gate metal strip and negative detection metal strip.
[0017] As a preferred embodiment: a temperature sensing component is provided on the main base plate. The temperature sensing component includes a first carrier plate, a second carrier plate, a temperature sampling positive terminal, a temperature sampling negative terminal, and a temperature sensing element. The first carrier plate and the second carrier plate are arranged side by side on the main base plate. The temperature sampling positive terminal and the temperature sampling negative terminal are arranged side by side between multiple terminals. One end of the temperature sampling positive terminal and the temperature sensing element are arranged side by side on the first carrier plate. One end of the temperature sampling negative terminal is arranged on the second carrier plate. The other end of the temperature sampling positive terminal and the other end of the temperature sampling negative terminal are flush with each other.
[0018] As a preferred embodiment, the system further includes a plastic-encapsulated outer frame housing. The plastic-encapsulated outer frame housing is a flat rectangular housing, which is fitted onto an upper substrate and a lower substrate. The plastic-encapsulated outer frame housing includes an upper plate, a lower plate, and a rectangular sleeve. The rectangular sleeve is vertically arranged, with the upper plate integrally connected to the upper end of the rectangular sleeve. The upper plate has an upper hole along its thickness direction that mates with the upper substrate. The lower plate has a lower hole along its thickness direction that mates with the lower substrate. One end of the rectangular sleeve has multiple first through holes along its wall thickness direction that mate with the positive electrode plate, the output plate, and the negative electrode plate. Each of the positive electrode plate, the output plate, and the negative electrode plate has a corresponding first through hole, and the positive electrode plate, the output plate, and the negative electrode plate are respectively inserted into their respective first through holes. The other end of the rectangular sleeve has second through holes along its wall thickness direction that mate with multiple terminals. Each terminal has a corresponding second through hole, and each terminal is inserted into its corresponding second through hole.
[0019] As a preferred embodiment, a connecting pad is provided between the upper substrate and the lower substrate. The connecting pad is a metal connecting block, and the top and bottom of the connecting pad are connected to the upper substrate and the lower substrate, respectively.
[0020] The beneficial effects of this utility model are as follows:
[0021] In this invention, the relative positions and connections between the positive power terminal, output power terminal, negative power terminal, upper substrate, lower substrate, multiple upper half-bridge switching chips, and multiple lower half-bridge switching chips are rationally arranged, forming a multi-gap, multi-component, double-sided heat dissipation arrangement. This not only improves heat dissipation intensity but also reduces parasitic inductance through the relative arrangement of the positive power terminal, output power terminal, negative power terminal, upper substrate, lower substrate, multiple upper half-bridge switching chips, and multiple lower half-bridge switching chips. This achieves a combination of reduced parasitic inductance and improved heat dissipation intensity, thereby enhancing durability and stability during use. Attached Figure Description
[0022] Figure 1 This is a three-dimensional structural diagram of the present invention;
[0023] Figure 2 This is a top view of the structure of this utility model;
[0024] Figure 3 This is a schematic diagram of the three-dimensional structure of the upper half-bridge switching chip;
[0025] Figure 4 This is a top-view perspective view of the three-dimensional structure of the present invention with a plastic-sealed outer frame shell;
[0026] Figure 5 This is a three-dimensional structural diagram of the first part of the present invention, which has a plastic-sealed outer frame shell.
[0027] Figure 6 A three-dimensional structural diagram showing the connection relationship between the upper substrate, the lower substrate, and multiple upper half-bridge switch chips;
[0028] Figure 7 This is a schematic diagram of the second three-dimensional structure of the present invention with a plastic-sealed outer frame shell;
[0029] Figure 8 This is a side view of the structure of the present invention. Both the upper substrate and the lower substrate in the figure are three-layer composite structures.
[0030] Figure 9 This is a schematic diagram of the three-dimensional structure of the upper substrate. The surfaces where the positive and negative electrode metal sheets are located are the bottom surfaces of the upper substrate.
[0031] In the diagram: 1-Positive power terminal; 2-Output power terminal; 3-Negative power terminal; 4-Upper substrate; 4-1-Upper copper layer; 4-2-Intermediate ceramic layer; 4-3-Lower copper layer; 401-Positive metal sheet; 402-Negative metal sheet; 5-Lower substrate; 5-1-Overall base plate; 5-2-Positive plate; 5-2-1-First L-shaped notch; 5-2-2-First protrusion; 5-3-Output plate; 5-3-1-Second L-shaped notch; 5-4-Negative plate; 5-5-First source metal strip; 5-6-First gate metal strip; 5-7-Second source metal strip; 5-8-Second gate metal strip; 5-9-Negative detection metal strip; 7-Upper half-bridge switch chip; 7-1-First chip body; 7-2-First long bond wire; 7-3-First short bond wire ; 8-Lower half-bridge switch chip; 8-1-Second chip body; 8-2-Second long bonding wire; 8-3-Second short bonding wire; 10-Terminal; 11-First carrier board; 12-Second carrier board; 13-Temperature sampling positive terminal; 14-Temperature sampling negative terminal; 15-Temperature sensing element; 16-Connecting pad; 20-Mounting gap; 21-First gap; 22-Second gap; 23-Third gap; 24-Fourth gap; 25-Fifth gap; 26-Sixth gap; 27-Seventh gap; 30-Plastic encapsulated outer frame; 30-1-Upper board; 30-2-Lower board; 30-3-Square sleeve; 30-4-First through hole; 30-5-Second through hole; 31-Upper hole; 32-Lower hole; 33-Upper heat sink layer; 34-Lower heat sink layer. Detailed Implementation
[0032] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.
[0033] Specific implementation method one: Combining Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Figure 9 This embodiment describes a low parasitic inductance double-sided heat dissipation power module, which includes a positive power terminal 1, an output power terminal 2, a negative power terminal 3, an upper substrate 4, a lower substrate 5, multiple upper half-bridge switching chips 7, and multiple lower half-bridge switching chips 8. The upper substrate 4 and the lower substrate 5 are arranged horizontally side-by-side from top to bottom, with a mounting gap 20 formed between them. The positive power terminal 1, the output power terminal 2, and the negative power terminal 3 are arranged horizontally side-by-side in the mounting gap 20. The lower substrate 5 includes a base plate 5-1, a positive electrode plate 5-2, an output plate 5-3, a negative electrode plate 5-4, a first source metal strip 5-5, a first gate metal strip 5-6, a second source metal strip 5-7, a second gate metal strip 5-8, and a negative electrode detection metal strip 5-9. The positive electrode plate 5-2, the output plate 5-3, and the negative electrode plate 5-4 are horizontally arranged side by side on the base plate 5-1 along its length. The positive power terminal 1 is connected to the positive electrode plate 5-2, and the output power terminal 2... Connected to output board 5-3, negative power terminal 3 is connected to negative plate 5-4. A first L-shaped notch 5-2-1 is machined on the outer side of positive plate 5-2. A first source metal strip 5-5 and a first gate metal strip 5-6 are horizontally arranged side-by-side within the first L-shaped notch 5-2-1. A second source metal strip 5-7, a second gate metal strip 5-8, and a negative detection metal strip 5-9 are horizontally arranged side-by-side between output board 5-3 and negative plate 5-4. The outer side of positive plate 5-2 is connected to the first source metal strip 5-2-1. A first gap 21 is formed between one side of the first source metal strip 5-5, a second gap 22 is formed between the other side of the first source metal strip 5-5 and the first gate metal strip 5-6, a third gap 23 is formed between one side of the output board 5-3 and one side of the second source metal strip 5-7, a fourth gap 24 is formed between the other side of the second source metal strip 5-7 and one side of the second gate metal strip 5-8, and a fifth gap 25 is formed between the other side of the second gate metal strip 5-8 and the negative electrode detection metal strip 5-9.
[0034] In this embodiment, the low parasitic inductance double-sided heat dissipation power module forms a multi-directional heat dissipation channel structure through the positional arrangement of the positive power terminal 1, output power terminal 2, negative power terminal 3, upper substrate 4, lower substrate 5, multiple upper half-bridge switching chips 7 and multiple lower half-bridge switching chips 8, and the structural form of the lower substrate 5 itself. This completes the low parasitic inductance high-strength heat dissipation structure under multi-component coupling arrangement.
[0035] Specific Implementation Method Two: This implementation method is a further limitation of Specific Implementation Method One. This implementation method also includes multiple upper half-bridge switching chips 7 and multiple lower half-bridge switching chips 8. The multiple upper half-bridge switching chips 7 are arranged horizontally side by side on the positive electrode plate 5-2 along the length direction of the positive electrode plate 5-2. Each upper half-bridge switching chip 7 is connected to the first source metal strip 5-5 and the first gate metal strip 5-6 respectively. The multiple lower half-bridge switching chips 8 are arranged horizontally side by side on the output plate 5-3 along the length direction of the output plate 5-3. Each lower half-bridge switching chip 8 is connected to the second source metal strip 5-7 and the second gate metal strip 5-8 respectively.
[0036] The number of upper half-bridge switching chips 7 is the same as the number of multiple lower half-bridge switching chips 8. Each upper half-bridge switching chip 7 is correspondingly provided with one lower half-bridge switching chip 8. Each upper half-bridge switching chip 7 includes a first chip body 7-1, a first long bonding wire 7-2, and a first short bonding wire 7-3. The first chip body 7-1 is disposed on the positive electrode plate 5-2. One end of the first long bonding wire 7-2 and one end of the first short bonding wire 7-3 are respectively connected to the first chip body 7-1. The other end of the first long bonding wire 7-2 is connected to the first gate metal strip 5-6. The other end of the first short bonding wire 7-3 is connected to the first source metal strip 5-5. The first long bonding wire 7-2 is disposed close to the positive power terminal 1, and the first short bonding wire 7-3 is disposed away from the positive power terminal 1.
[0037] Each lower half-bridge switch chip 8 includes a second chip body 8-1, a second long bonding wire 8-2, and a second short bonding wire 8-3. The second chip body 8-1 is disposed on the output board 5-3. One end of the second long bonding wire 8-2 and one end of the second short bonding wire 8-3 are respectively connected to the second chip body 8-1. The other end of the second long bonding wire 8-2 is connected to the second gate metal strip 5-8. The other end of the second short bonding wire 8-3 is connected to the second source metal strip 5-7. The second short bonding wire 8-3 is disposed close to the output power terminal 2, and the second long bonding wire 8-2 is disposed away from the output power terminal 2.
[0038] In this embodiment, the structure and working principle of the upper half-bridge switch chip 7 and the lower half-bridge switch chip 8 are the same as those of existing half-bridge switch chips. The difference lies in the configuration of the length of the bonding wires, the connection method of the bonding wires, and the regular arrangement of the positional relationship between the upper half-bridge switch chip 7 and the lower half-bridge switch chip 8.
[0039] Furthermore, each upper half-bridge switch chip 7 is correspondingly provided with a lower half-bridge switch chip 8. The first long bond line 7-2 in each upper half-bridge switch chip 7 is collinear with the second long bond line 8-2 of its corresponding lower half-bridge switch chip 8. That is, the central axis of the length direction of each first long bond line 7-2 is coaxial with the central axis of the length direction of its corresponding second long bond line 8-2, and this direction is in the same direction as the width direction of the overall base plate 5-1. This arrangement helps to improve the overall internal symmetry of the module and the uniform heat dissipation performance.
[0040] Specific Implementation Method 3: This implementation method is a further limitation of Specific Implementation Method 1 or 2. In this implementation method, a first protrusion 5-2-2 is integrally connected to the outer side of the positive electrode plate 5-2. The size of the first protrusion 5-2-2 is matched with the size of the second L-shaped notch 5-3-1. The output plate 5-3 is processed with a second L-shaped notch 5-3-1 on the side near the positive electrode plate 5-2. The first protrusion 5-2-2 is disposed in the second L-shaped notch 5-3-1. One end and one side of the first protrusion 5-2-2 near the second L-shaped notch 5-3-1 are respectively spaced apart from the second L-shaped notch 5-3-1.
[0041] Specific Implementation Method Four: This implementation method is a further limitation of Specific Implementation Method One or Two. In this implementation method, a sixth gap 26 is formed between one side of the positive electrode plate 5-2 and the output plate 5-3, and a seventh gap 27 is formed between the other side of the output plate 5-3 and the negative electrode plate 5-4. The seventh gap 27 is connected to the fourth gap 24 and the fifth gap 25 respectively.
Claims
1. A low parasitic inductance, double-sided heat spreading power module, characterized by: The system includes a positive power terminal (1), an output power terminal (2), a negative power terminal (3), an upper substrate (4), a lower substrate (5), multiple upper half-bridge switching chips (7), and multiple lower half-bridge switching chips (8). The upper substrate (4) and the lower substrate (5) are arranged horizontally side by side from top to bottom, and a mounting gap (20) is formed between the upper substrate (4) and the lower substrate (5). The positive power terminal (1), the output power terminal (2), and the negative power terminal (3) are arranged horizontally side by side within the mounting gap (20). The lower substrate (5) includes a main base plate (5-1), a positive... The plate consists of a positive electrode plate (5-2), an output plate (5-3), a negative electrode plate (5-4), a first source metal strip (5-5), a first gate metal strip (5-6), a second source metal strip (5-7), a second gate metal strip (5-8), and a negative electrode detection metal strip (5-9). The positive electrode plate (5-2), the output plate (5-3), and the negative electrode plate (5-4) are arranged horizontally side by side on the base plate (5-1) along the length of the base plate (5-1). The positive power terminal (1) is connected to the positive electrode plate (5-2), and the output power terminal (2) is connected to the output plate (5-3). The negative power terminal (3) is connected to the negative plate (5-4). The positive plate (5-2) has a first L-shaped notch (5-2-1) on its outer side. The first source metal strip (5-5) and the first gate metal strip (5-6) are horizontally arranged side by side in the first L-shaped notch (5-2-1). The second source metal strip (5-7), the second gate metal strip (5-8), and the negative detection metal strip (5-9) are horizontally arranged side by side between the output plate (5-3) and the negative plate (5-4). The outer side of the positive plate (5-2) is connected to the first source metal strip (5-2-1). A first gap (21) is formed between one side of the first source metal strip (5-5) and the first gate metal strip (5-6), a second gap (22) is formed between the other side of the first source metal strip (5-5) and the first gate metal strip (5-6), a third gap (23) is formed between one side of the output board (5-3) and one side of the second source metal strip (5-7), a fourth gap (24) is formed between the other side of the second source metal strip (5-7) and one side of the second gate metal strip (5-8), and a fifth gap (25) is formed between the other side of the second gate metal strip (5-8) and the negative electrode detection metal strip (5-9).
2. The low-parasitic-inductance, double-sided heat spreading power module of claim 1, wherein: It also includes multiple upper half-bridge switching chips (7) and multiple lower half-bridge switching chips (8). The multiple upper half-bridge switching chips (7) are arranged horizontally side by side on the positive electrode plate (5-2) along the length direction of the positive electrode plate (5-2). Each upper half-bridge switching chip (7) is connected to the first source metal strip (5-5) and the first gate metal strip (5-6) respectively. The multiple lower half-bridge switching chips (8) are arranged horizontally side by side on the output plate (5-3) along the length direction of the output plate (5-3). Each lower half-bridge switching chip (8) is connected to the second source metal strip (5-7) and the second gate metal strip (5-8) respectively. The number of upper half-bridge switching chips (7) is the same as the number of multiple lower half-bridge switching chips (8). Each upper half-bridge switching chip (7) is provided with a corresponding lower half-bridge switching chip (8). Each upper half-bridge switching chip (7) includes a first chip body (7-1), a first long bonding wire (7-2), and a first short bonding wire (7-3). The first chip body (7-1) is disposed on the positive electrode plate (5-2). One end of the first long bonding wire (7-2) and one end of the first short bonding wire (7-3) are respectively connected to the first chip body (7-1). The other end of the first long bonding wire (7-2) is connected to the first gate metal strip (5-6). The other end of the first short bonding wire (7-3) is connected to the first source metal strip (5-5). The first long bonding wire (7-2) is disposed close to the positive power terminal (1), and the first short bonding wire (7-3) is disposed away from the positive power terminal (1). Each lower half-bridge switch chip (8) includes a second chip body (8-1), a second long bonding wire (8-2), and a second short bonding wire (8-3). The second chip body (8-1) is disposed on the output board (5-3). One end of the second long bonding wire (8-2) and one end of the second short bonding wire (8-3) are respectively connected to the second chip body (8-1). The other end of the second long bonding wire (8-2) is connected to the second gate metal strip (5-8). The other end of the second short bonding wire (8-3) is connected to the second source metal strip (5-7). The second short bonding wire (8-3) is disposed close to the output power terminal (2), and the second long bonding wire (8-2) is disposed away from the output power terminal (2).
3. The low-parasitic-inductance double-sided heat spreading power module according to claim 1 or 2, characterized in that: A sixth gap (26) is formed between one side of the positive plate (5-2) and the output plate (5-3), and a seventh gap (27) is formed between the other side of the output plate (5-3) and the negative plate (5-4). The seventh gap (27) is connected to the fourth gap (24) and the fifth gap (25) respectively.
4. The low-parasitic-inductance, double-sided heat spreading power module of claim 3, wherein: The outer side of the positive electrode plate (5-2) is integrally connected with a first protrusion (5-2-2). The output plate (5-3) has a second L-shaped notch (5-3-1) machined on the side near the positive electrode plate (5-2). The first protrusion (5-2-2) is disposed in the second L-shaped notch (5-3-1). One end and one side of the first protrusion (5-2-2) near the second L-shaped notch (5-3-1) are respectively spaced apart from the second L-shaped notch (5-3-1).
5. The low-parasitic-inductance, double-sided heat spreading power module of claim 1, wherein: It also includes multiple terminals (10). Multiple terminals (10) are arranged in parallel on the base plate (5-1). A terminal (10) is connected to each of the positive plate (5-2), the output plate (5-3), the first source metal strip (5-5), the first gate metal strip (5-6), the second source metal strip (5-7), the second gate metal strip (5-8), and the negative detection metal strip (5-9).
6. The low-parasitic-inductance, double-sided heat spreading power module of claim 5, wherein: A temperature sensing component is provided on the base plate (5-1). The temperature sensing component includes a first carrier plate (11), a second carrier plate (12), a temperature sampling positive terminal (13), a temperature sampling negative terminal (14), and a temperature sensing element (15). The first carrier plate (11) and the second carrier plate (12) are arranged side by side on the base plate (5-1). The temperature sampling positive terminal (13) and the temperature sampling negative terminal (14) are arranged side by side between multiple terminals (10). One end of the temperature sampling positive terminal (13) and the temperature sensing element (15) are arranged side by side on the first carrier plate (11). One end of the temperature sampling negative terminal (14) is arranged on the second carrier plate (12). The other end of the temperature sampling positive terminal (13) and the other end of the temperature sampling negative terminal (14) are flush with each other.
7. The low-parasitic-inductance double-sided heat spreading power module of claim 5 or 6, characterized in that: It also includes a plastic-encapsulated outer frame housing (30), which is a flat square housing. The plastic-encapsulated outer frame housing (30) is fitted onto the upper substrate (4) and the lower substrate (5). The plastic-encapsulated outer frame housing (30) includes an upper plate (30-1), a lower plate (30-2), and a square sleeve (30-3). The square sleeve (30-3) is vertically arranged. The upper end of the square sleeve (30-3) is integrally connected to the upper plate (30-1). The upper plate (30-1) is machined with an upper hole (31) along its thickness direction to match the upper substrate (4). The lower end of the square sleeve (30-3) is integrally connected to the lower plate (30-2). The lower plate (30-2) is machined with a lower hole (32) along its thickness direction to match the lower substrate (5). One end of the square sleeve (30-3) is machined with multiple first through holes (30-4) along the thickness direction of its sleeve wall to match the positive electrode plate (5-2), the output plate (5-3) and the negative electrode plate (5-4). Each of the positive electrode plate (5-2), the output plate (5-3) and the negative electrode plate (5-4) is provided with a first through hole (30-4). The positive electrode plate (5-2), the output plate (5-3) and the negative electrode plate (5-4) are respectively passed through their respective first through holes (30-4). The other end of the square sleeve (30-3) is machined with a second through hole (30-5) along the thickness direction of its sleeve wall to match multiple terminals (10). Each terminal (10) is provided with a second through hole (30-5) and each terminal (10) is passed through its corresponding second through hole (30-5).
8. The low-parasitic-inductance, double-sided heat spreading power module of claim 1, wherein: A connecting pad (16) is provided between the upper substrate (4) and the lower substrate (5). The connecting pad (16) is a metal connecting block, and the top and bottom of the connecting pad (16) are connected to the upper substrate (4) and the lower substrate (5) respectively.