Manual test circuit and device for IPM driving board

Abstract

This utility model discloses a manual testing circuit and device for an IPM driver board. The circuit includes VIN, VCC, GND, G, and A terminals, and UH, VH, WH upper bridge input switch groups, N-segment lower bridge input switch groups, and BR, UH, VH, WH, UL, VL, WL output switch groups, respectively connected to the IPM driver board under test. VIN, VCC, and GND terminals are connected to the UH, VH, WH upper bridge input switch groups and the N-segment lower bridge input switch groups, respectively. G and A terminals are connected to the BR, UH, VH, WH, UL, VL, WL output switch groups, respectively. Using the circuit provided by this utility model, the switching function of the IPM driver board under test can be tested individually. By setting the UH, VH, WH upper bridge switch groups to control the individual power supply of the upper bridge arms of the IPM driver board under test, and by switching the N-segment lower bridge input switch groups to control the individual power supply of each phase of the lower bridge arm, fault analysis of a single bridge arm can be achieved. This allows for the screening of problematic IPM module driver boards before assembly, reducing losses caused by overall module test failures.

Description

Technical Field

[0001] This utility model relates to the field of IPM module driver board parameter testing technology, and particularly to rapid testing of the switching function of IPM module driver boards, especially to a manual testing circuit and device for IPM driver boards. Background Technology

[0002] An IPM (Intelligent Power Module) is an advanced switching power device that combines the advantages of high current density, low saturation voltage, and high voltage withstand capability of a GTR (High Power Transistor) with the advantages of high input impedance, high switching frequency, and low drive power of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Furthermore, IPMs integrate logic, control, detection, and protection circuits, making them easy to use. This not only reduces system size and development time but also significantly enhances system reliability, aligning with the current development trend of power devices—modularization, composite design, and power integrated circuits (PICs)—and leading to their increasingly widespread application in the power electronics field. After production, IPMs require testing fixtures for inspection to ensure quality.

[0003] However, current testing methods are all aimed at testing the overall function of the IPM module. They mainly focus on testing the overall function of the IPM module and do not have methods or devices for testing the switching function of the driver board. They are functional tests of the power and driver sections after assembly. If a failure occurs during the test, the loss to the module will be significant. Utility Model Content

[0004] Therefore, the purpose of this utility model is to at least partially address the shortcomings of the prior art, thereby proposing a manual testing circuit and device for an IPM driver board.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] This utility model provides a manual test circuit for an IPM driver board, including a VIN terminal, a VCC terminal, a GND terminal, a G terminal, an A terminal, a UH upper bridge input switch group, a VH upper bridge input switch group, a WH upper bridge input switch group, an N board lower bridge input switch group, a BR output switch group, a UH output switch group, a VH output switch group, a WH output switch group, a UL output switch group, a VL output switch group, and a WL output switch group. The VIN terminal, VCC terminal, and GND terminal are respectively connected to the UH upper bridge input switch group, the VH upper bridge input switch group, and the WH upper bridge input switch group. The N-segment lower bridge input switch group is connected, and the G terminal and the A terminal are respectively connected to the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. The UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, N-segment lower bridge input switch group, BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the IPM driver board under test.

[0007] Furthermore, the UH upper bridge input switch group includes a first GND upper bridge logic power ground switch, a first FO upper bridge fault output switch, an UP upper bridge logic input switch, and a first VCC upper bridge logic power switch, all connected to the logic input terminals of the IPM driver board under test. The first GND upper bridge logic power ground switch is connected to the GND terminal, the first FO upper bridge fault output switch is connected to the VCC terminal, the UP upper bridge logic input switch is connected to the VIN terminal, and the first VCC upper bridge logic power switch is connected to the VCC terminal.

[0008] Furthermore, the VH upper bridge input switch group includes a second GND upper bridge logic power ground switch, a second FO upper bridge fault output switch, a VP upper bridge logic input switch, and a second VCC upper bridge logic power switch, all connected to the logic input terminal of the IPM driver board under test. The second GND upper bridge logic power ground switch is connected to the GND terminal, the second FO upper bridge fault output switch is connected to the VCC terminal, the VP upper bridge logic input switch is connected to the VIN terminal, and the second VCC upper bridge logic power switch is connected to the VCC terminal.

[0009] Furthermore, the WH upper bridge input switch group includes a third GND upper bridge logic power ground switch, a third FO upper bridge fault output switch, a WP upper bridge logic input switch, and a third VCC upper bridge logic power switch, all connected to the logic input terminals of the IPM driver board under test. The third GND upper bridge logic power ground switch is connected to the GND terminal, the third FO upper bridge fault output switch is connected to the VCC terminal, the WP upper bridge logic input switch is connected to the VIN terminal, and the third VCC upper bridge logic power switch is connected to the VCC terminal.

[0010] Furthermore, the N-segment lower bridge input switch group includes a GND lower bridge logic power ground switch, a VCC lower bridge logic power switch, a BR unit input switch, an UN lower bridge input switch, a VN lower bridge input switch, a WN lower bridge input switch, and an FO lower bridge fault output switch, all connected to the logic input terminals of the IPM driver board under test. The UN lower bridge input switch, VN lower bridge input switch, and WN lower bridge input switch correspond to the UH upper bridge input switch group, VH upper bridge input switch group, and WH upper bridge input switch group. The GND lower bridge logic power ground switch is connected to the GND terminal, the VCC lower bridge logic power switch is connected to the VCC terminal, the BR unit input switch, UN lower bridge input switch, VN lower bridge input switch, and WN lower bridge input switch are respectively connected to the VIN terminal, and the FO lower bridge fault output switch is connected to the VCC terminal.

[0011] Furthermore, the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the logic output terminal of the IPM driver board under test, and each of the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group includes two switches, which are respectively connected to the A terminal and the G terminal, and one of the two switches is also connected to a capacitor.

[0012] Furthermore, a resistor is connected to the VIN terminal, and the resistor is connected to the UH upper bridge input switch group, the VH upper bridge input switch group, the WH upper bridge input switch group, and the N-plate lower bridge input switch group.

[0013] This application also provides a manual testing device for an IPM driver board, including the manual testing circuit for the IPM driver board described in any of the above claims, and further including a low-voltage power supply, a signal generator, an oscilloscope, and a voltage probe. The oscilloscope is connected to the A terminal and the G terminal through the voltage probe. The low-voltage power supply is connected to the VCC terminal, and the signal generator is connected to the VIN terminal.

[0014] This utility model provides a manual testing circuit and device for an IPM driver board. The circuit includes a VIN terminal, a VCC terminal, a GND terminal, a G terminal, an A terminal, a UH upper bridge input switch group, a VH upper bridge input switch group, a WH upper bridge input switch group, an N board lower bridge input switch group, a BR output switch group, a UH output switch group, a VH output switch group, a WH output switch group, a UL output switch group, a VL output switch group, and a WL output switch group. The VIN terminal, VCC terminal, and GND terminal are respectively connected to the UH upper bridge input switch group, the VH upper bridge input switch group, and the WH upper bridge input switch group. The switch group and the N-segment lower bridge input switch group are connected. The G terminal and the A terminal are respectively connected to the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. The UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, N-segment lower bridge input switch group, BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the IPM driver board under test. The circuit provided by this utility model allows for separate testing of the switching function of the IPM driver board under test. By setting the UH, VH, and WH upper bridge board switches, the power supply of the upper bridge arm of the IPM driver board under test is controlled separately. By controlling the power supply of each phase of the lower bridge arm through the switches in the N board lower bridge input switch group, fault analysis of a single bridge arm can be achieved. Problematic IPM module driver boards can be screened out before assembly, reducing losses caused by overall module test failure. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the manual test circuit for the IPM driver board of this utility model.

[0017] Figure 2 The waveform diagram is a test waveform diagram of the IPM drive manual test device of this utility model. Detailed Implementation

[0018] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0019] It should be noted that the descriptions involving "first," "second," etc., in this utility model are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this utility model.

[0020] Please refer to Figure 1 This utility model provides a manual test circuit for an IPM driver board, including a VIN terminal, a VCC terminal, a GND terminal, a G terminal, an A terminal, a UH upper bridge input switch group, a VH upper bridge input switch group, a WH upper bridge input switch group, an N board lower bridge input switch group, a BR output switch group, a UH output switch group, a VH output switch group, a WH output switch group, a UL output switch group, a VL output switch group, and a WL output switch group. The VIN terminal, VCC terminal, and GND terminal are respectively connected to the UH upper bridge input switch group, the VH upper bridge input switch group, and the WH upper bridge input switch group. The N-segment lower bridge input switch group is connected, and the G terminal and the A terminal are respectively connected to the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. The UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, N-segment lower bridge input switch group, BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the IPM driver board under test.

[0021] In this embodiment, the manual test circuit for the IPM driver board is used to test the switching function of the IPM driver board under test. The circuit includes logic input terminals and logic output terminals corresponding to the IPM driver board under test.

[0022] Specifically, the circuit also includes multiple VIN, VCC, GND, G, and A terminals. The VCC terminal is the power supply interface of the circuit, the VIN terminal is the signal input interface of the circuit, the GND terminal is the input ground terminal of the circuit, the A terminal is the fault output detection interface of the circuit, and the G terminal is the gate detection interface of the circuit. The above interfaces are used to supply power to the circuit and to detect whether there is a fault in the IPM driver board under test.

[0023] Specifically, the circuit comprises two parts. One part corresponds to the logic input terminals of the IPM driver board under test, consisting of the UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, and N-segment lower bridge input switch group, which are connected to and correspond to the upper bridge logic input terminals of the IPM driver board under test. The UH, VH, and WH upper bridge input switch groups are used to control the individual power supply of each phase of the upper bridge arm of the IPM driver board under test through their switches, thereby detecting whether there is a fault in the upper bridge arm of the IPM driver board under test. The N-segment lower bridge input switch group is equipped with multiple switches for controlling the individual power supply of each phase of the lower bridge arm of the IPM driver board under test, as well as switches for the braking unit, and corresponds to the logic input terminals of the lower bridge unit and braking unit of the IPM driver board under test, thereby detecting whether there is a fault in the lower bridge arm of the IPM driver board under test.

[0024] The other part corresponds to the logic output terminals of the IPM driver board under test, namely the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. These are connected to the logic output terminals of the IPM driver board under test, with the BR output switch group being the braking unit. This allows for the detection of faults in the upper bridge, lower bridge, and braking unit of the IPM driver board under test, enabling fault analysis of individual bridge arms. It allows for the screening of problematic IPM module driver boards before assembly, reducing losses caused by overall module test failures.

[0025] Furthermore, the UH upper bridge input switch group includes a first GND upper bridge logic power ground switch SW1, a first FO upper bridge fault output switch SW2, an UP upper bridge logic input switch SW3, and a first VCC upper bridge logic power switch SW4, all connected to the logic input terminals of the IPM driver board under test. The first GND upper bridge logic power ground switch SW1 is connected to the GND terminal, the first FO upper bridge fault output switch SW2 is connected to the VCC terminal, the UP upper bridge logic input switch SW3 is connected to the VIN terminal, and the first VCC upper bridge logic power switch SW4 is connected to the VCC terminal.

[0026] In this embodiment, the UH upper bridge input switch group includes multiple switches that correspond to and are connected to the logic input terminals of the UH upper bridge arm of the IPM driver board under test. The first GND upper bridge logic power ground switch SW1, the first FO upper bridge fault output terminal switch SW2, the UP upper bridge logic input terminal switch SW3, and the first VCC upper bridge logic power switch SW4 respectively detect the specific location of the fault in the UH upper bridge arm of the IPM driver board under test by controlling the power supply and logic input of the control circuit.

[0027] Furthermore, the VH upper bridge input switch group includes a second GND upper bridge logic power ground switch SW5, a second FO upper bridge fault output switch SW6, a VP upper bridge logic input switch SW7, and a second VCC upper bridge logic power switch SW8, all connected to the logic input terminals of the IPM driver board under test. The second GND upper bridge logic power ground switch SW5 is connected to the GND terminal, the second FO upper bridge fault output switch SW6 is connected to the VCC terminal, the VP upper bridge logic input switch SW7 is connected to the VIN terminal, and the second VCC upper bridge logic power switch SW8 is connected to the VCC terminal.

[0028] In this embodiment, the VH upper bridge input switch group includes multiple switches that correspond to and are connected to the logic input terminals of the VH upper bridge arm of the IPM driver board under test. The second GND upper bridge logic power ground switch SW5, the second FO upper bridge fault output terminal switch SW6, the VP upper bridge logic input terminal switch SW7, and the second VCC upper bridge logic power switch SW8 respectively detect the specific location of the fault in the VH upper bridge arm of the IPM driver board under test by controlling the power supply and logic input of the control circuit.

[0029] Furthermore, the WH upper bridge input switch group includes a third GND upper bridge logic power ground switch SW9, a third FO upper bridge fault output switch SW10, a WP upper bridge logic input switch SW11, and a third VCC upper bridge logic power switch SW12, all connected to the logic input terminals of the IPM driver board under test. The third GND upper bridge logic power ground switch SW9 is connected to the GND terminal, the third FO upper bridge fault output switch SW10 is connected to the VCC terminal, the WP upper bridge logic input switch SW11 is connected to the VIN terminal, and the third VCC upper bridge logic power switch SW12 is connected to the VCC terminal.

[0030] In this embodiment, the WH upper bridge input switch group includes multiple switches that correspond to and are connected to the logic input terminals of the WH upper bridge arm of the IPM driver board under test. The third GND upper bridge logic power ground switch SW9, the third FO upper bridge fault output terminal switch SW10, the WP upper bridge logic input terminal switch SW11, and the third VCC upper bridge logic power switch SW12 respectively detect the specific location of the fault in the WH upper bridge arm of the IPM driver board under test by controlling the power supply and logic input of the control circuit.

[0031] Furthermore, the N-block lower bridge input switch group includes a GND lower bridge logic power ground switch SW13, a VCC lower bridge logic power switch SW14, a BR unit input switch SW15, an UN lower bridge input switch SW16, a VN lower bridge input switch SW17, a WN lower bridge input switch SW18, and a FO lower bridge fault output switch SW19, all connected to the logic input terminals of the IPM driver board under test. The UN lower bridge input switches SW16, VN lower bridge input switches SW17, and WN lower bridge input switches SW18 are connected to the logic input terminals of the IPM driver board under test. The UH upper bridge input switch group, VH upper bridge input switch group, and WH upper bridge input switch group correspond to each other. The GND lower bridge logic power ground switch SW13 is connected to the GND terminal, the VCC lower bridge logic power switch SW14 is connected to the VCC terminal, the BR unit input switch SW15, UN lower bridge input switch SW16, VN lower bridge input switch SW17, and WN lower bridge input switch SW18 are respectively connected to the VIN terminal, and the FO lower bridge fault output terminal switch SW19 is connected to the VCC terminal.

[0032] In this embodiment, the N-block lower bridge input switch group also includes multiple switches corresponding to the logic input terminals of the IPM driver board under test, namely, GND lower bridge logic power ground switch SW13, VCC lower bridge logic power switch SW14, BR unit input switch SW15, UN lower bridge input switch SW16, VN lower bridge input switch SW17, WN lower bridge input switch SW18, and FO lower bridge fault output terminal switch SW19. These switches can be used to control the power supply and logic input of the circuit to detect whether there are faults in the braking unit, UN lower bridge arm, VN lower bridge arm, and WN lower bridge arm of the IPM driver board under test. Specifically, the BR unit input switch SW15 corresponds to the braking unit of the IPM driver board under test.

[0033] Furthermore, the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the logic output terminal of the IPM driver board under test, and each of the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group includes two switches, which are respectively connected to the A terminal and the G terminal, and one of the two switches is also connected to a capacitor.

[0034] In this embodiment, the circuit also includes BR output switch groups, UH output switch groups, VH output switch groups, WH output switch groups, UL output switch groups, VL output switch groups, and WL output switch groups corresponding to the logic output terminals of the IPM driver board under test. Each switch group has two switches to control the signal output of each upper bridge arm, lower bridge arm, and brake unit, thereby detecting where the fault exists. Specifically, the BR output switch group includes two switches, SW20 and SW21; the UH output switch group includes two switches, SW22 and SW23; the VH output switch group includes two switches, SW24 and SW26; the WH output switch group includes two switches, SW25 and SW27; the UL output switch group includes two switches, SW28 and SW30; the VL output switch group includes two switches, SW29 and SW31; and the WL output switch group includes two switches, SW32 and SW34. Furthermore, the two switches in the switch group are connected to terminals A and C respectively. In each switch group, one switch is also connected to a capacitor. The function of the capacitor is to filter the DC or AC signal in the circuit, thereby making the voltage smoother.

[0035] Furthermore, a resistor is connected to the VIN terminal, and the resistor is connected to the UH upper bridge input switch group, the VH upper bridge input switch group, the WH upper bridge input switch group, and the N-plate lower bridge input switch group.

[0036] In this embodiment, a resistor is connected in series at the VIN terminal to limit the input current at the VIN terminal, thereby limiting the current and protecting the circuit.

[0037] This application also provides a manual testing device for an IPM driver board, including the manual testing circuit for the IPM driver board described in any of the above claims, and further including a low-voltage power supply, a signal generator, an oscilloscope, and a voltage probe. The oscilloscope is connected to the A terminal and the G terminal through the voltage probe. The low-voltage power supply is connected to the VCC terminal, and the signal generator is connected to the VIN terminal.

[0038] In this embodiment, the VCC terminal is the power supply interface of the device, which can be powered by a low-voltage DC power supply; the VIN terminal is the signal input interface of the device, which can be set by connecting a signal generator; the A terminal is the fault output detection interface of the device, which uses an oscilloscope to read the waveform through a voltage probe and calculate the output voltage value; the G terminal is the gate detection interface of the device, which uses an oscilloscope to read the waveform through a voltage probe and calculate the gate switching action time and the peak values ​​of high and low level voltages.

[0039] Furthermore, the specific testing method for this test circuit and device is as follows:

[0040] 1. Connect a low-voltage DC power supply between the VCC terminal and the GND terminal, with an input voltage of 15V;

[0041] 2. Connect a signal generator between the VIN and GND terminals and input a square wave signal with a high level of 5V and a low level of 0V.

[0042] 3. Connect the oscilloscope voltage probe between terminal A and GND, and between terminal G and GND respectively;

[0043] 4. Connect the IPM driver board under test into the test device;

[0044] 5. Turn on all input switches SW1-SW19 on the test board, turn on the DC power supply and signal generator, and then turn on the corresponding switches SW20 and SW21 of the output switch group BR. Record the A and G output waveforms of this brake unit bridge arm on the oscilloscope's first and second channels. After recording, turn off switches SW20 and SW21. Also, turn on and off switches SW22-SW34 of the logic output terminals corresponding to the upper and lower bridge arms UH, VH, WH, UL, VL, and WL in the same manner. Then record the A and G waveforms of each bridge arm on the oscilloscope's first and second channels. Channel one is the G output waveform, outputting a 15V to 0V switching square wave to test the driver board's switching function. Channel two is the A output waveform, used to test the voltage value of the driver board's faulty output terminal. The test waveforms are as follows: Figure 2 ;

[0045] 6. Verify that the waveform of the first channel, the gate switch action time, and the peak values ​​of the high and low level voltages are all within the required range. If the waveform of the second channel and the output voltage value are both within the required range, the test is complete. Then, turn off the signal generator and the DC power supply.

[0046] 7. If the IPM driver board under test is malfunctioning, the power supply to each phase of the upper bridge arm can be controlled separately by the switches in the UH upper bridge input switch group, VH upper bridge input switch group, and WH upper bridge input switch group of the logic input terminals, and the power supply to each phase of the lower bridge arm can be controlled separately by the switches in the N board, thereby realizing the fault analysis of a single bridge arm.

[0047] This utility model provides a manual testing circuit and device for an IPM driver board. The circuit includes a VIN terminal, a VCC terminal, a GND terminal, a G terminal, an A terminal, a UH upper bridge input switch group, a VH upper bridge input switch group, a WH upper bridge input switch group, an N board lower bridge input switch group, a BR output switch group, a UH output switch group, a VH output switch group, a WH output switch group, a UL output switch group, a VL output switch group, and a WL output switch group. The VIN terminal, VCC terminal, and GND terminal are respectively connected to the UH upper bridge input switch group, the VH upper bridge input switch group, and the WH upper bridge input switch group. The switch group and the N-segment lower bridge input switch group are connected. The G terminal and the A terminal are respectively connected to the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. The UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, N-segment lower bridge input switch group, BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the IPM driver board under test. The circuit provided by this utility model allows for separate testing of the switching function of the IPM driver board under test. By setting the UH, VH, and WH upper bridge board switches, the power supply of the upper bridge arm of the IPM driver board under test is controlled separately. By controlling the power supply of each phase of the lower bridge arm through the switches in the N board lower bridge input switch group, fault analysis of a single bridge arm can be achieved. Problematic IPM module driver boards can be screened out before assembly, reducing losses caused by overall module test failure.

[0048] It should be noted that the various embodiments in this utility model are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0049] It should also be noted that, in the present invention, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0050] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined in the present invention may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A manual test circuit for an IPM driver board, characterized in that, The circuit includes VIN, VCC, GND, G, A, UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, N-segment lower bridge input switch group, BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. The VIN, VCC, and GND terminals are respectively connected to the UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, and N-segment lower bridge input switch group. The G terminal and the A terminal are respectively connected to the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group. The UH upper bridge input switch group, VH upper bridge input switch group, WH upper bridge input switch group, N board lower bridge input switch group, BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the IPM driver board under test.

2. The manual test circuit for the IPM driver board according to claim 1, characterized in that, The UH upper bridge input switch group includes a first GND upper bridge logic power ground switch, a first FO upper bridge fault output switch, an UP upper bridge logic input switch, and a first VCC upper bridge logic power switch, all connected to the logic input terminals of the IPM driver board under test. The first GND upper bridge logic power ground switch is connected to the GND terminal, the first FO upper bridge fault output switch is connected to the VCC terminal, the UP upper bridge logic input switch is connected to the VIN terminal, and the first VCC upper bridge logic power switch is connected to the VCC terminal.

3. The manual test circuit for the IPM driver board according to claim 1, characterized in that, The VH upper bridge input switch group includes a second GND upper bridge logic power ground switch, a second FO upper bridge fault output switch, a VP upper bridge logic input switch, and a second VCC upper bridge logic power switch, all connected to the logic input terminal of the IPM driver board under test. The second GND upper bridge logic power ground switch is connected to the GND terminal, the second FO upper bridge fault output switch is connected to the VCC terminal, the VP upper bridge logic input switch is connected to the VIN terminal, and the second VCC upper bridge logic power switch is connected to the VCC terminal.

4. The manual test circuit for the IPM driver board according to claim 1, characterized in that, The WH upper bridge input switch group includes a third GND upper bridge logic power ground switch, a third FO upper bridge fault output switch, a WP upper bridge logic input switch, and a third VCC upper bridge logic power switch, all connected to the logic input terminals of the IPM driver board under test. The third GND upper bridge logic power ground switch is connected to the GND terminal, the third FO upper bridge fault output switch is connected to the VCC terminal, the WP upper bridge logic input switch is connected to the VIN terminal, and the third VCC upper bridge logic power switch is connected to the VCC terminal.

5. The manual test circuit for the IPM driver board according to claim 1, characterized in that, The N-segment lower bridge input switch group includes a GND lower bridge logic power ground switch, a VCC lower bridge logic power switch, a BR unit input switch, an UN lower bridge input switch, a VN lower bridge input switch, a WN lower bridge input switch, and an FO lower bridge fault output switch, all connected to the logic input terminals of the IPM driver board under test. The UN lower bridge input switch, VN lower bridge input switch, and WN lower bridge input switch correspond to the UH upper bridge input switch group, VH upper bridge input switch group, and WH upper bridge input switch group. The GND lower bridge logic power ground switch is connected to the GND terminal, the VCC lower bridge logic power switch is connected to the VCC terminal, the BR unit input switch, UN lower bridge input switch, VN lower bridge input switch, and WN lower bridge input switch are respectively connected to the VIN terminal, and the FO lower bridge fault output switch is connected to the VCC terminal.

6. The manual test circuit for the IPM driver board according to claim 1, characterized in that, The BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group are respectively connected to the logic output terminals of the IPM driver board under test. Each of the BR output switch group, UH output switch group, VH output switch group, WH output switch group, UL output switch group, VL output switch group, and WL output switch group includes two switches. The two switches are respectively connected to the A terminal and the G terminal. One of the two switches is also connected to a capacitor.

7. The manual test circuit for the IPM driver board according to claim 1, characterized in that, A resistor is connected to the VIN terminal, and the resistor is connected to the UH upper bridge input switch group, the VH upper bridge input switch group, the WH upper bridge input switch group, and the N board lower bridge input switch group.

8. A manual testing device for an IPM driver board, characterized in that, The manual test circuit for the IPM driver board as described in any one of claims 1-7 further includes a low-voltage power supply, a signal generator, an oscilloscope, and a voltage probe. The oscilloscope is connected to the A terminal and the G terminal through the voltage probe. The low-voltage power supply is connected to the VCC terminal, and the signal generator is connected to the VIN terminal.

Images