A small power module with top heat dissipation

Abstract

A small power module with top heat dissipation relates to the technical field of semiconductor. It comprises a positive metal layer, a bottom of which is connected with an insulating substrate, and a top of which is provided with an upper bridge power chip; a positive pin, one end of which is connected with the positive metal layer, and the other end of which extends out of a plastic package; and an output metal layer, which is diagonally arranged on the insulating substrate with the positive metal layer, and comprises an output first connecting part, an output second connecting part and a lower bridge chip mounting position for arranging a lower bridge power chip which are connected in sequence. The power module volume of the prior art product is reduced by one third, and the volume reduction not only saves the cost, but also improves the electrical performance of the module, such as the reduction of parasitic inductance and parasitic resistance.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, and in particular to a small power module with top heat dissipation. Background Technology

[0002] The top-heat-dissipating power module includes a molding compound, an insulating substrate, pins, and a power chip. According to GB4943.1-2011 "Safety of Information Technology Equipment Part 1: General Requirements," once the material components and the pollution level of the working environment are determined, the creepage distance between pins is proportional to the effective operating voltage. In existing products, the positive, negative, and output pins are located on the same side of the molding compound, which limits the further reduction in the size of the power module.

[0003] To address the aforementioned issues, existing patent literature, such as the semiconductor package including embedded electrical conductors disclosed on November 10, 2023 (application number 202310508724.6), primarily targets Q-DPAK products. Q-DPAK is compatible with various circuit topologies, including half-bridge circuits. This structure has two pads on top, with some terminals directly connected to these pads, and some pins connected by electrical conductors. Although the size is significantly reduced, the distance between the positive and negative electrodes is only 5.56mm, which fails to meet the minimum creepage distance requirements in safety regulations (contamination level 2, material level I, effective operating voltage 1200V).

[0004] Therefore, how to reduce the size of small power modules and improve their electrical performance through design layout is a technical problem that urgently needs to be solved in this case. Utility Model Content

[0005] To address the above problems, this utility model provides a compact, small-sized power module with top heat dissipation that features a compact structure, reduced size, and improved electrical performance.

[0006] The technical solution of this utility model is:

[0007] A top-heat-dissipating small power module, comprising:

[0008] The positive electrode metal layer is connected to the insulating substrate at the bottom and has an upper bridge power chip at the top.

[0009] The positive electrode pin has one end connected to the positive electrode metal layer and the other end extending out of the plastic package.

[0010] An output metal layer is disposed diagonally on the insulating substrate opposite to the positive electrode metal layer, and includes an output first connection portion, an output second connection portion, and a lower bridge chip mounting position for mounting a lower bridge power chip, which are connected in sequence.

[0011] The output pins include a first output pin and a second output pin; one end of the first output pin is fixedly disposed on the first output connection portion, and the other end extends out of the plastic package; the second output pin is fixedly disposed on the second output connection portion, and the other end extends out of the plastic package.

[0012] A negative electrode metal layer (230) is disposed on the insulating substrate and located on the side of the output metal layer;

[0013] The negative electrode pin has one end connected to the negative electrode metal layer and the other end extending out of the plastic package, located on the same side as the positive electrode pin;

[0014] The upper bridge drive pin is arranged side by side and adjacent to the output pin (400), and is located on the side of the upper bridge power chip;

[0015] The lower bridge drive pin is arranged side by side and adjacent to the negative pin (900), and is located on the side of the lower bridge power chip;

[0016] The top surface of the upper bridge power chip is connected to the output metal layer; the top surface of the lower bridge power chip is connected to the negative electrode metal layer.

[0017] Specifically, the top surface of the upper bridge power chip is also connected to the upper bridge drive pin, and the top surface of the lower bridge power chip is also connected to the lower bridge drive pin.

[0018] Specifically, the positive electrode metal layer, the output metal layer, and the negative electrode metal layer are all disposed on the same side of the insulating substrate;

[0019] An external metal layer is provided on the other side of the insulating substrate.

[0020] Specifically, the upper bridge drive pins include those spaced apart:

[0021] The upper bridge gate pin has one end connected to the insulating substrate and the other end extending out of the plastic package.

[0022] The upper bridge source or emitter drive pin is located on the side of the upper bridge gate pin, with one end connected to the insulating substrate and the other end extending out of the plastic package.

[0023] The lower bridge drive pins include those spaced apart:

[0024] The lower bridge gate pin has one end connected to the insulating substrate and the other end extending out of the plastic package.

[0025] The second lower bridge source or emitter drive pin is located on the side of the lower bridge gate pin, with one end connected to the insulating substrate and the other end extending out of the plastic package.

[0026] Specifically, the upper bridge power chip and the lower bridge power chip are IGBT chips or MOSFET chips;

[0027] The upper bridge gate pin is electrically connected to the gate of the upper bridge power chip through the upper bridge gate metal layer;

[0028] The upper bridge source or emitter drive pin is electrically connected to the source or emitter of the upper bridge power chip through the upper bridge source or emitter metal layer.

[0029] The lower bridge gate pin is electrically connected to the gate of the lower bridge power chip through the lower bridge gate metal layer;

[0030] The second lower bridge source or emitter drive pin is electrically connected to the source or emitter of the lower bridge power chip through the lower bridge source or emitter metal layer.

[0031] Specifically, the first output pin is a plurality of single pins spaced apart or a combination of pins;

[0032] The width of the combined pins is greater than the width of a single pin.

[0033] Specifically, the lower bridge gate pin, the lower bridge source or emitter drive pin 2, and the negative pin are symmetrical to the positive pin along the center line of the plastic package, respectively.

[0034] The positive terminal pin, the negative terminal pin (900), the lower bridge gate pin, and the lower bridge source or emitter drive pin are symmetrical to the corresponding output pin, the upper bridge gate pin, and the upper bridge source or emitter pin along the center line of the plastic package.

[0035] Specifically, the output metal layer has an L-shaped structure;

[0036] The width of the first connecting part is smaller than the width of the second connecting part.

[0037] Specifically, the output metal layer is provided with an upper bridge power chip connection area extending toward the negative electrode metal layer;

[0038] The negative electrode metal layer has a lower bridge power chip connection area extending toward the output metal layer.

[0039] Specifically, the width of the upper bridge power chip connection area gradually narrows from the output pin to the negative pin;

[0040] The width of the connection area of ​​the lower bridge power chip gradually narrows from the negative pin to the output pin.

[0041] In this design, the positive, negative, and lower bridge drive pins are located on the same side of the molding compound, while the output and upper bridge drive pins are located on opposite sides. The upper bridge gate, source, or emitter pins are arranged side-by-side with the output pins, and the distance between them can be relatively close. However, considering that the molding compound will bear pressure and transmit that pressure to the pins, to ensure uniform force distribution on the pins, the output pins are divided into two parts. One part is adjacent to the upper bridge gate and source / emitter pins, while the other part is far away from them, thus forming a symmetrical arrangement. This effectively reduces the volume of the power module of the same product in the prior art by one-third. The reduction in volume not only saves costs but also improves the electrical performance of the module, such as reducing parasitic inductance and parasitic resistance. Attached Figure Description

[0042] Figure 1 This is a structural schematic diagram of Embodiment 1;

[0043] Figure 2 This is a schematic diagram of the freewheeling circuit of this utility model (dashed line portion);

[0044] Figure 3 This is a schematic diagram of the structure in Embodiment 2 when a groove is used;

[0045] Figure 4 This is a schematic diagram of the structure in Embodiment 2 when it features a protrusion;

[0046] Figure 5 This is a schematic diagram of the structure in Embodiment 2, where the positive electrode, negative electrode, and output pin each have a forked opening;

[0047] Figure 6 This is a structural schematic diagram of Embodiment 3;

[0048] Figure 7 This is a structural schematic diagram of Embodiment 4;

[0049] Figure 8 This is a schematic diagram of the structure when the upper and lower bridge chips each use diode chips;

[0050] Figure 9 This is a schematic diagram of a structure where the lower bridge chip uses a diode chip and the upper bridge chip uses an IGBT or MOSFET chip.

[0051] 100 in the image represents the plastic sealant.

[0052] 200 is the insulating substrate, 210 is the positive electrode metal layer, 220 is the output metal layer, 221 is the first output connection portion, 222 is the second output connection portion, 223 is the lower bridge chip mounting position, and 224 is the upper bridge power chip connection area.

[0053] 230 is the negative electrode metal layer, and 231 is the lower-bridge power chip connection area.

[0054] 300 is the positive pin.

[0055] 400 is the output pin, 401 is the first output pin, and 402 is the second output pin.

[0056] 500 is the upper-bridge power chip.

[0057] 600 is the lower-bridge power chip.

[0058] 700 is the upper bridge drive pin, 710 is the upper bridge gate pin, and 720 is the upper bridge source or emitter drive pin.

[0059] 800 is the lower-bridge driver pin, 810 is the lower-bridge gate pin, and 820 is the lower-bridge source or emitter driver pin.

[0060] 900 is the negative pin. Detailed Implementation

[0061] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model, and should not be construed as limiting this utility model.

[0062] In the description of this utility model, it should be understood that the terms "upper," "lower," "left," "right," "vertical," and "horizontal," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. In the description of this utility model, unless otherwise stated, "a plurality of" means two or more.

[0063] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0064] Example 1

[0065] like Figure 1-2As shown, a top-heat-dissipating small power module includes:

[0066] The upper-bridge power chip 500 and the lower-bridge power chip 600 are either IGBT chips or MOSFET chips.

[0067] The positive electrode metal layer 210, output metal layer 220, negative electrode metal layer 230, and external metal layer are connected to the insulating substrate 200 by welding, sintering, or bonding. A portion of the external metal layer of the insulating substrate 200 is exposed outside the molding compound 100, facilitating direct contact with an external heat sink and improving the device's heat dissipation performance. The metal layers are typically made of Cu or Al, while the insulating substrate is typically made of Al2O3, AlN, or Si3N4. The positive electrode metal layer 210, output metal layer 220, negative electrode metal layer 230, and external metal layer can also be connected using other insulating substrates, such as resin.

[0068] The bottom of the positive electrode metal layer 210 is connected to the insulating substrate 200, and the top is provided with the upper bridge power chip 500. The bottom surface of the upper bridge power chip 500 is welded or sintered on the positive electrode metal layer 210, and the top surface is connected to the output metal layer 220 and the upper bridge drive pin 700 respectively through bonding wires or copper bridges.

[0069] The positive electrode pin 300 has one or more pins, one end of which is fixedly connected to the positive electrode metal layer 210, and the other end extends out of the encapsulation body 100.

[0070] The output metal layer 220 and the positive electrode metal layer 210 are fixedly disposed diagonally on the insulating substrate 200, including an output first connection portion 221, an output second connection portion 222 and a lower bridge chip mounting position 223 for mounting the lower bridge power chip 600, which are connected in sequence. The bottom surface of the lower bridge power chip 600 is soldered or sintered on the lower bridge chip mounting position 223, and the top surface is connected to the negative electrode metal layer 230 and the lower bridge drive pin 800 respectively through bonding wires or copper bridges.

[0071] The output pin 400 includes a first output pin 401 and a second output pin 402. One end of the first output pin 401 is fixedly disposed on the first output connection portion 221, and the other end extends out of the plastic package 100. The second output pin 402 is fixedly disposed on the second output connection portion 222. In this case, the output pin 400 is disposed on the opposite side of the positive pin 300 and the negative pin 900, which facilitates the design of the power circuit on the PCB board and can further reduce the size of the package.

[0072] The negative electrode metal layer 230 is fixedly disposed on the insulating substrate 200 and located on the side of the output metal layer 220;

[0073] The negative electrode pin 900 has one end connected to the negative electrode metal layer 230, and the other end extends out from the encapsulation body 100 and is located on the same side as the positive electrode pin 300.

[0074] The upper bridge drive pin 700 is fixedly disposed on the insulating substrate 200 and located on the side of the upper bridge power chip 500;

[0075] The upper bridge drive pin 700 includes spaced settings:

[0076] The upper bridge gate pin 710 has one end connected to the insulating substrate 200 and the other end extending from the plastic package 100;

[0077] The upper bridge source or emitter drive pin 720 is located on the side of the upper bridge gate pin 710, with one end connected to the insulating substrate 200 and the other end extending out of the encapsulation 100.

[0078] The upper bridge gate pin 710 is connected to the insulating substrate 200 through the upper bridge gate metal layer;

[0079] The upper bridge source or emitter drive pin 720 is connected to the insulating substrate 200 through the upper bridge source or emitter metal layer.

[0080] In this case, the upper bridge gate metal layer and the upper bridge source or emitter metal layer are electrically connected to the upper bridge power chip 500 via bonding wires. The upper bridge source or emitter drive pin 720 is located between the upper bridge gate pin 710 and the output pin 400.

[0081] The lower bridge drive pin 800 is fixedly disposed on the insulating substrate 200 and located on the side of the lower bridge power chip 600;

[0082] The lower bridge driver pin 800 includes interval settings:

[0083] The lower bridge gate pin 810 has one end connected to the insulating substrate 200 and the other end extending from the plastic encapsulation 100;

[0084] The lower bridge source or emitter drive pin 820 is located on the side of the lower bridge gate pin 810, with one end connected to the insulating substrate (200) and the other end extending out from the plastic package 100.

[0085] The lower bridge gate pin 810 is connected to the insulating substrate 200 through the lower bridge gate metal layer;

[0086] The lower bridge source or emitter drive pin 2820 is connected to the insulating substrate 200 through the lower bridge source or emitter metal layer.

[0087] In this case, the gate metal layer and the source or emitter metal layer of the lower bridge are electrically connected to the lower bridge power chip 600 via bonding wires. The lower bridge source or emitter drive pin 820 is located between the lower bridge gate pin 810 and the negative pin 900.

[0088] In this embodiment, the first output pin 401 is a plurality of single pins spaced apart;

[0089] like Figure 1 As shown, the first output pin 401 and the second output pin 402 each employ multiple single pins spaced apart; the positive pin 300 has multiple pins, which can be arranged as follows: Figure 1 The diagram shows four single-pin terminals; the negative pin 900 uses two single-pin terminals. In this case, the creepage distance between the positive pin 300 and the negative pin 900 is 6.86 mm.

[0090] Figure 2 The freewheeling circuit diagram of the half-bridge power circuit shows that when the upper bridge power chip is working, the current flows through the positive pin 300, the upper bridge power chip 500, the bonding wire, and then out from the output pin. When the lower bridge power chip is working, the current flows through the output pin, the lower bridge power chip 600, the bonding wire, and the negative pin. The freewheeling circuit is shown by the dotted line in the diagram. The upper bridge power chip 500 and the lower bridge power chip 600 are close to each other, and the bonding wire of the power chip is relatively short. In addition, the metal layer of the insulating substrate 200 is relatively wide. Therefore, compared with the existing technology, the parasitic inductance and parasitic resistance are significantly reduced, which can significantly improve the conversion efficiency of the module.

[0091] When the power chip is an IGBT chip, the source or emitter pin 820 of the upper bridge is electrically connected to the emitter of the IGBT chip; when the power chip is a MOSFET chip, the source or emitter pin 820 of the upper bridge is electrically connected to the source of the MOSFET chip.

[0092] The circuit topology of this utility model is a half-bridge circuit. In order to realize the circuit function, there needs to be an electrical interconnection between the insulating substrate 200, the chip, and the pin. The power chip can be an IGBT, MOSFET, etc. The collector or drain of the upper bridge IGBT or MOSFET is connected to the inner metal layer of the insulating substrate, thereby realizing the electrical connection between the collector or drain of the upper bridge IGBT or MOSFET and the positive pin.

[0093] The gate of the upper-bridge IGBT or MOSFET chip is electrically connected to the upper-bridge gate pin via a bonding wire. The source, emitter, or Kelvin source of the upper-bridge IGBT or MOSFET chip is electrically connected to the upper-bridge source or emitter pin 720 via a bonding wire. At the same time, the source or emitter of the upper-bridge IGBT or MOSFET chip is also electrically connected to the output pin.

[0094] The collector or drain of the lower-bridge IGBT or MOSFET is soldered / sintered on the internal metal layer of the insulating substrate 200 to achieve electrical connection between the collector or drain of the lower-bridge IGBT or MOSFET and the output pin; the gate of the lower-bridge IGBT or MOSFET chip is electrically connected to the lower-bridge gate pin 810 through a bonding wire, and the source or emitter or Kelvin source of the lower-bridge IGBT or MOSFET chip is electrically connected to the lower-bridge source / emitter pin through a bonding wire. At the same time, the source or emitter of the lower-bridge IGBT or MOSFET chip is also electrically connected to the negative pin 900.

[0095] Example 2

[0096] like Figure 3 , 4 As shown, the first output pin 401 is a combination pin;

[0097] like Figure 1 As shown, the first output pin 401 uses multiple single pins arranged at intervals; Figure 3 The first output pin 401 is a combination pin, and the width of the combination pin is greater than the width of a single pin.

[0098] In this embodiment, the second output pin 402 adopts a configuration of two single pins and one combined pin, such as... Figure 3 , 4 As shown.

[0099] The positive pin 300 is configured with a combination of two single pins and one combined pin.

[0100] The negative lead 900 and the positive lead 300 are symmetrical about the longitudinal centerline of the plastic package and also adopt a combined lead form. The overall width of the negative lead 900 in this case is greater than 1.2mm.

[0101] like Figure 5As described above, when the positive pin 300, negative pin 900, and output pin 400 are all or partially in the form of combined pins, a fork can be opened on the combined pins, so that there are two negative pins on the outside of the molded body, which are internally connected together. This design takes into account that the distance between multiple single pins on the inclined part is relatively close, which is not convenient for the separation between the pins. Therefore, in order to facilitate machining, the inner part of the positive pin, negative pin, and output pin is connected together inside the molded body, while the outside of the molded body still uses the width of a single pin, which facilitates the uniform arrangement of PCB board pads during application. In addition, in this embodiment, the negative pin, lower bridge gate pin, and lower bridge source or emitter driver pin two are symmetrical with the positive pin about the longitudinal centerline of the molded body, while the upper bridge gate pin, upper bridge source or emitter pin, and output pin on the other side of the molded body are symmetrical with the negative pin, lower bridge gate pin, lower bridge source or emitter driver pin two, and positive pin about the transverse centerline of the molded body. This structure in which the pins are completely symmetrical about the centerline is beneficial for pin processing, and at the same time, no regional direction is required during soldering, which is convenient for production.

[0102] To further increase the creepage distance, the plastic package 100 of this invention has grooves or protrusions in the middle area of ​​the side where the pins are located, or one side has a groove and the opposite side has a protrusion, and the length of the groove opening or the protrusion is not less than 1mm. Figure 1 The width of the groove or protrusion is 0.5mm (middle lateral distance). Figure 1 The longitudinal creepage distance (in the middle) improves electrical safety. Tests showed the structure in this case had a creepage distance of 6.86 mm, which is greater than ST's SMIT package (6.7 mm) and Infineon's Q-DPAK package (5.26 mm).

[0103] Combining Embodiment 1 and Embodiment 2, the output metal layer 220 has an L-shaped structure;

[0104] The width of the first connecting portion 221 is smaller than the width of the second connecting portion 222, and the width is... Figure 1 The direction is the reference direction, and the vertical direction is the width.

[0105] Example 3

[0106] The output metal layer 220 is provided with an upper bridge power chip connection area 224 extending toward the negative electrode metal layer 230. The top surface of the upper bridge power chip is electrically connected to the upper bridge power chip connection area 224 through a bonding wire or a copper bridge.

[0107] The negative electrode metal layer 230 has a lower bridge power chip connection area 231 extending towards the output metal layer 220; the top surface of the lower bridge power chip 600 is connected to the lower bridge power chip connection area 231 via bonding lines or copper bridges. Figure 6As shown, the upper bridge power chip connection area 224 has a triangular structure, and the width of the upper bridge power chip connection area 224 gradually narrows from the output pin 400 to the negative pin 900; the width of the upper bridge power chip connection area 231 gradually narrows from the negative pin 900 to the output pin 400.

[0108] Example 4

[0109] like Figure 7 As shown, the upper bridge power chip connection area 224 has an arc-shaped structure on the side near the lower bridge power chip connection area 231. The width of the upper bridge power chip connection area 224 gradually increases from the output pin 400 to the negative pin 900, with some segments parallel to the upper bridge power chip; the width of the upper bridge power chip connection area 231 gradually increases from the negative pin 900 to the output pin 400, with some segments parallel to the lower bridge power chip.

[0110] Example 5

[0111] like Figure 8 As shown, both the upper-bridge power chip 500 and the lower-bridge power chip 600 are diode chips. Since diode chips do not include a gate, source, or emitter, there is no connection between the upper-bridge gate metal layer, the upper-bridge source or emitter metal layer, the lower-bridge gate metal layer, the lower-bridge source or emitter metal layer, and the power chip in this embodiment. The top surface (i.e., anode) of the upper-bridge power chip 500 is connected to the output metal layer 220 via a bonding wire or a copper bridge, and the top surface (i.e., anode) of the lower-bridge power chip 600 is connected to the negative electrode metal layer 230 via a bonding wire or a copper bridge.

[0112] Example 6

[0113] like Figure 9 As shown, the upper-bridge power chip 500 is an IGBT chip or a MOSFET chip. The gate on the top surface of the upper-bridge power chip 500 is connected to the upper-bridge gate metal layer via a bonding wire. The source or emitter on the top surface of the upper-bridge power chip 500 is connected to the upper-bridge source / emitter metal layer via a bonding wire. The source or emitter on the top surface of the upper-bridge power chip 500 is also connected to the output metal layer 220 via a bonding wire or a copper bridge. The lower-bridge power chip 600 is a diode chip. The anode on the top surface of the diode chip is connected to the negative metal layer via a bonding wire or a copper bridge. Since the diode chip does not have a gate, source, or emitter, there is no connection between the lower-bridge gate metal layer, the lower-bridge source or emitter metal layer, and the lower-bridge power chip. The reverse is also true.

[0114] comprehensive Figure 1-9 As shown, in this case, the lower bridge gate pin 810, the lower bridge source or emitter drive pin 820, and the negative pin 900 are symmetrical to the positive pin 300 along the longitudinal center line of the plastic package 100, respectively.

[0115] The positive pin 300, negative pin 900, lower bridge gate pin 810, and lower bridge source or emitter drive pin 820 are symmetrical with the corresponding output pin 400, upper bridge gate pin 710, and upper bridge source or emitter pin 720 along the transverse center line of the plastic package 100.

[0116] Regarding the information disclosed in this case, the following points need to be clarified:

[0117] (1) The accompanying drawings of the embodiments disclosed in this case only involve the structures involved in the embodiments disclosed in this case. Other structures can refer to the general design.

[0118] (2) Where there is no conflict, the embodiments and features disclosed in this case can be combined with each other to obtain new embodiments;

[0119] The above are merely specific embodiments disclosed in this case, but the scope of protection of this disclosure is not limited thereto. The scope of protection disclosed in this case shall be determined by the scope of protection of the claims.

Claims

1. A small power module with top heat dissipation, characterized in that, include: A positive electrode metal layer (210) is connected to an insulating substrate (200) at the bottom and has an upper bridge power chip (500) at the top. The positive electrode pin (300) is connected at one end to the positive electrode metal layer (210) and extends out of the encapsulation (100) at the other end; The output metal layer (220) is disposed diagonally on the insulating substrate (200) opposite to the positive electrode metal layer (210), and includes an output first connection portion (221), an output second connection portion (222), and a lower bridge chip mounting position (223) for mounting the lower bridge power chip (600) connected in sequence. The output pin (400) includes a first output pin (401) and a second output pin (402); one end of the first output pin (401) is fixedly disposed on the first output connection part (221), and the other end extends out from the plastic encapsulation body (100); the second output pin (402) is fixedly disposed on the second output connection part (222), and the other end extends out from the plastic encapsulation body (100); A negative electrode metal layer (230) is disposed on the insulating substrate (200) and located on the side of the output metal layer (220); The negative electrode pin (900) is connected at one end to the negative electrode metal layer (230) and extends out from the encapsulation body (100) at the other end, and is located on the same side as the positive electrode pin (300); The upper bridge drive pin (700) is arranged side by side and adjacent to the output pin (400), and is located on the side of the upper bridge power chip (500); The lower bridge drive pin (800) is arranged side by side and adjacent to the negative pin (900), and is located on the side of the lower bridge power chip (600); The top surface of the upper bridge power chip (500) is connected to the output metal layer (220); the top surface of the lower bridge power chip (600) is connected to the negative electrode metal layer (230).

2. A small power module with top heat dissipation according to claim 1, characterized in that, The top surface of the upper bridge power chip (500) is also connected to the upper bridge drive pin (700), and the top surface of the lower bridge power chip (600) is also connected to the lower bridge drive pin (800).

3. A small power module with top heat dissipation according to claim 1, characterized in that, The positive electrode metal layer (210), the output metal layer (220), and the negative electrode metal layer (230) are all disposed on the same side of the insulating substrate (200); An external metal layer is provided on the other side of the insulating substrate (200).

4. A small power module with top heat dissipation according to claim 2, characterized in that, The upper bridge drive pin (700) includes spaced-out pins: The upper bridge gate pin (710) is connected at one end to the insulating substrate (200) and extends from the encapsulation (100) at the other end; The upper bridge source or emitter drive pin 1 (720) is located on the side of the upper bridge gate pin (710), with one end connected to the insulating substrate (200) and the other end extending out from the plastic package (100); The lower bridge drive pin (800) includes spaced-out pins: The lower bridge gate pin (810) is connected at one end to the insulating substrate (200) and extends from the encapsulation (100) at the other end; The second lower bridge source or emitter drive pin (820) is located on the side of the lower bridge gate pin (810), with one end connected to the insulating substrate (200) and the other end extending out from the encapsulation (100).

5. A small power module with top heat dissipation according to claim 4, characterized in that, The upper bridge power chip (500) and the lower bridge power chip (600) are IGBT chips or MOSFET chips; The upper bridge gate pin (710) is electrically connected to the gate of the upper bridge power chip (500) through the upper bridge gate metal layer; The upper bridge source or emitter drive pin 1 (720) is electrically connected to the source or emitter of the upper bridge power chip (500) through the upper bridge source or emitter metal layer; The lower bridge gate pin (810) is electrically connected to the gate of the lower bridge power chip (600) through the lower bridge gate metal layer; The second (820) driving pin of the lower bridge source or emitter is electrically connected to the source or emitter of the lower bridge power chip (600) through the lower bridge source or emitter metal layer.

6. A small power module with top heat dissipation according to claim 1, characterized in that, The first output pin (401) can be a plurality of single pins spaced apart or a combination pin; The width of the combined pins is greater than the width of a single pin.

7. A small power module with top heat dissipation according to claim 5, characterized in that, The lower bridge gate pin (810), the lower bridge source or emitter drive pin 2 (820), and the negative pin (900) are symmetrical to the positive pin (300) along the center line of the plastic package (100); The positive terminal pin (300), the negative terminal pin (900), the lower bridge gate pin (810), and the lower bridge source or emitter drive pin two (820) are symmetrical with the corresponding output pin (400), the upper bridge gate pin (710), and the upper bridge source or emitter drive pin one (720) along the center line of the plastic package (100).

8. A small power module with top heat dissipation according to claim 1, characterized in that, The output metal layer (220) has an L-shaped structure; The width of the first connecting part (221) is smaller than the width of the second connecting part (222).

9. A small power module with top heat dissipation according to claim 1, characterized in that, The output metal layer (220) is provided with an upper bridge power chip connection area (224) extending toward the negative electrode metal layer (230). The negative electrode metal layer (230) is provided with a lower bridge power chip connection area (231) extending toward the output metal layer (220).

10. A small power module with top heat dissipation according to claim 9, characterized in that, The width of the upper bridge power chip connection area (224) gradually narrows from the output pin (400) towards the negative pin (900); The width of the lower bridge power chip connection area (231) gradually narrows from the negative pin (900) towards the output pin (400).

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