etc password server
By designing an ETC cryptographic server based on domestic Phytium processors and Innosilicon graphics cards, integrating multiple interfaces and modules, the system's multi-channel detection requirements were addressed, improving network security and performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHANGZHI ZHUOYI HENGTONG INFORMATION SECURITY CO LTD
- Filing Date
- 2025-05-06
- Publication Date
- 2026-06-09
AI Technical Summary
The existing ETC system lacks domestically produced ETC cryptographic servers, which cannot meet the needs of multi-channel ETC detection and affects the system's network security and performance.
Design an ETC cryptographic server that uses a domestic Phytium processor and Innosilicon graphics card, integrates multiple interfaces and modules, supports multi-channel ETC detection, including USB module, PCIe interface, M.2 SSD interface, etc., and combines TCM interface and ECIO embedded control module to realize multi-channel ETC detection and security encryption.
An ETC cryptographic server based on domestically produced components was implemented, supporting multi-channel ETC detection, improving the network security and performance of the system, and meeting the security and reliability requirements of complex application environments.
Smart Images

Figure CN224341898U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic equipment technology, and in particular to an ETC password server. Background Technology
[0002] ETC (Electronic Toll Collection) refers to a toll collection method that automatically completes vehicle identification, toll collection, lane equipment control, and toll data processing without stopping the vehicle, using technologies such as radio frequency identification and computers. It is one of the service functions of intelligent transportation systems. The ETC system takes less than two seconds to collect tolls per vehicle, and its toll lane capacity is 5 to 10 times that of manual toll lanes. It is particularly suitable for use on highways or in busy bridge and tunnel environments, improving traffic efficiency, saving manpower and management costs, enabling paperless and cashless toll collection, and saving infrastructure costs. Based on these advantages, the application of the ETC system has been actively promoted in my country. As of the end of September 2021, the average usage rate of ETC across the entire network exceeded 66%, significantly improving the traffic efficiency of the highway network and significantly enhancing logistics cost reduction and efficiency.
[0003] The ETC system consists of a front-end system and a back-end database system. The front-end system includes the vehicle control system, RSE (Roadside Equipment), OBE (On-Board Equipment), and ICC (Integrated Circuit Card). The back-end database system is the core data management module supporting the operation of ETC services. Its core functions include data storage and management, transaction processing and clearing settlement, and data security. Among them, the ETC cryptographic server is a crucial piece of equipment in the ETC back-end database system.
[0004] With the rapid development of localization in recent years and the requirement to improve network security protection capabilities, the highway toll collection and settlement system has been included in the national information security special plan, and various domestic ETC devices applied to highway entrances have emerged accordingly. Summary of the Invention
[0005] Therefore, the purpose of this utility model is to provide an ETC password server, which is designed based on the domestic Phytium processor and Innosilicon graphics card and can support up to 8 channels of ETC detection.
[0006] To achieve the above objectives, this utility model provides an ETC cryptographic server, including a Phytium processor, memory, Innosilicon display chip, video memory, display interface, PCIe interface, M.2 SSD interface, mini PCIe interface, USB module, network interface, RS232 full-function serial port, debug header, power module, SATA interface, BIOS ROM, TCM interface (Trusted Cryptography Module Header), ECIO embedded control module, and RTC (Real-Time Clock) module;
[0007] The Phytium processor is communicatively connected to the memory, Innosilicon display chip, PCIe interface, M.2 SSD interface, miniPCIe interface, USB module, network interface, RS232 full-function serial port, debug head, power module, SATA interface, BIOSROM, ECIO embedded control module, and RTC module; the Innosilicon display chip is communicatively connected to the video memory and display interface; the USB module is communicatively connected to several card reader chips, each of which is externally connected to an ETC security chip; the Phytium processor is communicatively connected to the TCM interface via the SPI bus.
[0008] The Phytium processor is the Phytium D3000 processor.
[0009] The Innosilicon display chip is the Innosilicon MA3F99A4 display chip.
[0010] The display interface includes an HDMI connector and a VGA connector. The HDMI connector supports the HDMI 2.0 standard and can support 4K resolution video signal transmission at a refresh rate of 60Hz; the VGA connector can support 1080P resolution video signal transmission at a refresh rate of 60Hz.
[0011] The network interface includes two RJ45 network interfaces and one TYPE E network interface, thereby enabling support for three onboard 10 / 100 / 1000Mbps adaptive wired networks.
[0012] The USB module includes a USB 3.0 IC chip that is communicatively connected to the Phytium processor. The USB 3.0 IC chip is communicatively connected to one USB 3.0 hub and two USB 2.0 hubs. The USB 3.0 hub expands four USB 3.0 interfaces, and the two USB 2.0 hubs can expand at least eight USB 2.0 signals, thereby enabling communication connections to eight card reader chips that support the USB 2.0 protocol.
[0013] The card reader chip is an AK9563 card reader chip; the ETC security chip is an LTSE1710 security chip.
[0014] The ETC cryptographic server supports encrypted cards in the form of MINI PCIE.
[0015] The PCIe interface includes one PCIe x16 interface and two PCIe x4 interfaces; the number of SATA interfaces is two.
[0016] The ETC password server board integrates an M.2 SSD interface and supports the NVMe protocol.
[0017] The ECIO embedded control module includes an IT8637 control chip, which is connected to the Phytium processor via LPC bus communication and to the SPI ROM via SPI communication. The ETC cryptographic server also includes four fans, which are controlled by the IT8637 control chip via PWM. The IT8637 control chip is also connected to two RS232 full-function serial ports and one COM serial port via a level conversion chip WS3243FCA.
[0018] In summary, the ETC password server of this utility model is designed based on the domestic Phytium processor and Innosilicon graphics card, and can support up to 8 channels of ETC detection. Attached Figure Description
[0019] To further understand the features and technical content of this utility model, please refer to the following detailed description and accompanying drawings. However, the drawings are provided for reference and illustration only and are not intended to limit the scope of this utility model. In the drawings,
[0020] Fig. 1 This is a block diagram of the main components of a preferred embodiment of the ETC password server of this utility model;
[0021] Fig. 2 This is a circuit block diagram of the main functional modules of a preferred embodiment of the ETC password server of this utility model. Detailed Implementation
[0022] To further illustrate the technical means and effects of this utility model, the following detailed description is provided in conjunction with the preferred embodiments of this utility model and their accompanying drawings.
[0023] See Figs. 1-2This utility model provides an ETC password server, including a Phytium processor, memory, Innosilicon display chip, video memory, display interface, PCIe interface, M.2 SSD interface, mini PCIe interface, USB module, network interface, RS232 full-function serial port, debug head, power module, SATA interface, BIOS ROM, TCM interface, ECIO embedded control module, and RTC module;
[0024] The Phytium processor is communicatively connected to the memory, Innosilicon display chip, PCIe interface, M.2 SSD interface, miniPCIe interface, USB module, network interface, RS232 full-function serial port, debug head, power module, SATA interface, BIOSROM, ECIO embedded control module, and RTC module; the Innosilicon display chip is communicatively connected to the video memory and display interface; the USB module is communicatively connected to several card reader chips supporting the USB protocol, each card reader chip being externally connected to an ETC security chip; the Phytium processor is communicatively connected to the TCM interface via the SPI bus.
[0025] This utility model's ETC password server is designed based on the domestically produced Phytium processor and Innosilicon graphics card. The USB module can communicate with eight card reader chips supporting the USB protocol. Each card reader chip is connected to an external ETC security chip, thus enabling support for up to eight ETC detection channels. The Phytium processor supports the TPM2.0 encryption module, and the TCM interface is used to connect the SPI signal on the Phytium processor to the connector, thereby supporting external TPM (Trusted Platform Module) devices. This utility model's ETC password server sufficiently meets the design requirements of an ETC password server.
[0026] Preferably, the Phytium processor is the Phytium D3000 processor. The Phytium D3000 processor is Phytium's new generation of high-performance CPU, with a main frequency of 2.5GHz. It integrates rich expansion interfaces, supports the PSPA 2.0 security specification, and can meet users' performance and security requirements in more complex application environments. The Phytium D3000 processor of this invention uses a dual DDR5 SODIMM memory scheme, with each module supporting 8GB / 16GB, and a maximum support of 32GB.
[0027] Preferably, the Innosilicon display chip is the Innosilicon MA3F99A4 display chip. The Innosilicon MA3F99A4 display chip is an ultra-low power consumption, high-performance rendering chip manufactured by Innosilicon Technology, supporting 4K high-definition triple-screen display and 4K video decoding. It fully supports mainstream domestic CPU architectures such as Phytium, Loongson, Shenwei, Hygon, Zhaoxin, and Kunpeng. The Innosilicon MA3F99A4 display chip of this invention uses onboard memory chips, with LPDDR4 memory specifications and a memory capacity of 2GB.
[0028] Preferably, the display interface includes an HDMI connector and a VGA connector.
[0029] Specifically, the HDMI connector supports the HDMI 2.0 standard and can support 4K resolution video signal transmission with a refresh rate of 60Hz; the VGA connector can support 1080P resolution video signal transmission with a refresh rate of 60Hz.
[0030] Preferably, the network interface includes two RJ45 network interfaces and one TYPE E network interface, thereby enabling support for three onboard 10 / 100 / 1000Mbps adaptive wired networks. The TYPE E network interface is capable of data exchange with the sub-board.
[0031] Specifically, such as Fig. 2 In a preferred embodiment of this application, the PCIe interface includes one PCIe x16 interface and two PCIe x4 interfaces; the number of SATA interfaces is two.
[0032] Preferably, the USB module includes a USB 3.0 IC chip communicatively connected to the Phytium processor. The USB 3.0 IC chip communicatively connects to one USB 3.0 hub and two USB 2.0 hubs. The USB 3.0 hub expands four USB 3.0 ports, and the two USB 2.0 hubs can expand at least eight USB 2.0 signals, thereby enabling communication connections to eight card reader chips supporting the USB 2.0 protocol. Specifically, as... Fig. 2In a preferred embodiment of this application, the Phytium processor is connected to the USB 3.0 IC chip via a PCIe bus. The USB 3.0 IC chip is model uPD720201. The USB 3.0 hub is configured with an RTS5411S-GR hub chip, supporting the expansion of four USB 3.0 signals. The first of the two USB 2.0 hubs is configured with an FE1.1S hub chip, supporting the expansion of four USB 2.0 signals. One USB 2.0 signal is connected to the Mini PCIe interface, one USB 2.0 signal is connected to a card reader chip, and the two USB 2.0 signals output to two USB 2.0 ports. These two USB 2.0 ports are USB 2.0 type. A standard interface; the second USB 2.0 hub of the two USB 2.0 hubs is equipped with an FE2.1 hub chip, which supports the expansion of 7 USB 2.0 signals and connects to 7 card reader chips respectively, thereby realizing communication connection of 8 card reader chips supporting the USB 2.0 protocol, and thus enabling support for up to 8 ETC detections.
[0033] Preferably, the card reader chip is an AK9563 card reader chip; the ETC security chip is an LTSE1710 security chip, which is used as a security element in the ETC field to read the ETC information on the vehicle when the vehicle passes through the gate / lane.
[0034] Furthermore, the ETC cryptographic server supports encrypted cards in the form of MINI PCIE.
[0035] Preferably, the ETC password server board integrates an M.2 SSD interface and supports the NVMe protocol.
[0036] Preferably, the Phytium processor is connected to a full-function RS232 serial port via a level conversion chip WS3243FCA.
[0037] Furthermore, such as Fig. 2 In a preferred embodiment of this application, the ECIO embedded control module includes an IT8637 control chip. The IT8637 control chip is connected to the Phytium processor via an LPC bus and to the SPI ROM via an SPI communication. The ETC password server also includes four fans. The IT8637 control chip controls the four fans via PWM. The four fans interact with the IT8637 control chip in real time to achieve intelligent temperature control management. The IT8637 control chip is also connected to two RS232 full-function serial ports and one COM serial port via a level conversion chip WS3243FCA.
[0038] Optionally, the ETC password server also reserves (RSVD) an LCD header.
[0039] In summary, this utility model ETC password server is designed based on the domestic Phytium processor and Innosilicon graphics card, and can support up to 8 ETC detection channels.
[0040] As described above, those skilled in the art can make various other corresponding changes and modifications based on the technical solution and concept of this utility model, and all such changes and modifications should fall within the protection scope of the appended claims of this utility model.
Claims
1. An ETC (Electronic Toll Collection) cryptographic server, characterized in that, Includes Phytium processor, memory, Innosilicon display chip, video memory, display interface, PCIe interface, M.2 SSD interface, mini PCIe interface, USB module, network interface, RS232 full-function serial port, debug head, power module, SATA interface, BIOS ROM, TCM interface, ECIO embedded control module, and RTC module; The Phytium processor is communicatively connected to the memory, Innosilicon display chip, PCIe interface, M.2 SSD interface, miniPCIe interface, USB module, network interface, RS232 full-function serial port, debug head, power module, SATA interface, BIOSROM, ECIO embedded control module, and RTC module; the Innosilicon display chip is communicatively connected to the video memory and display interface; the USB module is communicatively connected to several card reader chips, each of which is externally connected to an ETC security chip; the Phytium processor is communicatively connected to the TCM interface via the SPI bus.
2. The ETC cryptographic server as described in claim 1, characterized in that, The Phytium processor is the Phytium D3000 processor.
3. The ETC cryptographic server as described in claim 1, characterized in that, The Innosilicon display chip is the Innosilicon MA3F99A4 display chip.
4. The ETC cryptographic server as described in claim 1, characterized in that, The display interface includes an HDMI connector and a VGA connector.
5. The ETC cryptographic server as described in claim 1, characterized in that, The network interface includes two RJ45 network interfaces and one TYPE E network interface.
6. The ETC cryptographic server as described in claim 1, characterized in that, The USB module includes a USB 3.0 IC chip that is communicatively connected to the Phytium processor. The USB 3.0 IC chip is communicatively connected to one USB 3.0 hub and two USB 2.0 hubs. The USB 3.0 hub expands four USB 3.0 interfaces, and the two USB 2.0 hubs can expand at least eight USB 2.0 signals, thereby enabling communication with eight card reader chips that support the USB 2.0 protocol.
7. The ETC cryptographic server as described in claim 1, characterized in that, The card reader chip is an AK9563 card reader chip; the ETC security chip is an LTSE1710 security chip.
8. The ETC cryptographic server as described in claim 1, characterized in that, The PCIe interface includes one PCIe x16 interface and two PCIe x4 interfaces; the number of SATA interfaces is two.
9. The ETC cryptographic server as described in claim 1, characterized in that, The ETC password server board integrates an M.2 SSD interface.
10. The ETC cryptographic server as described in claim 1, characterized in that, The ECIO embedded control module includes an IT8637 control chip, which is connected to the Phytium processor via LPC bus communication and to the SPI ROM via SPI communication. The ETC cryptographic server also includes four fans, which are controlled by the IT8637 control chip via PWM. The IT8637 control chip is also connected to two RS232 full-function serial ports and one COM serial port via a level conversion chip WS3243FCA.