A controller
By introducing a state latching module and a watchdog component into the vehicle drive controller, the system downtime caused by the failure of the fault monitoring submodule was solved, the drive state was adjusted, and the system reliability and user experience were improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- LISHENG AUTOMOBILE TECHNOLOGY (GUANGZHOU) CO LTD
- Filing Date
- 2025-09-19
- Publication Date
- 2026-06-26
AI Technical Summary
The existing vehicle drive controller shuts down directly when the fault monitoring submodule fails, resulting in low system reliability, high user threshold, increased usage costs, and reduced user experience.
Design a controller that includes a control module, a state latch module, and a watchdog component. The state latch module is used to adjust the driver state when the fault monitoring submodule fails, ensuring that the driver operation remains in the state before the fault or degrades to the previous state.
It improves the reliability of the vehicle infotainment system, lowers the barrier to entry and cost for users, and enhances the user experience.
Smart Images
Figure CN224417195U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of vehicle drive control technology, and more specifically, to a controller. Background Technology
[0002] While automotive drive control technology is relatively mature, it still faces challenges in improving control accuracy, enhancing system reliability, and reducing costs. Especially given the increasing complexity and intelligence of automotive electronics, the requirements for drive control technology are becoming more stringent.
[0003] Vehicle-mounted drive controllers typically include a fault monitoring submodule with fault diagnosis capabilities. This submodule diagnoses and handles abnormalities in the controller itself to achieve self-protection. However, in related technologies, the controller is merely configured to detect whether the fault monitoring submodule is faulty, or to immediately report the fault and shut down the system to protect system safety upon detection of a fault in the submodule. This direct shutdown approach reduces the reliability of the vehicle's infotainment system and requires users to possess certain fault repair skills to ensure continued use of the system after shutdown, increasing the user's learning curve and operating costs, and ultimately diminishing the user experience. Utility Model Content
[0004] This application provides a controller that addresses the problems of existing controllers failing to detect faults in the fault monitoring submodule or directly shutting down the system after a fault, resulting in low reliability, impacting user experience, increasing the barrier to entry and cost of use, and reducing user experience. To achieve this objective, this application provides the following solutions.
[0005] According to one aspect of the embodiments of this application, a controller is provided, the controller being connected to a driver, the driver including a motor, the controller including a control module and a state latch module, the state latch module and the control module being connected to the driver, and the control module being connected to the state latch module;
[0006] The control module includes a fault monitoring submodule and a watchdog component. The fault monitoring submodule is used to monitor and control the operation of the driver. The watchdog component is connected to the fault monitoring submodule. After detecting a fault in the fault monitoring submodule, the watchdog component uses the state latching module to adjust the state of the driver. The state adjustment includes adjusting the running state to the previous state or reducing the running state.
[0007] In one possible implementation, the control module includes a signal diagnostic component connected to the fault monitoring submodule. The signal diagnostic component is used to receive external signals and, upon detecting and determining that the external signals are abnormal, send a signal abnormality command to the fault monitoring submodule. The external signals include CAN signals.
[0008] In one possible implementation, the control module further includes a storage component connected to the fault monitoring submodule;
[0009] The storage component is used to send the stored historical state information of the driver to the fault monitoring submodule after receiving the feedback request transmitted by the fault monitoring submodule. The feedback request is sent by the fault monitoring submodule after receiving the signal abnormality instruction.
[0010] In one possible implementation, the controller further includes a pre-drive chip and a drive module. The control module includes a first drive component. The signal input terminal of the pre-drive chip is connected to the drive module, the state latch module, and the first drive component, respectively. The fault monitoring submodule is connected to the first drive component and the drive module. The signal output terminal of the pre-drive chip is connected to the driver. The fault monitoring submodule is also used to send a control signal to the pre-drive chip through the drive module after detecting a fault in the first drive component.
[0011] In one possible implementation, the controller further includes a first driving circuit and a second driving circuit. The input terminal of the pre-drive chip is connected to the first driving component, and the output terminal is connected to the first driving circuit and the second driving circuit, respectively. The driving terminals of the first driving circuit and the second driving circuit are both connected to the driver.
[0012] In one possible implementation, the pre-drive chip includes a first drive link and a second drive link, and the controller further includes a monitoring circuit equipped with a first acquisition circuit and a second acquisition circuit.
[0013] The input end of the first drive link is connected to the first drive component, and the output end is connected to the input end of the first drive circuit. The output end of the first drive circuit is connected to the signal acquisition end of the driver and the first acquisition circuit, and the signal output end of the first acquisition circuit is connected to the fault monitoring submodule.
[0014] The input end of the second drive link is connected to the first drive component, and the output end is connected to the input end of the second drive circuit. The output end of the second drive circuit is connected to the signal acquisition end of the driver and the second acquisition circuit, and the signal output end of the second acquisition circuit is connected to the fault monitoring submodule.
[0015] In one possible implementation, the control module further includes a second drive component and a third drive component. The fault monitoring submodule is connected to the first drive link and the second drive link through the second drive component, and the fault monitoring submodule is connected to the drive module through the third drive component.
[0016] In one possible implementation, the fault also includes a power supply abnormality, and the controller includes a power management chip with a power supply voltage monitoring module, the power supply voltage monitoring module being connected to the state latch module, and the state latch module being connected to the monitoring circuit and the pre-driven chip;
[0017] The power supply voltage monitoring module is used to monitor the power supply voltage provided by the power management chip to the control module, and after detecting an abnormality in the power supply voltage, to adjust the state of the driver using the state latching module.
[0018] In one possible implementation, the monitoring circuit further includes a third acquisition circuit and a fourth acquisition circuit. The acquisition terminal of the fourth acquisition circuit is connected to the first driving circuit and the second driving circuit. The acquisition terminal of the third acquisition circuit is connected to the input terminal of the first driving circuit and the input terminal of the second driving circuit. The third acquisition circuit and the fourth acquisition circuit are connected to the state latch module. The output terminal of the state latch module is connected to the first driving link.
[0019] In one possible implementation, the controller further includes a NOT gate, a NOR gate, and an OR gate. The input of the OR gate is connected to the output of the driving module, the output of the first driving component, and the output of the state latch module. The output of the OR gate is connected to the input of the first driving link. The input of the NOR gate is connected to the input of the third acquisition circuit and the fourth acquisition circuit. The output of the NOR gate is connected to the state acquisition terminal of the state latch module. The input of the NOT gate is connected to the power management chip, and its output is connected to the state latch module.
[0020] The beneficial effects of the technical solutions provided in this application are:
[0021] The controller provided in this application is connected to the driver. The controller includes a control module and a state latch module. The state latch module and the control module are connected to the driver. The control module includes a fault monitoring submodule and a watchdog component. The fault monitoring submodule is used for fault monitoring and driving the driver's actions. The watchdog component is connected to the fault monitoring submodule. After detecting a fault in the fault monitoring submodule, the watchdog component uses the state latch module to adjust the driver's operating state. The embodiments of this application can use the state latch module to adjust the driver's state when the fault monitoring submodule fails, so as to ensure that the driver's actions remain in the state before the fault or degrade operation, thereby effectively improving the reliability of the vehicle system, reducing the user's usage threshold and cost, and improving the user experience. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments of this application will be briefly introduced below.
[0023] Figure 1 This is an architecture diagram of the controller provided in an embodiment of this application. Detailed Implementation
[0024] The embodiments of this application are described below with reference to the accompanying drawings. It should be understood that the embodiments described below with reference to the accompanying drawings are exemplary descriptions for explaining the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions of the embodiments of this application.
[0025] Those skilled in the art will understand that, unless specifically stated otherwise, the singular forms “a,” “an,” “the,” and “the” used herein may also include the plural forms. It should be further understood that the terms “comprising” and “including” as used in embodiments of this application mean that the corresponding feature can be implemented as the presented feature, information, data, step, operation, element, and / or component, but do not exclude implementation as other features, information, data, step, operation, element, component, and / or combinations thereof supported by the art. It should be understood that when we say that an element is “connected” or “coupled” to another element, the one element can be directly connected or coupled to the other element, or it can mean that the one element and the other element establish a connection relationship through an intermediate element. Furthermore, “connected” or “coupled” as used herein can include wireless connection or wireless coupling. The term “and / or” as used herein indicates at least one of the items defined by the term; for example, “A and / or B” indicates implementation as “A,” or implementation as “A,” or implementation as “A and B.”
[0026] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0027] The technical solutions of this application and their effects are described below through several exemplary embodiments. It should be noted that the following embodiments can be referenced, borrowed from, or combined with each other. Identical terms, similar features, and similar implementation steps in different embodiments will not be repeated.
[0028] The controller provided in this application is intended to solve at least one technical problem existing in the prior art.
[0029] Optionally, such as Figure 1 As shown, the controller of this application is connected to the driver. The controller includes a control module and a state latch module. The state latch module and the control module are connected to the driver. The control module is connected to the state latch module. The control module includes a fault monitoring submodule and a watchdog component. The fault monitoring submodule is used for fault monitoring and controlling the driver's actions. The watchdog component is connected to the fault monitoring submodule. After detecting a fault in the fault monitoring submodule, the watchdog component uses the state latch module to adjust the driver's state. The state adjustment includes adjusting the operating state to the previous state or reducing the operating state.
[0030] Optionally, the fault handled by the controller can be at least one of the following: input terminal abnormality, processing terminal abnormality, and output terminal abnormality. The fault of the fault submodule can be one of the following: processing terminal abnormality.
[0031] Optionally, the driver can be a motor, cylinder, hydraulic cylinder, gasoline engine, or other devices capable of providing power. The control module can be an MCU (microcontroller) integrating a fault monitoring submodule and a watchdog component, or a circuit board with the fault monitoring submodule and watchdog component set up as independent circuits, or other devices capable of controlling the driver's operation. The control module can also have fault handling functions, which execute corresponding state adjustment methods according to the detected fault to ensure that the driver can continue to work.
[0032] Optionally, the driver executes corresponding actions according to the instructions of the control module, which may include starting, stopping, power adjustment, speed adjustment, etc. The control module can also receive external signals and detect faults based on external signals, including CAN signals and signals transmitted to the control module from other vehicle system devices.
[0033] Optionally, the CAN signal can be a control command sent by the CAN chip. Input abnormality can include external signal abnormality. The control module also includes a signal diagnostic component connected to the fault monitoring submodule. The signal diagnostic component is used to receive external signals, verify external signals, and send a signal abnormality command to the fault monitoring submodule when it is determined that the external signal is abnormal.
[0034] Optionally, the control module also includes a storage component connected to the fault monitoring submodule. The storage component is used to send the stored historical state information of the driver to the fault monitoring submodule after receiving a feedback request transmitted by the fault monitoring submodule. The feedback request is sent by the fault monitoring submodule after receiving a signal abnormality command.
[0035] In one embodiment, the fault monitoring submodule is connected to a storage component, which stores historical drive state information. Upon receiving a signal anomaly command, the submodule sends a request to the storage component to provide feedback on the historical drive state information. It then receives the historical drive state information from the storage component and sends the corresponding drive signal to the drive for state adjustment. This historical drive state information can be the previous state corresponding to the drive state at the time the signal anomaly command was sent.
[0036] Optionally, the control module may further include a third drive component connected to the signal diagnostic component. The third drive component receives CAN signals transmitted from external devices (such as a CAN chip) and transmits these CAN signals to the signal diagnostic component. The signal diagnostic component and the third drive component may both be circuits with related functions.
[0037] In one embodiment, the third driver component can be represented as CAN-Drv, which is the underlying driver of the control module. The signal diagnostic component can be an E2E component, and the fault monitoring submodule can be an ERM module, which implements memory protection and real-time fault monitoring. Specifically, the underlying driver CAN_Drv forwards the CAN chip's control command Ext. Request to the E2E component. The E2E component diagnoses the externally output CAN signal, and reports a fault if an anomaly is found. The E2E component connects to the ERM module through the CanActRequest interface and the E2EOutERR interface (the CanActRequest interface transmits the CAN chip's control commands: HS1ACT / STOP; HS2 ACT / STOP; the E2EOutERR interface outputs the diagnostic results for the control commands)
[0038] Optionally, the storage component can be a DataStorage component. Specifically, the ERM component can connect to the DataStorage component through the ReadLastRequest interface to request the storage component to provide feedback on the previously recorded drive action status. The storage component can connect to the ERM component through the ReadLastValidStatus interface to provide feedback on the previously recorded drive action status to the ERM component.
[0039] In one embodiment, the driver can be a motor, and when the external signal is a CAN signal, the input terminal abnormality can be at least one of CAN link abnormality or CAN chip functional abnormality. CAN link abnormality includes an open circuit, short voltage, or short ground on the RX / TX pins (RX for receive, TX for transmit) corresponding to the CAN signal on the CAN or control module. CAN chip functional abnormality includes the CAN chip failing to receive signals, or receiving signals incorrectly, delayed, or stuck. During input terminal abnormality detection, the third driver component transmits the received CAN signal to the E2E component. The E2E component verifies the CAN signal (the CAN signal, in addition to control commands, also carries a check bit; the E2E component performs verification and determines the verification result). If the verification result determines that the CAN signal is abnormal, it outputs an abnormality signal E2EOutERR to the ERM module. Upon receiving the abnormality signal E2EOutERR, the ERM module sends a request to the storage component via the ReadLastRequest interface to read the motor's last valid state, and reads the motor's last valid state through the information fed back by the storage component via ReadLastValidStatus. The system determines whether the previous status was valid. If the previous status was invalid, the motor does not need to operate to avoid unexpected actions. If the previous status was valid, the motor should continue operating to prevent it from stopping when the CAN signal is abnormal. The ERM component controls the motor operation by sending the command ERMOutMotorCommand. The previous valid status can be the state preceding the motor failure.
[0040] In one embodiment, the watchdog component can be represented as SWD. The processing end exception is the abnormal operation or error of the ERM component. SWD detects the correctness and real-time performance of the program flow in the ERM component. When SWD detects an abnormal operation and resets, it outputs a low-level reset signal to the state latch module. The low-level reset signal is used to instruct the state latch module to output a signal indicating that the motor should maintain the previous state of operation.
[0041] Optionally, the controller further includes a pre-driver chip and a drive module. The control module includes a first drive component. The signal input terminal of the pre-driver chip is connected to the drive module, the status latch module, and the first drive component, respectively. The fault monitoring submodule is connected to the first drive component and the drive module. The signal output terminal of the pre-driver chip is connected to the driver. The control module transmits control signals to the pre-driver chip through the first drive component. After receiving the signal, the pre-driver chip controls the driver to operate. Furthermore, the fault monitoring submodule is also used to send control signals to the pre-driver chip through the drive module after detecting a fault in the first drive component. The drive module can send control signals to the pre-driver chip after receiving the control signal output command transmitted by the fault monitoring submodule.
[0042] In one embodiment, the first driving component can be a GPIO_Drv component or a driving circuit, through which the underlying soft drive of GPIO control is implemented. The ERM module is connected to the GPIO_Drv component through the ERMOutMotorCommand interface. The GPIO_Drv component can be connected to the pre-driver chip through an IO interface or other types of interfaces. The driving module can be represented as an HBD module.
[0043] Optionally, the control module may also include a third driver component, through which the ERM module connects to the driver module. Specifically, the third driver component may be an SPI_Drv component or a driver circuit, which is used to implement redundancy in the GPIO control loop. The ERM module connects to the SPI_Drv component through the ERMHoutCommand interface, and the SPI_Drv component connects to the driver module (HBD) through the SPI interface.
[0044] Optionally, the processing end abnormality also includes the first drive component abnormality. The fault monitoring submodule uses the first drive component to send control commands to the pre-drive chip and uses the monitoring circuit to monitor the status of the driver. The control commands are used to instruct the driver to operate. If the fault monitoring submodule detects that the monitoring information transmitted by the monitoring circuit meets the first preset condition (detecting the first drive component abnormality), the fault monitoring submodule uses the drive module to output drive commands to the pre-drive chip. The first preset condition includes that the current in the driver is less than the first preset value within a first preset time.
[0045] Optionally, the first preset value can be 200mA, and the magnitude of the first preset value and the first preset time can be determined according to the structure of the vehicle system, the type of driver, and other conditions.
[0046] In one embodiment, the first driving component is a GPIO_Drv component or a driving circuit. The ERM module issues a control command ERMOutMotorCommand = HS1_ACT / HS2_ACT through a set interface (which can be named ERMOutMotorCommand), and collects driver information through a monitoring circuit. This driver information can include the motor port status over a continuous period of time. If the ERM module determines, based on the driver information, that the current flowing through the driver is less than 200mA when the driver operates within a first preset time (a specific time, the length of which varies depending on the environment or detection requirements), the ERM module controls the driving module to output a command instructing the pre-driver chip to operate, so that the pre-driver chip controls the driver to work in the previous state or degrade its operation. Specifically, the ERM module can output a high-level signal through the driving module.
[0047] Optionally, the controller further includes a first drive circuit and a second drive circuit. The input terminal of the pre-drive chip is connected to the first drive component, and the output terminal is connected to both the first drive circuit and the second drive circuit. The drive terminals of both the first and second drive circuits are connected to the driver. Both the first and second drive circuits can be used to control the driver's operation, thereby improving the reliability and stability of the controller.
[0048] Optionally, the pre-driver chip includes a first drive link and a second drive link, and the controller further includes a monitoring circuit equipped with a first acquisition circuit and a second acquisition circuit. The input terminal of the first drive link is connected to the first drive component, and the output terminal is connected to the input terminal of the first drive circuit. The output terminal of the first drive circuit is connected to the signal acquisition terminal of the driver and the first acquisition circuit, and the signal output terminal of the first acquisition circuit is connected to the fault monitoring submodule. The input terminal of the second drive link is connected to the first drive component, and the output terminal is connected to the input terminal of the second drive circuit. The output terminal of the second drive circuit is connected to the signal acquisition terminal of the driver and the second acquisition circuit, and the signal output terminal of the second acquisition circuit is connected to the fault monitoring submodule. This is used to generate or output signals that control the operation of the first drive circuit and the second drive circuit, respectively. After receiving the instruction output by the control module, the pre-driver chip controls the first drive link or the second drive link to output a signal accordingly.
[0049] Optionally, the first and second acquisition circuits can be voltage acquisition circuits, which convert the acquired voltage signals into digital signals. These digital signals are then transmitted to the control module, which has interfaces corresponding to the first and second acquisition circuits.
[0050] Optionally, the control module may also include a second drive component, and the fault monitoring submodule is connected to the first drive link and the second drive link through the second drive component.
[0051] Optionally, the first and second drive circuits may include MOSFETs, which control the operation of the driver. The driver may be a three-terminal motor, with the drive signal receiving terminal of the three-terminal motor connected to the first and second drive circuits, and the negative terminal of the three-terminal motor connected to the vehicle body ground.
[0052] In one embodiment, such as Figure 1As shown, the first acquisition circuit can be represented as voltage acquisition ADC1, and the second acquisition circuit can be represented as voltage acquisition ADC2. The first driving link can be represented as HS1 driving, and the second driving link can be represented as HS2 driving. The first driving circuit can be represented as HS1, and the second driving circuit can be represented as HS2. The second driving component can be represented as the ADC_Drv component. The ERM module is connected to the ADC_Drv component through the interface ERMInMotorCurrent. The ADC_Drv component is connected to the first acquisition circuit through interface ADC1, and to the second acquisition circuit through interface ADC2.
[0053] Optionally, the output fault includes an abnormality in the first or second drive link. The fault monitoring submodule sends a control command to the first or second drive link using the first drive component. If the fault monitoring submodule detects that the monitoring information transmitted by the monitoring circuit meets a second preset condition, the fault monitoring submodule sends a control command to the second or first drive link using the first drive component. The second preset condition includes that the current in the driver is less than a second preset value within a second preset time period. The second preset condition may be the same as or different from the first preset condition.
[0054] In one embodiment, the first preset condition and the second preset condition are the same. The first drive link is connected to the first drive circuit through the GH1 interface, and the second drive link is connected to the second drive circuit through the GH2 interface. An abnormality in the first drive link may include an open circuit, undervoltage, or short ground in GH1; an abnormality in the second drive link may include an open circuit, undervoltage, or short ground in GH2. The ERM module sends commands (such as HS1_ACT / HS2_ACT) to control the operation of the first or second drive circuit via the ERMOutMotorCommand interface, and continuously monitors the status of the driver port (such as the motor port) using the corresponding first or second acquisition circuit. When an abnormality is determined in the first or second drive link based on the information transmitted by the first or second acquisition circuit, the ERM module outputs a high level to the pre-driver chip via the GPIO_Drv component to indicate the operation of the second or first drive link. The second or first drive link controls the driver operation based on the received signal.
[0055] Optionally, the fault also includes power supply abnormality. The control module operates based on the electrical energy transmitted by the power supply circuit. The controller includes a power management chip with a power supply voltage monitoring module. The power supply voltage monitoring module is connected to the state latch module, and the state latch module is connected to the monitoring circuit and the prefetch chip. The power supply voltage monitoring module is used to monitor the power supply voltage provided to the control module by the power management chip and, after detecting an abnormal power supply voltage, sends a state adjustment signal to the state latch module to adjust the state of the driver through the state latch module.
[0056] In one embodiment, the state latch module may include a trigger that outputs a signal QOUT1 in response to a received signal. The power management chip can be represented by an SBC, and the power supply voltage monitoring module can be represented by a VMoniter. The VMoniter diagnoses the power supply voltage from the SBC to the control module; when over- or under-voltage occurs, it outputs a low level, at which point the control module may malfunction; when the VMoniter diagnoses a normal voltage, it outputs a high level. The signal output by the VMoniter is transmitted to the state latch module, which controls the driver to operate in the previous state based on the received signal.
[0057] Optionally, the monitoring circuit further includes a third acquisition circuit and a fourth acquisition circuit. The acquisition terminal of the fourth acquisition circuit is connected to the first driving circuit and the second driving circuit. The acquisition terminal of the third acquisition circuit is connected to the input terminal of the first driving circuit and the input terminal of the second driving circuit. The third acquisition circuit and the fourth acquisition circuit are connected to the state latch module. The output terminal of the state latch module is connected to the first driving link.
[0058] Optionally, the controller further includes a NOT gate, a NOR gate, and an OR gate. The input of the OR gate is connected to the output of the drive module, the output of the first drive component, and the output of the state latch module. The output of the OR gate is connected to the input of the first drive link. The input of the NOR gate is connected to the input of the third acquisition circuit and the fourth acquisition circuit. The output of the NOR gate is connected to the state acquisition terminal of the state latch module. The input of the NOT gate is connected to the power management chip, and the output is connected to the state latch module.
[0059] Specifically, the driver can be a motor, and the signal outputs of the state latch module are shown in Table 1:
[0060] Table 1
[0061]
[0062] In this circuit, the signal output from either the fourth or third acquisition circuit is passed through a NOR gate to output signal QIN1. If the motor is detected as being driven, signal QIN1 is low (L); otherwise, it is high (H). The Q interface of the flip-flop in the state latch module outputs signal QOUT1, which is transmitted to the input of an OR gate. Either the VMoniter within the SBC or the SWD within the control module outputs a reset signal Reset_B. This reset signal is inverted by a NOT gate and connected to the state latch module. When the reset signal Reset_B has a falling edge (corresponding to a rising edge at the CLK terminal), the D port input of the state latch module is high, and the output QOUT1 is low, driving HS1 through the other inputs of the OR gate. When the reset signal Reset_B has a falling edge (corresponding to a rising edge at the CLK terminal), the D port input of the state latch module is low, and the output QOUT1 is high, maintaining the drive of HS1. When the reset signal Reset_B is low (CLK is high), the QOUT1 of the state latch module will maintain the output of the previous state, thereby keeping the driver's operating state in the previous state.
[0063] In one embodiment, the third acquisition circuit can be a voltage acquisition circuit, and the fourth acquisition circuit can be a current acquisition circuit. The current acquisition circuit may include a resistor R1 and an amplifier. The two input terminals of the amplifier are connected to the two ends of the resistor R1. Electrical energy transmitted from the battery or external power source is transmitted through the resistor R1 to the driver so that the driver can work normally. The output terminal of the amplifier is connected to the input terminal of a NOR gate. The signal output (QIN1) of the NOR gate and the signal output (CLK) of the power management chip form a combined signal to ensure that when the control module suddenly resets or becomes uncontrollable, the signal output (QOUT1) of the state latch module can continue to control the driver.
[0064] In this embodiment, the controller is connected to the driver. The controller includes a control module and a state latch module. The state latch module and the control module are connected to the driver. The control module is also connected to the state latch module. The control module includes a fault monitoring submodule and a watchdog component. The fault monitoring submodule is used for fault monitoring and driving the driver's actions. The watchdog component is connected to the fault monitoring submodule. After detecting a fault in the fault monitoring submodule, the watchdog component uses the state latch module to adjust the driver's operating state. This embodiment can adjust the driver's state using the state latch module when the fault monitoring submodule fails to ensure that the driver's actions remain in the state before the fault or degrade operation, thereby effectively improving the reliability of the vehicle system, reducing the user's usage threshold and cost, and improving the user experience.
[0065] The terms "first," "second," "third," "fourth," "1," "2," etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in a sequence other than that shown in the illustrations or text descriptions.
[0066] It should be understood that although arrows indicate various operation steps in the flowcharts of this application's embodiments, the order in which these steps are implemented is not limited to the order indicated by the arrows. Unless explicitly stated herein, in some implementation scenarios of this application's embodiments, the implementation steps in each flowchart can be executed in other orders as required. Furthermore, some or all steps in each flowchart, based on the actual implementation scenario, may include multiple sub-steps or multiple stages. Some or all of these sub-steps or stages can be executed at the same time, and each sub-step or stage can also be executed at different times. In scenarios where execution times differ, the execution order of these sub-steps or stages can be flexibly configured according to requirements, and this application's embodiments do not limit this.
[0067] The above description is only an optional implementation method for some implementation scenarios of this application. It should be noted that for those skilled in the art, other similar implementation methods based on the technical concept of this application without departing from the technical concept of this application also fall within the protection scope of the embodiments of this application.
Claims
1. A controller characterized by comprising: The controller is connected to the driver, the driver includes a motor, the controller includes a control module and a state latch module, the state latch module and the control module are connected to the driver, and the control module is connected to the state latch module; The control module includes a fault monitoring submodule and a watchdog component. The fault monitoring submodule is used to monitor and control the operation of the driver. The watchdog component is connected to the fault monitoring submodule. After detecting a fault in the fault monitoring submodule, the watchdog component uses the state latching module to adjust the state of the driver. The state adjustment includes adjusting the running state to the previous state or reducing the running state.
2. The controller according to claim 1, characterized in that, The control module includes a signal diagnostic component connected to the fault monitoring submodule. The signal diagnostic component is used to receive external signals and, when it detects and determines that the external signal is abnormal, send a signal abnormality command to the fault monitoring submodule. The external signal includes a CAN signal.
3. The controller according to claim 2, characterized in that, The control module also includes a storage component, which is connected to the fault monitoring submodule. The storage component is used to send the stored historical state information of the driver to the fault monitoring submodule after receiving the feedback request transmitted by the fault monitoring submodule. The feedback request is sent by the fault monitoring submodule after receiving the signal abnormality instruction.
4. The controller according to claim 1, characterized in that, The controller further includes a pre-drive chip and a drive module. The control module includes a first drive component. The signal input terminal of the pre-drive chip is connected to the drive module, the state latch module, and the first drive component, respectively. The fault monitoring submodule is connected to the first drive component and the drive module. The signal output terminal of the pre-drive chip is connected to the driver. The fault monitoring submodule is also used to send a control signal to the pre-drive chip through the drive module after detecting a fault in the first drive component.
5. The controller according to claim 4, characterized in that, The controller further includes a first driving circuit and a second driving circuit. The input terminal of the pre-drive chip is connected to the first driving component, and the output terminal is connected to the first driving circuit and the second driving circuit respectively. The driving terminals of the first driving circuit and the second driving circuit are both connected to the driver.
6. The controller according to claim 5, characterized in that, The pre-drive chip includes a first drive link and a second drive link, and the controller also includes a monitoring circuit equipped with a first acquisition circuit and a second acquisition circuit. The input end of the first drive link is connected to the first drive component, and the output end is connected to the input end of the first drive circuit. The output end of the first drive circuit is connected to the signal acquisition end of the driver and the first acquisition circuit, and the signal output end of the first acquisition circuit is connected to the fault monitoring submodule. The input end of the second drive link is connected to the first drive component, and the output end is connected to the input end of the second drive circuit. The output end of the second drive circuit is connected to the signal acquisition end of the driver and the second acquisition circuit, and the signal output end of the second acquisition circuit is connected to the fault monitoring submodule.
7. The controller according to claim 6, characterized in that, The control module further includes a second drive component and a third drive component. The fault monitoring submodule is connected to the first drive link and the second drive link through the second drive component, and the fault monitoring submodule is connected to the drive module through the third drive component.
8. The controller according to claim 6, characterized in that, The controller also includes a power management chip with a power supply voltage monitoring module, the power supply voltage monitoring module is connected to the state latch module, and the state latch module is connected to the monitoring circuit and the pre-driven chip; The power supply voltage monitoring module is used to monitor the power supply voltage provided by the power management chip to the control module, and after detecting an abnormality in the power supply voltage, to adjust the state of the driver using the state latching module.
9. The controller according to claim 8, characterized in that, The monitoring circuit further includes a third acquisition circuit and a fourth acquisition circuit. The acquisition end of the fourth acquisition circuit is connected to the first driving circuit and the second driving circuit. The acquisition end of the third acquisition circuit is connected to the input end of the first driving circuit and the input end of the second driving circuit. The third acquisition circuit and the fourth acquisition circuit are connected to the state latch module. The output end of the state latch module is connected to the first driving link.
10. The controller according to claim 9, characterized in that, The controller further includes a NOT gate, a NOR gate, and an OR gate. The input of the OR gate is connected to the output of the driving module, the output of the first driving component, and the output of the state latch module. The output of the OR gate is connected to the input of the first driving link. The input of the NOR gate is connected to the input of the third acquisition circuit and the fourth acquisition circuit. The output of the NOR gate is connected to the state acquisition terminal of the state latch module. The input of the NOT gate is connected to the power management chip, and its output is connected to the state latch module.