Anomaly detection circuit and system
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SZ ZHUOYU TECH CO LTD
- Filing Date
- 2025-06-25
- Publication Date
- 2026-06-26
AI Technical Summary
In the vehicle's domain controller, when monitoring the hot-swap protection chip for abnormalities via a monitoring chip, the SOC's I/O resources are consumed, resulting in low processing efficiency.
The circuit employs a combination of a monitoring unit, an abnormal power supply unit, and an oscillation circuit unit. The monitoring unit is used to detect abnormalities, the abnormal power supply unit provides power voltage to the oscillation circuit unit after detecting an abnormality, and the oscillation circuit unit is used to generate an oscillation signal to unlock the unit under test.
By freeing up the IO resources of the SOC, the processing efficiency of the domain controller is improved.
Smart Images
Figure CN224417201U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of vehicle technology, and more particularly to an anomaly detection circuit and system. Background Technology
[0002] In the vehicle's Domain Control Unit (DCU), when the hot-swap protection chip generates an abnormal interrupt or the downstream power supply output is abnormal, the hot-swap protection chip's self-locking function will be triggered to protect the DCU.
[0003] In related technologies, a separate monitoring chip can be used to monitor the hot-swap protection chip. If an abnormal interruption of the hot-swap protection chip and / or an abnormal output voltage of the downstream power supply are detected, the monitoring chip can report the abnormality to the System-on-Chip (SOC), and the SOC can control the hot-swap protection chip to self-lock and reset. However, monitoring through a monitoring chip requires consuming the input-output (IO) resources of the SOC in the DCU to control the enabling and resetting of the monitoring chip, resulting in low processing efficiency of the domain controller. Utility Model Content
[0004] This application provides an anomaly detection circuit and system to release the IO resources of the SOC and improve the processing efficiency of the domain controller.
[0005] In a first aspect, embodiments of this application provide an anomaly detection circuit, comprising a monitoring unit, an abnormal power supply unit, and an oscillation circuit unit. The monitoring unit is connected to the detection position of the unit under test, the oscillation circuit unit is connected to the enable pin of the unit under test, the monitoring unit is connected to the abnormal power supply unit, and the abnormal power supply unit is connected to the oscillation circuit unit.
[0006] The monitoring unit is used to monitor the unit to be detected for anomalies.
[0007] The abnormal power supply unit is used to provide power voltage to the oscillation circuit unit after the monitoring unit detects an abnormality in the unit under test.
[0008] The oscillation circuit unit is used to input an oscillation signal to the enable pin of the unit under test, so as to unlock the unit under test after the unit under test abnormally locks itself.
[0009] In one possible implementation, the monitoring unit includes an interrupt monitoring unit and a voltage monitoring unit. One end of the interrupt monitoring unit is connected to the fault indication pin of the unit under test, and one end of the voltage monitoring unit is connected to the downstream power supply of the unit under test.
[0010] The interrupt monitoring unit is used to detect abnormal interruptions of the unit to be detected;
[0011] The voltage monitoring unit is used to detect abnormal output voltage of the power supply after the unit under test.
[0012] In one possible implementation, the abnormal power supply unit includes a first power supply, an abnormal power supply switch, and a voltage regulator, wherein the voltage regulator is connected to the oscillation circuit unit, wherein...
[0013] The abnormal power supply switch is used to connect the first power supply to the voltage regulator.
[0014] The voltage regulator is used to provide a gate voltage to the oscillation circuit unit so that the oscillation circuit unit generates the oscillation signal.
[0015] In one possible implementation, the abnormal power supply switch includes a base, an emitter, and a collector. The base is connected to the other end of the interrupt monitoring unit and the other end of the voltage monitoring unit, respectively. The emitter is connected to the first power supply, and the collector is connected to the voltage regulator.
[0016] The abnormal power supply switch is also used to receive abnormal voltages from the interrupt monitoring unit and / or the voltage monitoring unit, and, based on the abnormal voltages, connect the emitter and collector of the abnormal power supply switch to connect the first power supply to the voltage regulator.
[0017] In one possible implementation, the oscillation circuit unit includes a cross-coupled oscillator group and a capacitor. The cross-coupled oscillator group is connected to the voltage regulator of the abnormal power supply unit, and the cross-coupled oscillator group is connected to the capacitor.
[0018] The cross-coupled oscillator group is used to generate an oscillation signal through the voltage of the voltage regulator;
[0019] The capacitor is used to filter the oscillation signal.
[0020] In one possible implementation, the capacitor is further used to control the oscillation frequency of the oscillation circuit unit by means of the capacitance value, wherein the capacitance value is inversely proportional to the oscillation frequency.
[0021] In one possible implementation, the anomaly detection circuit further includes a grounding control unit connected to the oscillation circuit unit, wherein...
[0022] The grounding control unit is used to control the grounding of the oscillation circuit unit when the unit under test is normal.
[0023] In one possible implementation, the grounding control unit includes a second power supply and a grounding control switch, wherein the second power supply voltage is connected to the gate of the grounding control switch, wherein...
[0024] The second power supply is used to supply power voltage to the gate of the grounding control switch under normal conditions of the unit under test, so as to turn on the grounding control switch;
[0025] The grounding control switch is used to control the grounding of the oscillation circuit unit when it is turned on.
[0026] In one possible implementation, a unidirectional diode is provided between the grounding control unit and the monitoring unit, wherein...
[0027] The unidirectional diode is used to conduct unidirectionally from the grounding control unit to the monitoring unit to prevent the current from the abnormal power supply unit and / or the abnormal current from the monitoring unit from flowing to the grounding control unit.
[0028] Secondly, embodiments of this application provide an anomaly detection system, the system including an anomaly detection circuit and a unit to be detected, the anomaly detection circuit being connected to the unit to be detected.
[0029] The anomaly detection circuit and system provided in this application embodiment include an anomaly detection circuit that may include a monitoring unit, an abnormal power supply unit, and an oscillation circuit unit. The monitoring unit is used to monitor the anomaly of the unit under test; the abnormal power supply unit is used to provide power voltage to the oscillation circuit unit after the monitoring unit detects an anomaly in the unit under test; the oscillation circuit unit is used to input an oscillation signal to the enable pin of the unit under test, so as to unlock the unit under test after it has abnormally latched up. Anomaly monitoring of the unit under test can be achieved through the monitoring unit of the circuit. When an anomaly occurs, the unlocking circuit outputs an oscillation signal, pulls it high, and then pulls it low to restore the unit under test to normal operation. Furthermore, this application embodiment can be implemented using discrete components, which can release the IO resources of the SOC and improve the processing efficiency of the domain controller. Attached Figure Description
[0030] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0031] Figure 1 A schematic diagram illustrating an application scenario provided in an embodiment of this application;
[0032] Figure 2 This is a schematic diagram of an anomaly detection circuit provided in an embodiment of this application;
[0033] Figure 3 This is a schematic diagram of another anomaly detection circuit provided in an embodiment of this application;
[0034] Figure 4A This application provides a schematic diagram of a normal voltage level detection method.
[0035] Figure 4B This application provides a schematic diagram of an abnormality detection level.
[0036] Figure 4C This application provides a schematic diagram of an abnormality detection level.
[0037] Figure 4D This is a schematic diagram of an abnormality detection level provided in an embodiment of this application.
[0038] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0039] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0040] Figure 1 This is a schematic diagram illustrating an application scenario provided by an embodiment of this application. Please refer to [link / reference]. Figure 1 The vehicle's Domain Control Unit (DCU) includes multiple System-on-Chip (SOC) chips and hot-swap protection chips. The SOC handles computational tasks across different domains. The hot-swap protection chip can be located at the power input port or the connection interface of peripheral modules (e.g., cameras). It ensures stable power supply during module insertion and removal, preventing transient interference from affecting the SoC and other sensitive components.
[0041] When the hot-swap protection chip generates an abnormal interrupt or the downstream power supply output is abnormal, the self-locking function of the hot-swap protection chip will be triggered to protect the DCU.
[0042] In related technologies, a separate monitoring chip can be used to monitor the hot-swap protection chip. If an abnormal interruption of the hot-swap protection chip and / or an abnormal output voltage of the downstream power supply are detected, the monitoring chip can report the abnormality to the SOC, and the SOC can control the hot-swap protection chip to self-lock and reset. However, monitoring through a monitoring chip requires consuming the input-output (IO) resources of the SOC in the DCU to control the enabling and resetting of the monitoring chip, resulting in low processing efficiency of the domain controller.
[0043] The anomaly detection circuit provided in this application includes a monitoring unit, an abnormal power supply unit, and an oscillation circuit unit. The monitoring unit monitors the unit under test for anomalies; the abnormal power supply unit provides power to the oscillation circuit unit after the monitoring unit detects an anomaly in the unit under test; the oscillation circuit unit inputs an oscillation signal to the enable pin of the unit under test to unlock it after the unit has abnormally latched up. Anomaly monitoring of the unit under test can be achieved through the monitoring unit of the circuit. When an anomaly occurs, the unlocking circuit outputs an oscillation signal, pulls it high, and then pulls it low to restore the unit under test to normal operation. Furthermore, this application embodiment can be implemented using discrete components, which can release the IO resources of the SOC and improve the processing efficiency of the domain controller.
[0044] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0045] Figure 2 This is a schematic diagram of an anomaly detection circuit provided in an embodiment of this application. Please refer to... Figure 2 The anomaly detection circuit 200 includes a monitoring unit 201, an abnormal power supply unit 202, and an oscillation circuit unit 203. The monitoring unit 201 is connected to the detection position of the unit under test, the oscillation circuit unit is connected to the enable pin of the unit under test, the monitoring unit is connected to the abnormal power supply unit, and the abnormal power supply unit is connected to the oscillation circuit unit. The unit under test can be a hot-swappable protection chip.
[0046] The monitoring unit can be used to monitor the unit under test for abnormalities; the abnormal power supply unit can be used to provide power voltage to the oscillation circuit unit after the monitoring unit detects an abnormality in the unit under test; the oscillation circuit unit can be used to input an oscillation signal to the enable pin of the unit under test so as to unlock the unit under test after the unit under test has abnormally self-locked.
[0047] The monitoring unit can determine whether the unit under test is abnormal by detecting the level of the level. For example, if the level of the unit under test is high, that is, the input logic level is 1, then the unit under test is abnormal; if the level of the unit under test is low, that is, the input logic level is 0, then the unit under test is normal.
[0048] In some possible embodiments, the monitoring unit includes a first control unit. When the level of the unit under test is low, the first control unit is turned off; when the level of the unit under test is high, the first control unit is turned on, which can enable the abnormal power supply unit to be turned on and provide power voltage to the oscillation circuit unit.
[0049] For example, the first control unit can be a transistor, which can be turned off when the level of the unit to be detected is low and turned on when the level of the unit to be detected is high.
[0050] In some possible embodiments, the abnormal power supply unit includes a second control unit. After the first control unit is turned on, a high level is sent to the second control unit, causing the second control unit to turn on, and thus the abnormal power supply unit is turned on.
[0051] For example, the second control unit can be a transistor. In other embodiments, the first and second control units can also be other switching elements (such as operational amplifiers, switching chips, etc.), which are not limited here.
[0052] The unit under test can be a hot-swappable protection chip. When an abnormal interrupt occurs or the downstream power supply output is abnormal, the unit under test will trigger a self-locking function.
[0053] After the abnormal power supply unit supplies voltage to the oscillation circuit unit, the oscillation unit can generate an oscillation signal. The oscillation signal can be input to the enable pin of the unit under test, thereby unlocking the unit under test.
[0054] The anomaly detection circuit provided in this application embodiment can monitor the anomalies of the unit under test through the circuit's monitoring unit. When an anomaly occurs, the unlocking circuit outputs an oscillation signal to raise the enable of the unit under test, allowing it to resume normal operation. This can release the I / O resources of the SOC and improve the processing efficiency of the domain controller.
[0055] Figure 3 This is a schematic diagram of another anomaly detection circuit provided in an embodiment of this application. Please refer to... Figure 3 The monitoring unit may include an interrupt monitoring unit and a voltage monitoring unit. One end of the interrupt monitoring unit is connected to the fault indication pin (monitoring input 2) of the unit under test, and one end of the voltage monitoring unit is connected to the power supply (monitoring input 1) of the unit under test.
[0056] The interrupt monitoring unit can be used to detect abnormal interruptions of the unit under test.
[0057] Please see Figure 3 The first control unit in the interrupt monitoring unit can be transistor Q6.
[0058] In some possible embodiments, the interrupt monitoring unit may also include resistors R22 and R18.
[0059] One end of resistor R22 is connected to the fault indication pin of the unit under test, and the other end of resistor R22 is connected to the base of transistor Q6. The emitter of transistor Q6 is grounded, and the collector of transistor Q6 is connected to the abnormal power supply unit through resistor R19.
[0060] Resistor R18 is located between the base and emitter of transistor Q6. Resistor R18 can be a voltage divider resistor to protect transistor Q6.
[0061] When the fault indication pin of the unit under test is high, current flows into the base of transistor Q6 through resistor R22. At this time, the voltage between the base and emitter increases, transistor Q6 turns on, and current flows into the abnormal power supply unit through resistor R19.
[0062] Resistor R18 is connected between the base of transistor Q6 and ground. Resistor R18 limits the base current of transistor Q6. When the base voltage of Q6 is high, current flows into the base of Q3 through resistor R18. The resistance value of resistor R18 determines the magnitude of the base current, preventing excessive base current from damaging Q3.
[0063] The voltage monitoring unit can be used to detect abnormal output voltage of the power supply after the unit under test.
[0064] Please see Figure 3 The second control unit in the voltage monitoring unit can be transistor Q4.
[0065] Optionally, the voltage monitoring unit may also include resistors R13 and R14.
[0066] One end of resistor R13 is connected to the power supply of the unit under test, and the other end of resistor R13 is connected to the base of transistor Q4. The emitter of transistor Q4 is grounded, and the collector of transistor Q4 is connected to the abnormal power supply unit through resistor R19.
[0067] Resistor R14 is located between the base and emitter of transistor Q4. Resistor R14 can be a voltage divider resistor to protect transistor Q4.
[0068] The working principle of the voltage monitoring unit can be found in the above description of the interrupt monitoring unit's working principle, and will not be repeated here.
[0069] By using the interrupt monitoring unit and the voltage monitoring unit, different faults of the unit under test can be detected simultaneously, which can reduce the space occupied in the domain controller.
[0070] In some possible embodiments, the abnormal power supply unit may include a first power supply, an abnormal power supply switch, and a voltage regulator connected to the oscillation circuit unit.
[0071] An abnormal power supply switch can be used to connect the first power supply to the voltage regulator. The abnormal power supply switch can be a positive-negative-positive (PNP) bipolar transistor.
[0072] The abnormal power supply switch may include a base, an emitter, and a collector. The base is connected to the other end of the interrupt monitoring unit and the other end of the voltage monitoring unit, respectively. The emitter is connected to the first power supply, and the collector is connected to the voltage regulator.
[0073] The abnormal power supply switch is also used to receive abnormal voltages from the interrupt monitoring unit and / or the voltage monitoring unit, and, based on the abnormal voltages, connect the emitter and collector of the abnormal power supply switch to connect the first power supply to the voltage regulator.
[0074] Please see Figure 3 The abnormal power supply switch can be transistor Q7. The current of the monitoring unit can flow into the base of transistor Q7 through resistor R19. When transistor Q7 is turned on, the current can flow from the emitter to the collector, so that the first power supply V3 provides voltage to the oscillation circuit unit.
[0075] In some possible embodiments, a voltage divider resistor may also be included between the base and emitter of the faulty power supply switch (see [link]). Figure 3 The R20 resistor in the figure can ensure that the base voltage is sufficient to turn on the abnormal power supply switch, while avoiding overdrive caused by direct voltage loading, so as to protect the abnormal power supply switch.
[0076] In some possible embodiments, the voltage of the first power supply can be directly matched with the enable level of the unit under test, without the need for level conversion circuitry. Furthermore, the output level can be controlled by setting the voltage of the first power supply, achieving controllable output level.
[0077] In some possible embodiments, the current from the first power supply V3 can flow to the voltage regulator (VCC).
[0078] The voltage regulator VCC is used to provide a gate voltage to the oscillation circuit unit, so that the oscillation circuit unit generates an oscillation signal. In some embodiments, the voltage regulator VCC can be used to adjust the voltage when the voltage of the first power supply does not match the enable level of the unit under test, so that the voltage of the first power supply matches the enable level of the unit under test.
[0079] The oscillation circuit unit may include a cross-coupled oscillator group and a capacitor. The cross-coupled oscillator group is connected to the voltage regulator of the abnormal power supply unit, and the cross-coupled oscillator group is connected to the capacitor. The cross-coupled oscillator group is used to generate an oscillation signal through the voltage of the voltage regulator; the capacitor is used to filter the oscillation signal.
[0080] A cross-coupled oscillator array can include two cross-coupled oscillators. A cross-coupled oscillator is a circuit structure designed with anti-phase cross-coupling and series connection, containing two oscillator modules, which can achieve power supply current reuse and balance the output duty cycle. The oscillator modules can be transistors.
[0081] Capacitors are also used to control the oscillation frequency of an oscillating circuit unit by controlling the capacitance value; the capacitance value is inversely proportional to the oscillation frequency.
[0082] Please see Figure 3 The oscillation circuit unit includes a first cross-coupled oscillator, a second cross-coupled oscillator, and a capacitor C3. The first cross-coupled oscillator includes two oscillator modules, namely transistor U11 and transistor U13. The second cross-coupled oscillator includes two oscillator modules, namely transistor U10 and transistor U14.
[0083] The output of transistor U11 is connected to the input of transistor U13, while the output of transistor U13 is connected to the input of transistor U11, forming a positive feedback loop. This allows the circuit to switch back and forth between two states, thereby generating oscillation.
[0084] The output of transistor U10 is connected to the input of transistor U14, and the output of transistor U14 is connected to the input of transistor U10, forming another positive feedback loop.
[0085] Two cross-coupled oscillators can be used to generate two oscillation signals with opposite phases, or to improve the stability and output power of the oscillator.
[0086] Resistors R11 and R10 can be used to provide bias current.
[0087] In this application, a positive feedback loop can be generated by a cross-coupled oscillator, which can generate a stable oscillation signal. The resistor can be used to provide bias, and the capacitor can be used to provide filtering to ensure the normal operation of the oscillator. At the same time, the capacitor can be used to control the oscillation waveform frequency of the unit under test to unlock the oscillation circuit unit.
[0088] In some possible embodiments, the anomaly detection circuit further includes a ground control unit connected to the oscillation circuit unit, wherein the ground control unit is used to control the oscillation circuit unit to be grounded when the unit under test is normal.
[0089] Specifically, the grounding control unit may include a second power supply and a grounding control switch, wherein the second power supply voltage is connected to the gate of the grounding control switch.
[0090] The second power supply is used to supply power voltage to the gate of the grounding control switch under normal conditions of the unit under test, so as to turn on the grounding control switch; the grounding control switch is used to control the grounding of the oscillation circuit unit when it is turned on.
[0091] Please see Figure 3 The grounding control unit includes transistor Q3 and a second power supply V5, wherein transistor Q3 is a grounding control switch. The second power supply V5 and the first power supply V3 can be the same power supply to save on the number of power supplies and reduce costs, or they can be different power supplies to achieve flexible control of the two power supply voltages; no restriction is imposed here.
[0092] In some possible embodiments, the grounding control unit also includes resistors R9, R12, and R23.
[0093] Transistor Q3 is an NPN transistor, whose base (B) is connected to the second power supply V5 through resistors R9 and R23; its collector (C) is connected to the oscillation circuit unit.
[0094] When monitoring input 1 or monitoring input 2 is high, Q4 or Q6 is turned on, diode D1 is turned on, and the second power supply V5 is grounded after passing through diode D1, so that the voltage at the base (B) of transistor Q3 is low and transistor Q3 is not turned on. The input terminals (gates of U11 and U13) of the oscillation circuit unit will be floating, and VCC will have a high level input to the oscillation circuit unit, so that the oscillation circuit unit can output an oscillating square wave voltage waveform.
[0095] When monitoring input 1 or monitoring input 2 is low, Q4 or Q6 is not conducting, diode D1 is not conducting, and the second power supply V5 makes the base (B) of transistor Q3 high, so transistor Q3 conducts. Then, the input terminals (gates of U11 and U13) of the oscillation circuit unit will be grounded (0 level) because Q3 is conducting, and VCC is also 0 level, so oscillation cannot be generated.
[0096] Resistor R9 is the base resistor, which can be used to limit the base current to protect transistor Q3.
[0097] Resistor R12 is a collector resistor, which can be used to limit the collector current and provide a voltage drop when transistor Q3 is turned on to protect transistor Q3.
[0098] In some possible embodiments, a unidirectional diode is provided between the grounding control unit and the monitoring unit. The unidirectional diode can be used to ensure unidirectional conduction from the grounding control unit to the monitoring unit, thereby preventing current from the abnormal power supply unit and / or abnormal current from the monitoring unit from flowing to the grounding control unit.
[0099] Please see Figure 3 The unidirectional diode is D1, and the current can flow from the second power supply in the ground control unit to the collector of transistor Q6 and the collector of transistor Q4.
[0100] When the unit under test is working normally: Both monitoring input 2 of the interrupt monitoring unit and monitoring input 1 of the voltage monitoring unit are at level 0. When monitoring input 1 is at level 0, the base voltage of Q4 is 0, and Q4 is not conducting. When monitoring input 2 is at level 0, the base voltage of Q6 is 0, and Q6 is not conducting. The base of Q7 is connected to the collectors of Q4 and Q6, so the base voltage of Q7 is 0, and Q7 is not conducting. The base voltage of Q3 is connected to the second power supply voltage, and Q3 is conducting. Transistors Q4, Q6, and Q7 are all not conducting, while Q3 is conducting, resulting in VCC being at level 0, and the gates of U11 and U13 being at level 0. The oscillation circuit composed of U10, U11, U13, U14, R10, R11, and C3 cannot oscillate and outputs a level 0.
[0101] Figure 4A This is a schematic diagram illustrating a normal voltage level detection method provided in an embodiment of this application. Please refer to [link / reference]. Figure 4A The horizontal axis represents the test time, from 0s to 60ms. The vertical axis represents the voltage levels of monitoring input 1 (minimum -4V, maximum 4V), monitoring input 2 (minimum -4V, maximum 4V), and the output (minimum -4V, maximum 4V). When the unit under test is functioning normally, the voltage levels of monitoring input 1, monitoring input 2, and output are all 0.
[0102] When the unit under test malfunctions (abnormal interruption): monitoring input 2 is at an abnormal level of 1 and monitoring input 1 is at a normal level of 0. Transistors Q6 and Q7 are turned on, while Q4 and Q3 are not turned on, causing diode D1 to turn on, thus making VCC 3.3V. The gates of U11 and U13 are left floating. The oscillation circuit composed of U10, U11, U13, U14, R10, R11, and C3 outputs an oscillating square wave voltage waveform.
[0103] When the monitoring input 2 is at level 1, the base voltage of transistor Q6 is high, and Q6 conducts. After Q6 conducts, the base voltage of Q7 is pulled low, causing Q7 to conduct. With Q6 conducting, the collector voltage of Q6 is close to GND, causing diode D1 to conduct. After D1 conducts, the base of Q3 is grounded, and after Q7 conducts, the VCC voltage is pulled high to 3.3V, the collector voltage of Q3 is pulled high, and Q3 does not conduct.
[0104] Since Q3 is not conducting, VCC is at a high level. The gates of U11 and U13 are floating, while U11 and U13 are conducting. The oscillation circuit composed of U10, U11, U13, U14, R10, R11, and C3 forms positive feedback, generating an oscillating square wave voltage waveform.
[0105] Figure 4B This is a schematic diagram of an abnormality detection level provided in an embodiment of this application. Please refer to... Figure 4B When the unit under test is abnormally interrupted, monitoring input 2 is 3.3V, monitoring input 1 is 0V, and an oscillation signal of 3.3V is output.
[0106] When the unit under test is malfunctioning (abnormal output voltage of the power supply): monitoring input 1 is at an abnormal level of 1, monitoring input 2 is at a normal level of 0, Q4 and Q7 are turned on, Q6 and Q3 are not turned on, causing diode D1 to turn on, thus making VCC 3.3V, and the gates of U11 & U13 are left floating. The oscillation circuit composed of U10, U11, U13, U14, R10, R11, and C3 outputs an oscillating square wave voltage waveform.
[0107] For a detailed analysis process, please refer to the analysis process of the abnormal interruption mentioned above, which will not be repeated here.
[0108] Figure 4C This is a schematic diagram of an abnormality detection level provided in an embodiment of this application. Please refer to... Figure 4C When the unit under test is abnormally interrupted, monitoring input 2 is 0V, monitoring input 1 is 3.3V, and an oscillation signal of 3.3V is output.
[0109] When the interruption of the unit under test and the output voltage of the downstream power supply occur simultaneously, the operation is the same as that of a single abnormality: monitoring input 1 is at abnormal level 1, monitoring input 2 is at abnormal level 1, Q4, Q6, and Q7 are turned on, Q3 is not turned on, causing diode D1 to turn on, thus making VCC 3.3V level, and the gates of U11 & U13 are left floating. The oscillation circuit composed of U10, U11, U13, U14, R10, R11, and C3 outputs an oscillating square wave voltage waveform.
[0110] Figure 4D This is a schematic diagram of an abnormality detection level provided in an embodiment of this application. Please refer to... Figure 4D When the unit under test is abnormally interrupted, monitoring input 2 is 3.3V, monitoring input 1 is 3.3V, and an oscillation signal of 3.3V is output.
[0111] In the above embodiments, Q6, Q4, and Q3 are NPN transistors, and Q7 is a PNP transistor, as an example. In specific applications, the type of transistor is not limited; for example, the transistor can be an NPN transistor, a PNP transistor, or a MOSFET, etc.
[0112] It is worth noting that, Figure 3 The resistor shown can be omitted or replaced with other types of resistor components in practical applications, and can also be used to monitor abnormalities of the unit under test.
[0113] For an example, please see Figure 3 Resistors R20, R18, R14, R12, as well as R21, R19, R23, etc., can be omitted.
[0114] Accordingly, this application provides an anomaly detection system, which includes the anomaly detection circuit and the unit to be detected as described in the above embodiments, with the anomaly detection circuit connected to the unit to be detected.
[0115] In some possible embodiments, the anomaly detection system can be a domain controller or a mobile platform containing a domain controller. The mobile platform can be a vehicle, ship, drone, robot, or other similar device.
[0116] Anomaly detection systems can be deployed in devices such as domain controllers or mobile platforms to detect anomalies, thereby freeing up I / O resources of chips (such as SOCs) in these devices and improving their processing efficiency.
[0117] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0118] The above provides a detailed description of an anomaly detection circuit provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. An anomaly detection circuit, characterized by, The anomaly detection circuit includes a monitoring unit, an abnormal power supply unit, and an oscillation circuit unit. The monitoring unit is connected to the detection position of the unit under test, the oscillation circuit unit is connected to the enable pin of the unit under test, the monitoring unit is connected to the abnormal power supply unit, and the abnormal power supply unit is connected to the oscillation circuit unit. The monitoring unit is used to monitor the unit to be detected for anomalies. The abnormal power supply unit is used to provide power voltage to the oscillation circuit unit after the monitoring unit detects an abnormality in the unit under test. The oscillation circuit unit is used to input an oscillation signal to the enable pin of the unit under test, so as to unlock the unit under test after the unit under test abnormally locks itself.
2. The circuit of claim 1, wherein, The monitoring unit includes an interrupt monitoring unit and a voltage monitoring unit. One end of the interrupt monitoring unit is connected to the fault indication pin of the unit under test, and one end of the voltage monitoring unit is connected to the downstream power supply of the unit under test. The interrupt monitoring unit is used to detect abnormal interruptions of the unit to be detected; The voltage monitoring unit is used to detect abnormal output voltage of the power supply after the unit under test.
3. The circuit of claim 2, wherein, The abnormal power supply unit includes a first power supply, an abnormal power supply switch, and a voltage regulator. The voltage regulator is connected to the oscillation circuit unit. The abnormal power supply switch is used to connect the first power supply to the voltage regulator. The voltage regulator is used to provide a gate voltage to the oscillation circuit unit so that the oscillation circuit unit generates the oscillation signal.
4. The circuit according to claim 3, characterized in that, The abnormal power supply switch includes a base, an emitter, and a collector. The base is connected to the other end of the interrupt monitoring unit and the other end of the voltage monitoring unit, respectively. The emitter is connected to the first power supply, and the collector is connected to the voltage regulator. The abnormal power supply switch is also used to receive abnormal voltages from the interrupt monitoring unit and / or the voltage monitoring unit, and, based on the abnormal voltages, connect the emitter and collector of the abnormal power supply switch to connect the first power supply to the voltage regulator.
5. The circuit according to claim 1, characterized in that, The oscillation circuit unit includes a cross-coupled oscillator group and a capacitor. The cross-coupled oscillator group is connected to the voltage regulator of the abnormal power supply unit, and the cross-coupled oscillator group is connected to the capacitor. The cross-coupled oscillator group is used to generate an oscillation signal through the voltage of the voltage regulator; The capacitor is used to filter the oscillation signal.
6. The circuit according to claim 5, characterized in that, The capacitor is also used to control the oscillation frequency of the oscillation circuit unit by means of the capacitance value of the capacitor, wherein the capacitance value of the capacitor is inversely proportional to the oscillation frequency.
7. The circuit according to claim 1, characterized in that, The anomaly detection circuit further includes a grounding control unit, which is connected to the oscillation circuit unit. The grounding control unit is used to control the grounding of the oscillation circuit unit when the unit under test is normal.
8. The circuit according to claim 7, characterized in that, The grounding control unit includes a second power supply and a grounding control switch, wherein the second power supply is connected to the gate of the grounding control switch. The second power supply is used to supply power voltage to the gate of the grounding control switch under normal conditions of the unit under test, so as to turn on the grounding control switch; The grounding control switch is used to control the grounding of the oscillation circuit unit when it is turned on.
9. The circuit according to claim 7, characterized in that, A unidirectional diode is provided between the grounding control unit and the monitoring unit, wherein... The unidirectional diode is used to conduct unidirectionally from the grounding control unit to the monitoring unit to prevent the current from the abnormal power supply unit and / or the abnormal current from the monitoring unit from flowing to the grounding control unit.
10. An anomaly detection system, characterized in that, The system includes an anomaly detection circuit and a unit to be detected as described in any one of claims 1-9, wherein the anomaly detection circuit is connected to the unit to be detected.