Narrow frame display panel and display module
By integrating a driving module structure at the bottom of the OLED structure, the problem of wide bezels in traditional display panels is solved, achieving a narrow bezel design and cost reduction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHONGQING LIANGJIANG LIANCHUANG ELECTRONICS CO LTD
- Filing Date
- 2025-07-24
- Publication Date
- 2026-07-14
AI Technical Summary
Traditional display panels require external driver chips, which prevents the bezels from being made narrower, affecting aesthetics and screen-to-body ratio, while also increasing material and manufacturing costs.
By placing the driver module structure at the bottom of the OLED structure, the wiring space requirement of traditional driver chips around the panel is eliminated. An integrated driver module structure is adopted, including LVDS receiver, decoder, data memory, PWM generator and LED driver circuit, etc., saving the purchase of dedicated chips.
It achieves a narrow bezel design, improving product aesthetics and screen-to-body ratio, reducing material and manufacturing costs, and minimizing bonding process steps.
Smart Images

Figure CN224501469U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of display panel technology, and in particular to a narrow bezel display panel and display module. Background Technology
[0002] With the rapid development of display technology, display panels are being used more and more widely in consumer electronics, industrial control and other fields.
[0003] In existing technologies, traditional display panels typically require external driver chips to control pixels. However, these external driver chips usually need to be placed around the perimeter of the display panel, which prevents the panel bezels from being made narrow, affecting the product's aesthetics and screen-to-body ratio. Furthermore, dedicated driver chips need to be purchased separately, resulting in a long procurement cycle and increased material costs. Additionally, the bonding process between the driver chip and the panel increases manufacturing costs. Utility Model Content
[0004] Therefore, the purpose of this utility model is to provide a narrow bezel display panel and display module, which can effectively solve the shortcomings of the prior art.
[0005] A narrow bezel display panel, comprising:
[0006] The display unit array includes a plurality of OLED structures;
[0007] The driving module array includes several driving module structures correspondingly disposed at the bottom of the OLED structure and a project signal layer disposed at the bottom of the driving module structures for connecting external input LVDS signals and external power supply. The driving module structure includes an LVDS receiver for receiving external input LVDS signals, a decoder communicatively connected to the LVDS receiver for decoding external input LVDS signals, a data memory communicatively connected to the decoder for storing decoded display data, a PWM generator signalally connected to the data memory for converting display data into PWM driving signals, and an LED driving circuit communicatively connected to the PWM generator for driving the OLED structure.
[0008] A substrate, which is disposed at the bottom of the project signal layer.
[0009] Furthermore, the specific model of the LVDS receiver is DS90LV047A, the specific model of the decoder is iCE40UP5K, the specific model of the data memory is 23LC1024, the specific model of the PWM generator is PCA9685, and the specific model of the LED driver circuit is ALED1642GW.
[0010] Furthermore, the driver module structure also includes an address memory that is communicatively connected to the decoder for storing decoded address information.
[0011] Furthermore, the driver module structure also includes a pre-stored address unit that is communicatively connected to the address memory for storing fixed addresses corresponding to each driver module structure.
[0012] Furthermore, the driving module structure also includes a comparator for comparing the address information of the address memory with the address information of the pre-stored addresser. The comparator is disposed between the address memory and the pre-stored addresser, and the comparator is signal-connected to the pre-stored addresser, the address memory, and the data memory, respectively.
[0013] Furthermore, the specific model of the address memory is MR25H40CDF, the specific model of the pre-stored addresser is DS28E01G+, and the specific model of the comparator is TLV3201.
[0014] Furthermore, a pad array is provided on the top side of the project signal layer away from the drive module structure. The pad array includes a pad structure for connecting external input LVDS signals and external power supply, as well as an FPC structure.
[0015] On the other hand, this utility model also provides a display module, including the aforementioned narrow bezel display panel.
[0016] Compared with the prior art, the beneficial effects of this utility model are: by setting the driving module structure at the bottom of the OLED structure, the wiring space requirement of the traditional driving chip around the panel is eliminated, the panel bezel width can be narrowed, the product aesthetics are increased and the screen ratio is optimized. At the same time, the purchase of dedicated chips can be eliminated, the procurement cycle is avoided, the material cost is reduced, and the bonding process between the driving chip and the panel is reduced, which further reduces the manufacturing cost. Attached Figure Description
[0017] Figure 1 This is a cross-sectional view of the narrow bezel display panel in an embodiment of this utility model;
[0018] Figure 2 This is a flowchart illustrating the narrow bezel display panel in an embodiment of this utility model.
[0019] Explanation of key component symbols:
[0020] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this utility model.
[0021] Detailed Implementation
[0022] To facilitate understanding of this utility model, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of this utility model are shown in the drawings. However, this utility model can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this utility model will be more thorough and complete.
[0023] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.
[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0025] Please see Figures 1 to 2 A narrow bezel display panel according to an embodiment of the present invention includes:
[0026] Display unit array 10, which includes a plurality of OLED structures 11.
[0027] The driving module array 20 includes a plurality of driving module structures 21 correspondingly disposed at the bottom of the OLED structure 11 and a project signal layer 22 disposed at the bottom of the driving module structures 21 for connecting external input LVDS signals and external power supply. The driving module structure 21 includes an LVDS receiver 211 for receiving external input LVDS signals, a decoder 212 communicatively connected to the LVDS receiver 211 for decoding external input LVDS signals, a data storage 213 communicatively connected to the decoder 212 for storing decoded display data, a PWM generator 214 signal-connected to the data storage 213 for converting display data into PWM drive signals, and an LED driving circuit 215 communicatively connected to the PWM generator 214 for driving the OLED structure 11.
[0028] Substrate 30 is disposed at the bottom of the project signal layer 22.
[0029] Understandably, by setting the driving module structure 21 at the bottom of the OLED structure 11, the wiring space requirement of traditional driving chips around the panel is eliminated, the panel bezel width can be narrowed, the product aesthetics are improved and the screen ratio is optimized. At the same time, the purchase of dedicated chips can be eliminated, the procurement cycle is avoided, the material cost is reduced, and the bonding process between the driving chip and the panel is reduced, further reducing the manufacturing cost.
[0030] Furthermore, the specific model of the LVDS receiver 211 is DS90LV047A, the specific model of the decoder 212 is iCE40UP5K, the specific model of the data memory 213 is 23LC1024, the specific model of the PWM generator 214 is PCA9685, and the specific model of the LED driver circuit 215 is ALED1642GW.
[0031] Furthermore, the driver module structure 21 also includes an address memory 216 that is communicatively connected to the decoder 212 for storing decoded address information.
[0032] Furthermore, the driving module structure 21 also includes a pre-stored address unit 217 which is communicatively connected to the address memory 216 for storing fixed addresses corresponding to each driving module structure 21.
[0033] Furthermore, the driving module structure 21 also includes a comparator 218 for comparing the address information of the address memory 217 with the address information of the pre-stored addresser 217. The comparator 218 is disposed between the address memory 216 and the pre-stored addresser 217, and the comparator 218 is signal-connected to the pre-stored addresser 217, the address memory 216 and the data memory 213 respectively.
[0034] Furthermore, the specific model of the address memory 216 is MR25H40CDF, the specific model of the pre-stored addresser 217 is DS28E01G+, and the specific model of the comparator 218 is TLV3201.
[0035] Understandably, the project signal layer 22 is powered on and receives externally input LVDS signals, and simultaneously outputs the externally input LVDS signals to each of the LVDS receivers 211. In the same drive module structure 21, the LVDS receivers output the received LVDS signals to the decoder 212. The decoder 212 decodes the externally input LVDS signals into display data and address information, and outputs them to the data memory 213 and the address memory 216 for storage, respectively. The address memory 216 outputs the decoded address information to the comparator 218. The comparator 218 compares the decoded address information with the corresponding fixed address pre-stored in the pre-stored addresser 217.
[0036] It should be noted that, within the same driver module structure 21, if the decoded address information is not the same as the corresponding fixed address stored in the pre-stored addresser 217, the process will terminate.
[0037] It should be noted that, within the same driving module structure 21, if the decoded address information is the same as the corresponding fixed address pre-stored in the pre-stored addresser 217, then the comparator 218 controls the data memory 213 to output the decoded display data to the PWM generator 214. The PWM generator 214 converts the decoded display data into a PWM drive signal and outputs it to the LED drive circuit 215. The LED drive circuit 215 drives the OLED structure 11 according to the input PWM drive signal.
[0038] Furthermore, a pad array 222 is provided on the top of the project signal layer 22 on the side away from the drive module structure 21. The pad array 222 includes a pad structure 223 and an FPC structure 224 for connecting external input LVDS signals and external power supply.
[0039] On the other hand, this utility model also provides a display module, including the aforementioned narrow bezel display panel.
[0040] In summary, the narrow bezel display panel and display module in the above embodiments of this utility model eliminate the wiring space requirement of traditional driver chips around the panel by setting the driving module structure at the bottom of the OLED structure, which allows the panel bezel width to be narrowed, increases product aesthetics and optimizes screen ratio. At the same time, it can save the purchase of dedicated chips, avoid procurement cycle, reduce material costs, and further reduce manufacturing costs by reducing the bonding process between driver chips and panel.
[0041] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0042] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A narrow bezel display panel, characterized in that, include: The display unit array includes a plurality of OLED structures; The driving module array includes several driving module structures correspondingly disposed at the bottom of the OLED structure and a project signal layer disposed at the bottom of the driving module structures for connecting external input LVDS signals and external power supply. The driving module structure includes an LVDS receiver for receiving external input LVDS signals, a decoder communicatively connected to the LVDS receiver for decoding external input LVDS signals, a data memory communicatively connected to the decoder for storing decoded display data, a PWM generator signalally connected to the data memory for converting display data into PWM driving signals, and an LED driving circuit communicatively connected to the PWM generator for driving the OLED structure. A substrate, which is disposed at the bottom of the project signal layer.
2. The narrow bezel display panel according to claim 1, characterized in that, The specific model of the LVDS receiver is DS90LV047A, the specific model of the decoder is iCE40UP5K, the specific model of the data memory is 23LC1024, the specific model of the PWM generator is PCA9685, and the specific model of the LED driver circuit is ALED1642GW.
3. The narrow bezel display panel according to claim 1, characterized in that, The driver module structure also includes an address memory that is communicatively connected to the decoder for storing decoded address information.
4. The narrow bezel display panel according to claim 3, characterized in that, The driver module structure also includes a pre-stored address unit that is communicatively connected to the address memory for storing fixed addresses corresponding to each driver module structure.
5. The narrow bezel display panel according to claim 4, characterized in that, The driving module structure further includes a comparator for comparing the address information of the address memory with the address information of the pre-stored addresser. The comparator is disposed between the address memory and the pre-stored addresser, and the comparator is signal-connected to the pre-stored addresser, the address memory, and the data memory, respectively.
6. The narrow bezel display panel according to claim 5, characterized in that, The specific model of the address memory is MR25H40CDF, the specific model of the pre-stored addresser is DS28E01G+, and the specific model of the comparator is TLV3201.
7. The narrow bezel display panel according to claim 1, characterized in that, A pad array is provided on the top side of the project signal layer away from the drive module structure. The pad array includes a pad structure for connecting external input LVDS signals and external power supply, as well as an FPC structure.
8. A display module, characterized in that, It includes the narrow bezel display panel as described in any one of claims 1-7.