Electronic package
By using a multi-layered cladding structure with wire bonding and a high heat dissipation bonding layer, the problem of copper metal ball limitation is solved, achieving efficient heat dissipation and improved structural strength.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SILICONWARE PRECISION IND CO LTD
- Filing Date
- 2025-08-06
- Publication Date
- 2026-07-24
AI Technical Summary
In existing high-bandwidth packages, the height and spacing of copper metal balls limit the improvement of chip heat dissipation performance and result in insufficient utilization of package space.
Electronic components are connected to the substrate using wire bonding, and bonded to the substrate with a high heat dissipation bonding layer to form a multi-layer cladding structure. The close spacing of the wire bonding and the high heat dissipation material improve the heat dissipation effect and enhance the structural strength.
This approach maximizes the thickness of electronic components, avoids the limitations imposed by the spacing between copper metal balls, and improves heat dissipation efficiency and structural strength.
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Figure CN224556291U_ABST
Abstract
Description
Technical Field
[0001] This application relates to a semiconductor packaging technology, and more particularly to an electronic package for embedding chips. Background Technology
[0002] High-performance computing (HPC) technology is becoming increasingly important and widespread in modern life (such as the development of medical technology, the development of cancer drugs, or the automatic sensing and detection computing of autonomous vehicles). Among them, in order to effectively integrate different types or multiple packaged components, stacked semiconductor packaging (Package on Package, PoP) technology can stack multiple packages into a miniaturized component in three dimensions to reduce the space occupied by the packaged component in the product, which has become an important focus of technological development.
[0003] For a high bandwidth PoP, it includes an upper substrate, a lower substrate, a plurality of copper metal balls and a chip disposed between the upper substrate and the lower substrate, and an encapsulating colloid covering the plurality of copper metal balls and the chip.
[0004] However, to improve the heat dissipation performance of the chip encapsulated in the encapsulating colloid, the chip thickness is generally increased, but this is limited by the height and spacing of the copper metal balls.
[0005] Therefore, how to overcome the various shortcomings of existing technologies is a technical problem that all sectors urgently need to solve. Utility Model Content
[0006] In view of the deficiencies in the prior art, this application provides an electronic package, comprising: a first substrate; an electronic component disposed on the first substrate; a plurality of bonding wires erected on the first substrate and electrically connected to the first substrate; a first cladding layer formed on the first substrate and covering the electronic component and the plurality of bonding wires; a second substrate disposed on the first cladding layer and electrically connected to the electronic component and the plurality of bonding wires; and a second cladding layer formed between the first cladding layer and the second substrate.
[0007] This application also provides a method for manufacturing an electronic package, comprising: placing an electronic component and erecting a plurality of bonding wires on a first substrate, and electrically connecting the plurality of bonding wires to the first substrate; forming a first covering layer on the first substrate covering the electronic component and the plurality of bonding wires; disposing the first substrate on a second substrate with the first covering layer in between, and electrically connecting the electronic component and the plurality of bonding wires to the second substrate; and forming a second covering layer between the first covering layer and the second substrate.
[0008] In the aforementioned electronic package and its manufacturing method, the electronic component has a working surface and a non-working surface, and is fixed to the first substrate by a bonding layer through the non-working surface.
[0009] In the aforementioned electronic packaging components and their manufacturing methods, the bonding layer is a high-heat-dissipating epoxy resin or a chip bonding film.
[0010] In the aforementioned electronic package and its manufacturing method, the functional surface is incorporating a plurality of conductive bodies electrically connected to the second substrate.
[0011] In the aforementioned electronic package and its manufacturing method, the ends of the plurality of conductors and the ends of the plurality of bonding wires are exposed outside the first covering layer.
[0012] In the aforementioned electronic package and its manufacturing method, the first covering layer has a first surface and a second surface opposite to each other, and the second surface is disposed on the first substrate. The first surface of the first covering layer is approximately flush with the functional surface of the electronic component, and the second surface of the first covering layer is approximately flush with the non-functional surface of the electronic component.
[0013] In the aforementioned electronic package and its manufacturing method, the thickness of the electronic component is approximately the same as the thickness of the first covering layer.
[0014] In the aforementioned electronic package and its manufacturing method, the second covering layer also covers the side of the first covering layer.
[0015] In the aforementioned electronic package and its manufacturing method, the second covering layer further covers the side of the first substrate.
[0016] In the aforementioned electronic package and its manufacturing method, the second substrate is provided with a plurality of conductive elements on the other side of the first substrate.
[0017] As can be seen from the above, the electronic package of this application mainly involves placing electronic components and multiple bonding wires on a first substrate and forming a first cladding layer covering the electronic components and multiple bonding wires. Then, the first substrate is placed on a second substrate with the first cladding layer in between, and a second cladding layer is formed on the first cladding layer and the second substrate. This allows for a tighter spacing arrangement by utilizing the characteristics of bonding wires, while maximizing the thickness of the electronic components and avoiding the limitations of the existing copper metal balls due to the spacing / height of the balls. In addition, the electronic components can be bonded to the first substrate through a bonding layer with high heat dissipation to improve the heat conduction effect. Furthermore, the working surface of the electronic components is bonded to the second substrate through the second cladding layer, which can improve the overall structural strength. Attached Figure Description
[0018] Figures 1 to 5 This is a cross-sectional schematic diagram illustrating the manufacturing method of the electronic package of this application.
[0019] Explanation of reference numerals in the attached figures
[0020] 1 Electronic package
[0021] 11 First substrate
[0022] 110 First Insulation Layer
[0023] 111 First Line Layer
[0024] 112 Metal Pad
[0025] 12 Second substrate
[0026] 12a First side
[0027] 12b Second side
[0028] 120 Second Insulation Layer
[0029] 121 Second Line Layer
[0030] 13 Electronic components
[0031] 13a Surface of Action
[0032] 13b Non-operating surface
[0033] 131 Conductor
[0034] 14. Bonding wire
[0035] 15. Bonding layer
[0036] 16 First Coating Layer
[0037] 16a First Surface
[0038] 16b Second Surface
[0039] 17. Conductive Materials
[0040] 18 Second Coating Layer
[0041] 19. Conductive elements. Detailed Implementation
[0042] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.
[0043] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," and "a" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.
[0044] Please see Figures 1 to 5 This is a cross-sectional schematic diagram illustrating the manufacturing method of the electronic package of this application.
[0045] like Figure 1 As shown, a first substrate 11 is provided, and at least one electronic component 13 and a plurality of bonding wires 14 are disposed on the first substrate 11.
[0046] The first substrate 11 includes a first insulating layer 110 and a first circuit layer 111 bonded to the first insulating layer 110. The first circuit layer 111 is formed of copper, and the first insulating layer 110 is formed of dielectric materials such as polybenzoxazole (PBO), polyimide (PI), and prepreg (PP).
[0047] The electronic component 13 is, for example, an application processor chip (AP chip), which has an active surface 13a and a non-active surface 13b. The electronic component 13 is bonded to the first substrate 11 with its non-active surface 13b through a bonding layer 15. The active surface 13a is bonded with a plurality of conductors 131, and the plurality of conductors 131 are spherical, such as solder balls, or columnar, such as copper pillars, solder bumps or other metal materials, or stud conductive parts made by wire bonding machines.
[0048] The bonding layer 15, for example, is a high-heat-dissipating epoxy resin or a die-attach film (DAF), which allows the electronic component 13 to be bonded to the first substrate 11 to improve thermal conductivity. Additionally, a metal pad 112 can be provided in the first substrate 11 corresponding to the position of the electronic component 13 to further enhance heat dissipation.
[0049] The bonding wire 14 is, for example, a copper wire formed by wire bonding. It is erected on the first substrate 11 and electrically connected to the circuit layer of the first substrate 11. The characteristics of the bonding wire 14 can provide a closer spacing arrangement while allowing the thickness of the electronic component 13 to be much better than that of existing packages and avoiding the limitation of the ball spacing / ball height of the copper metal balls. That is, by the smaller spacing between the bonding wires 14, the thickness of the electronic component 13 is not limited by the need for a larger spacing of the copper metal balls.
[0050] like Figure 2 As shown, a first covering layer 16 is formed on the first substrate 11 to cover the electronic component 13 and the plurality of bonding wires 14, and the ends of the plurality of conductors 131 and the ends of the plurality of bonding wires 14 are exposed outside the first covering layer 16.
[0051] In this embodiment, the first covering layer 16 has a first surface 16a and a second surface 16b, and is disposed on the first substrate 11 with the second surface 16b. The first surface 16a of the first covering layer 16 is approximately flush with the working surface 13a of the electronic component 13, and the second surface 16b of the first covering layer 16 is approximately flush with the non-working surface 13b of the electronic component 13 (the thickness of the bonding layer 15 is extremely thin relative to the thickness of the electronic component 13, so it can be omitted). That is, the thickness of the electronic component 13 is approximately the same as the thickness of the first covering layer 16, thereby maximizing the thickness of the electronic component 13 and allowing it to be bonded to the first substrate 11 through the bonding layer 15 (high heat dissipation epoxy resin or chip bonding film) to improve the heat dissipation effect.
[0052] The first covering layer 16 is an insulating material, such as polyimide (PI), dry film, or an encapsulating material such as epoxy resin (molding compound).
[0053] like Figure 3 As shown, a second substrate 12 is provided, and a first substrate 11, which previously incorporated the electronic component 13 and the plurality of bonding wires 14, is attached to the second substrate 12.
[0054] The second substrate 12 has a first side 12a and a second side 12b opposite to each other, and includes a second insulating layer 120 and a second circuit layer 121 bonded to the second insulating layer 120. The material forming the second circuit layer 121 is copper, and the material forming the second insulating layer 120 is a dielectric material such as poly(p-diazole)benzene (PBO), polyimide (PI), or prepreg (PP).
[0055] The first substrate 11 is disposed on the first side 12a of the second substrate 12 in a flip-chip manner, spaced apart from the electronic component 13, the plurality of bonding wires 14 and the first cladding layer 16, and the ends of the plurality of conductors 131 and the plurality of bonding wires 14 exposed in the first cladding layer 16 are electrically connected to the second circuit layer 121 through a conductive material 17. The conductive material 17 is, for example, solder.
[0056] like Figure 4 As shown, a second covering layer 18 is formed between the first covering layer 16 and the second substrate 12, covering the ends of the plurality of conductors 131 and the ends of the plurality of bonding wires 14 (and conductive material 17) to obtain an electronic package 1.
[0057] The second covering layer 18 is an insulating material, such as polyimide (PI), dry film, molding compound such as epoxy resin, or primer. Its material may be the same as or different from that of the first covering layer 16.
[0058] In addition, the second covering layer 18, besides being disposed between the first covering layer 16 and the second substrate 12, can further cover the side of the first covering layer 16, or even the side of the first substrate 11. Accordingly, since the functional surface 13a (first covering layer 16) of the electronic component 13 can be bonded to the second substrate 12 using the second covering layer 18, the overall structural strength is improved.
[0059] like Figure 5 As shown, a plurality of conductive elements 19 electrically connected to the second circuit layer 121 can be subsequently implanted on the second side 12b of the second substrate 12 for the electronic package 1 to be attached to an external device. The plurality of conductive elements 19 are, for example, solder balls.
[0060] Through the aforementioned manufacturing method, this application also discloses an electronic package 1, comprising: a first substrate 11, an electronic component 13 and a plurality of bonding wires 14 disposed on the first substrate 11, a first cladding layer 16 formed on the first substrate 11 and covering the electronic component 13 and the plurality of bonding wires 14, a second substrate 12 disposed on the first cladding layer 16, and a second cladding layer 18 formed between the first cladding layer 16 and the second substrate 12.
[0061] The electronic component 13 has an active surface 13a and a non-active surface 13b. The electronic component 13 is disposed on the first substrate 11 via a bonding layer 15 with its non-active surface 13b. A plurality of conductors 131 are bonded to the active surface 13a. The bonding layer 15 is, for example, a high-heat-dissipating epoxy resin or a die-attach film (DAF).
[0062] The first covering layer 16 has a first surface 16a and a second surface 16b opposite to each other, and the first substrate 11 is bonded to the second surface 16b.
[0063] The first surface 16a of the first cladding layer 16 is approximately flush with the functional surface 13a of the electronic component 13, and the second surface 16b of the first cladding layer 16 is approximately flush with the non-functional surface 13b of the electronic component 13. That is, the thickness of the electronic component 13 is approximately the same as the thickness of the first cladding layer 16, and the ends of the plurality of conductors 131 and the ends of the plurality of bonding wires 14 are exposed outside the first cladding layer 16.
[0064] The second covering layer 18 may further cover the side of the first covering layer 16, or even the side of the first substrate 11.
[0065] In summary, the electronic package of this application mounts electronic components and multiple bonding wires on a first substrate, forming a first cladding layer covering the electronic components and bonding wires. The first substrate is then mounted on a second substrate, spaced apart from the first cladding layer. A second cladding layer is then formed on the first and second substrates. This utilizes the characteristics of bonding wires to provide a tighter spacing arrangement while maximizing the thickness of the electronic components, avoiding the limitations imposed by the spacing / height of copper metal balls used in existing designs. Furthermore, the electronic components can be bonded to the first substrate using high-heat-dissipating epoxy resin or die-attach film (DAF) to improve thermal conductivity. Additionally, the functional surfaces of the electronic components are bonded to the second substrate through the second cladding layer, enhancing the overall structural strength.
[0066] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.
Claims
1. An electronic package, characterized in that, include: First substrate; Electronic components are attached to the first substrate; Multiple bonding wires are erected on the first substrate and electrically connected to the first substrate; A first cladding layer is formed on the first substrate and covers the electronic component and the plurality of bonding wires; The second substrate is disposed on the first cladding layer and electrically connects the electronic component and the plurality of bonding wires; as well as A second covering layer is formed between the first covering layer and the second substrate.
2. The electronic package as described in claim 1, characterized in that, The electronic component has an active surface and a non-active surface, and is fixed to the first substrate by a bonding layer through the non-active surface.
3. The electronic package as described in claim 2, characterized in that, The bonding layer is a high-heat-dissipating epoxy resin or a chip bonding film.
4. The electronic package as described in claim 2, characterized in that, The working surface is combined with a plurality of conductors electrically connected to the second substrate.
5. The electronic package as described in claim 4, characterized in that, The ends of the plurality of conductors and the ends of the plurality of bonding wires are exposed outside the first cladding layer.
6. The electronic package as described in claim 2, characterized in that, The first coating layer has a first surface and a second surface opposite to each other, and is disposed on the first substrate with the second surface. The first surface of the first coating layer is approximately flush with the functional surface of the electronic component, and the second surface of the first coating layer is approximately flush with the non-functional surface of the electronic component.
7. The electronic package as claimed in claim 1, characterized in that, The thickness of the electronic component is approximately the same as the thickness of the first coating layer.
8. The electronic package as claimed in claim 1, characterized in that, The second covering layer also covers the sides of the first covering layer.
9. The electronic package as claimed in claim 8, characterized in that, The second covering layer also covers the sides of the first substrate.
10. The electronic package as claimed in claim 1, characterized in that, The second substrate is attached to the other side of the first substrate and has multiple conductive elements embedded thereon.