Lead substrate for packaging a substrate capacitor

CN224609743UActive Publication Date: 2026-08-07CHINA ZHENHUA GRP XINYUN ELECTRONICS COMP ANDDEV CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
CHINA ZHENHUA GRP XINYUN ELECTRONICS COMP ANDDEV CO LTD
Filing Date
2025-08-13
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

当前,缺少恰当的手段以满足上述的老化、测量需求,通常是在封装后便切割为单只电容器进行筛选加工,无法有效提升SMT封装结构钽电容器的生产效率

Benefits of technology

1、本实用新型为SMT封装钽电容器的批量化生产提供了重要助力。采用SMT封装钽电容器结构,使用的引出基板对钽芯子进行引出,在封装后的加工中能够极大提升生产效率。相比传统的引线框架结构,进行单次封装、老炼、老化时,仅能加工18-60只电容器,而采用SMT封装,引出基板引出的方式生产,单次能够加工100-300只电容器,极大提升了生产效率的同时,还能够降低封装成本。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224609743U_ABST
    Figure CN224609743U_ABST
Patent Text Reader

Abstract

The utility model discloses a kind of substrate of substrate packaging capacitor, including top layer and bottom layer, anode pad, cathode pad and connecting assembly are set on the top layer, the anode pad and connecting structure are connected, positive electrode lead-out point is set in top layer one side, and negative electrode lead-out point is set in other side, capacitor positive electrode, capacitor negative electrode and lead-out structure are set on the bottom layer, and the capacitor negative electrode is connected with lead-out structure.The utility model provides important help for the batch production of SMT packaging tantalum capacitor.Adopt SMT packaging tantalum capacitor structure, lead-out substrate is used to tantalum core and is led out, and in the processing after packaging, production efficiency can be greatly improved.Compared with traditional lead frame structure, single packaging, aging, aging is carried out, only 18-60 capacitors can be processed, while using SMT packaging, lead-out substrate leads out in the mode of production, 100-300 capacitors can be processed in single time, greatly improve production efficiency, and also can reduce packaging cost.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model belongs to the field of capacitor manufacturing technology, and in particular relates to a lead-out substrate for a substrate-encapsulated capacitor. Background Technology

[0002] In recent years, with the development of the electronics industry, the requirements for miniaturization and lightweighting of electronic components have become increasingly stringent. To address this demand, traditional leadframe-type tantalum chip capacitors have gradually reached their design limits. To adapt to the current needs of the electronics industry, a new type of tantalum chip capacitor packaging structure using surface mount technology (SMT) has been developed, such as... Figure 7 As shown. Through a novel packaging structure design, and... Figure 8 Compared to the lead frame structure of traditional chip tantalum capacitors, it can save 50% of the volume, greatly improving the volumetric efficiency of chip tantalum capacitors.

[0003] In the SMT packaged tantalum capacitor structure, the lead structure has changed from the traditional lead frame to a lead substrate. Traditional lead frame structures typically package capacitors and then process them as strips of 18-60 capacitors or as individual capacitors. By using a lead substrate to bring out the tantalum capacitors, a single lead substrate can accommodate 100-200 capacitors, significantly improving production efficiency. After packaging, tantalum capacitors need to undergo aging, high and low temperature measurements to screen their performance before being packaged and delivered. However, these screening processes require both simultaneous connection of all tantalum capacitors on the same lead substrate to an external power supply and the ability to extract individual tantalum capacitors for measurement. Currently, there is a lack of suitable methods to meet these aging and measurement requirements; typically, after packaging, capacitors are cut into individual units for screening, which cannot effectively improve the production efficiency of SMT packaged tantalum capacitors. Therefore, a lead substrate for SMT-manufactured tantalum capacitors is needed to solve these problems. Utility Model Content

[0004] To solve the above-mentioned technical problems, this utility model provides a lead-out substrate for a substrate-encapsulated capacitor.

[0005] This utility model is achieved through the following technical solution.

[0006] This utility model provides a lead-out substrate for a substrate-encapsulated capacitor, comprising a top layer and a bottom layer. The top layer is provided with an anode mounting pad, a negative mounting pad, and a connecting assembly. The anode mounting pad and the connecting assembly are connected. A positive lead-out point is provided on one side of the top layer, and a negative lead-out point is provided on the other side. The bottom layer is provided with a capacitor positive electrode, a capacitor negative electrode, and a lead-out structure. The capacitor negative electrode and the lead-out structure are connected. After the top layer and the bottom layer are connected, the anode mounting pad is connected to the capacitor positive electrode, and the negative mounting pad is connected to the capacitor negative electrode.

[0007] Preferably, the connection structure includes a first connecting piece and a first positive electrode lead-out piece. The anode mounting pad is connected to the first positive electrode lead-out piece through the first connecting piece. After the top layer and the bottom layer are connected, the first positive electrode lead-out piece is connected to the positive electrode lead-out point through the lead-out structure.

[0008] Preferably, the first positive electrode lead is laterally connected to several anode mounting pads.

[0009] Preferably, the lead-out structure includes a first negative lead-out piece and a second negative lead-out piece. The negative electrode of the capacitor is connected to the second negative lead-out piece through the first negative lead-out piece. After the top layer and the bottom layer are connected, the second negative lead-out piece is connected to the negative lead-out point.

[0010] Preferably, the first negative lead is longitudinally connected to the negative terminals of several capacitors.

[0011] Preferably, the lead-out structure further includes a second positive lead-out piece.

[0012] Preferably, the anode mounting pads and the negative electrode mounting pads are staggered in the horizontal or vertical direction.

[0013] Preferably, the positive and negative terminals of the capacitor are staggered in the horizontal or vertical direction.

[0014] Preferably, the connection between the anode mounting pad and the positive terminal of the capacitor, and the connection between the negative mounting pad and the negative terminal of the capacitor, includes one or both of conductive vias or metal conductive structures.

[0015] The beneficial effects of this utility model are as follows: 1. This invention provides significant assistance for the mass production of SMT-packaged tantalum capacitors. The SMT-packaged tantalum capacitor structure, using a lead-out substrate to bring out the tantalum core, greatly improves production efficiency during post-packaging processing. Compared to traditional lead frame structures, which can only process 18-60 capacitors per packaging, curing, and aging cycle, the SMT-packaged, lead-out substrate method allows for the processing of 100-300 capacitors per cycle, significantly improving production efficiency while reducing packaging costs.

[0016] 2. The positive and negative terminals of the capacitor are led out using the positive terminal horizontal lead-out and the negative terminal vertical lead-out method proposed in this utility model. When it is necessary to lead out all capacitors on the lead-out board, all the positive and negative terminal lead-out points are connected; when a single lead-out point is connected, a single core can be led out at the intersection of the positive and negative terminal lead-out points. This method meets the actual needs of different processes, achieving both the simultaneous leading out of all capacitors on the same lead-out board and the leading out of a single core. Through the circuit design of the lead-out board, the capacitors can be directly led out as a whole board after packaging, while also allowing for individual lead-out screening. After the screening parameters are qualified, the capacitors are then cut, packaged, and delivered. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of Embodiment 1 of this utility model; Figure 2 This is a schematic diagram of the top layer structure of Embodiment 1 of this utility model; Figure 3 This is a schematic diagram of the bottom layer structure of Embodiment 1 of this utility model; Figure 4 This is a structural schematic diagram of Embodiment 2 of the present invention; Figure 5 This is a schematic diagram of the top layer structure of Embodiment 2 of this utility model; Figure 6 This is a schematic diagram of the bottom layer structure of Embodiment 2 of this utility model; Figure 7 This is a schematic diagram of an SMT packaged tantalum capacitor. Figure 8 This is a schematic diagram of a traditional leadframe packaging structure; In the diagram: 1-Anode mounting pad, 2-Negative mounting pad, 3-First connecting piece, 4-First positive lead, 5-Positive lead point, 6-Negative lead point, 7-Capacitor positive terminal, 8-Capacitor negative terminal, 9-First negative lead, 10-Second negative lead, 11-Second positive lead, 12-Intersection. Detailed Implementation

[0018] The technical solution of this utility model is further described below, but the scope of protection is not limited to what is described.

[0019] Example 1: like Figures 1 to 3As shown, a lead-out substrate for a substrate-encapsulated capacitor includes a top layer and a bottom layer. The top layer is provided with an anode mounting pad 1, a negative mounting pad 2, and a connecting assembly. A capacitor can be disposed in the gap between the anode mounting pad 1 and the negative mounting pad 2. The anode mounting pad 1 is connected to the connecting structure. A positive lead-out point 5 is provided on one side of the top layer, and a negative lead-out point 6 is provided on the other side. The bottom layer is provided with a capacitor positive electrode 7, a capacitor negative electrode 8, and a lead-out structure. The capacitor negative electrode 8 is connected to the lead-out structure. After the top layer and the bottom layer are connected, the anode mounting pad 1 is connected to the capacitor positive electrode 7, and the negative mounting pad 2 is connected to the capacitor negative electrode 8.

[0020] Anode mounting pad 1 and negative mounting pad 2 are arranged vertically on the top layer in several ways; capacitor positive electrode 7 and capacitor negative electrode 8 are arranged vertically on the bottom layer in several ways. The connection between anode mounting pad 1 and capacitor positive electrode 7, and the connection between negative mounting pad 2 and capacitor negative electrode 8 can be made by through-hole or electroplating, etc.

[0021] The top layer is the mounting layer for the tantalum core, and the bottom layer is the electrode lead-out layer for the tantalum core. The lead-out substrate can be fabricated based on printed circuit boards, etched copper sheets, electroplated copper plates, etc. It can be used for lead-out of tantalum capacitors, aluminum capacitors, and other capacitors.

[0022] The connection structure includes a first connecting piece 3 and a first positive lead piece 4. The anode mounting pad 1 is connected to the first positive lead piece 4 through the first connecting piece 3. After the top and bottom layers are connected, the first positive lead piece 4 is connected to the positive lead point 5 through the lead-out structure.

[0023] The first positive electrode lead 4 is laterally connected to several anode mounting pads 1.

[0024] The lead-out structure includes a first negative lead-out piece 9 and a second negative lead-out piece 10. The negative electrode 8 of the capacitor is connected to the second negative lead-out piece 10 through the first negative lead-out piece 9. After the top layer and the bottom layer are connected, the second negative lead-out piece 10 is connected to the negative lead-out point 6 through one or both of the following: a conductive through hole or an integrated metal structure.

[0025] The first connecting piece 3, the first positive lead piece 4, the first negative lead piece 9, and the second negative lead piece 10 are all copper sheets.

[0026] The first negative lead plate 9 is longitudinally connected to several negative capacitors 8, and the negative terminals of each column of capacitors are uniformly led out to the negative lead point 6.

[0027] When measuring a single capacitor in the capacitor array of the lead-out substrate, the capacitor to be measured is located at the intersection 12 of the positive lead-out point 5 and the negative lead-out point 6, which are numbered differently, and then the capacitor is led out one by one. For example... Figure 1As shown in the rectangular frame, the area at the intersection 12 is the region surrounded by the anode mount pad 1 and the adjacent negative mount pad 2 in the lateral direction.

[0028] The lead-out structure also includes a second positive lead-out piece 11. The first positive lead-out piece 4 is connected to the positive lead-out point 5 through the second positive lead-out piece 11 via a through hole or electroplating, thereby realizing the positive lead-out of the capacitor.

[0029] The anode mounting pad 1 and the negative electrode mounting pad 2 are staggered in the lateral direction.

[0030] The positive electrode 7 and the negative electrode 8 of the capacitor are staggered in the lateral direction.

[0031] The connection between the anode mounting pad 1 and the positive electrode 7 of the capacitor, and the connection between the negative electrode mounting pad 2 and the negative electrode 8 of the capacitor, can be achieved by one or both of the following methods depending on the actual situation: conductive via or integrated metal structure.

[0032] Example 2 like Figures 4 to 6 As shown, a lead-out substrate for a substrate-encapsulated capacitor, based on Embodiment 1, includes a top layer and a bottom layer; the difference is that the anode mounting pad 1 and the negative electrode mounting pad 2 are staggered in the longitudinal direction.

[0033] The positive terminal 7 and the negative terminal 8 of the capacitor are staggered in the longitudinal direction.

Claims

1. A lead-out substrate for a substrate-encapsulated capacitor, characterized in that: The device includes a top layer and a bottom layer. The top layer is provided with an anode mounting pad (1), a negative mounting pad (2) and a connecting assembly. The anode mounting pad (1) and the connecting structure are connected. A positive lead-out point (5) is provided on one side of the top layer and a negative lead-out point (6) is provided on the other side. The bottom layer is provided with a capacitor positive electrode (7), a capacitor negative electrode (8) and a lead-out structure. The capacitor negative electrode (8) and the lead-out structure are connected. After the top layer and the bottom layer are connected, the anode mounting pad (1) is connected to the capacitor positive electrode (7) and the negative mounting pad (2) is connected to the capacitor negative electrode (8).

2. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 1, characterized in that: The connection structure includes a first connecting piece (3) and a first positive lead piece (4). The anode mounting pad (1) is connected to the first positive lead piece (4) through the first connecting piece (3). After the top layer and the bottom layer are connected, the first positive lead piece (4) is connected to the positive lead point (5) through the lead-out structure.

3. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 2, characterized in that: The first positive lead (4) is laterally connected to several anode mounting pads (1).

4. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 1, characterized in that: The lead-out structure includes a first negative lead-out piece (9) and a second negative lead-out piece (10). The negative electrode (8) of the capacitor is connected to the second negative lead-out piece (10) through the first negative lead-out piece (9). After the top layer and the bottom layer are connected, the second negative lead-out piece (10) is connected to the negative lead-out point (6).

5. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 4, characterized in that: The first negative lead-out piece (9) is longitudinally connected to several capacitor negative terminals (8).

6. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 1, characterized in that: The lead-out structure also includes a second positive lead-out piece (11).

7. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 1, characterized in that: The anode mounting pads (1) and the negative electrode mounting pads (2) are staggered in the horizontal or vertical direction.

8. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 1, characterized in that: The positive electrode (7) and negative electrode (8) of the capacitor are arranged alternately in the horizontal or vertical direction.

9. The lead-out substrate of a substrate-encapsulated capacitor as described in claim 1, characterized in that: The connection between the anode mounting pad (1) and the positive electrode (7) of the capacitor, and the connection between the negative electrode mounting pad (2) and the negative electrode (8) of the capacitor, includes one or both of conductive vias or conductive structures.