A dual MCU mutual reset control circuit

Abstract

This utility model relates to the field of reset control circuits, and in particular to a dual MCU mutual reset control circuit. A dual MCU mutual reset control circuit includes a main MCU chip and a secondary MCU chip, and further includes a first reset unit and a second reset unit. The first reset unit includes a first resistor, a first diode, and a first capacitor. The power supply voltage is connected to one end of the first resistor and the negative terminal of the first diode; the other end of the first resistor is connected to the positive terminal of the first diode, one end of the first capacitor, and the RESET pin of the secondary MCU chip; the other end of the first capacitor is grounded. The first GPIO pin of the main MCU chip is connected to the RESET pin of the secondary MCU chip through a first control path. The advantages of this utility model are: it realizes heartbeat signal detection and reset trigger feedback control between the main MCU chip U2 and the secondary MCU chip U1.

Description

Technical Field

[0001] This utility model relates to the field of reset control circuits, and in particular to a dual MCU mutual reset control circuit. Background Technology

[0002] The current dual-MCU control circuit adopts an independent reset design. The reset circuits of the main MCU and the secondary MCU are physically isolated and cannot control each other to reset. The dual-MCU architecture is used to realize data mutual detection. The reset circuit is completely independent. When a fault occurs, an external watchdog is required to trigger the reset. The drawback is that the watchdog cannot distinguish the specific faulty MCU, which causes both chips to reset at the same time. However, when the program of one MCU runs away or crashes, the other cannot actively reset the faulty one. The whole system enters a fault-locked state and requires manual intervention to restart. The reset signal path is unidirectional (only power supply → MCU) and lacks a cross link for reset signals between MCUs. Summary of the Invention

[0003] To solve the aforementioned technical problem of requiring manual intervention to restart, this utility model provides a dual MCU mutual reset control circuit.

[0004] The technical solution of this utility model is as follows: A dual MCU mutual reset control circuit includes a main MCU chip and a secondary MCU chip, and also includes a first reset unit and a second reset unit; The first reset unit includes a first resistor, a first diode, and a first capacitor; the power supply voltage is connected to one end of the first resistor and the negative terminal of the first diode, the other end of the first resistor is connected to the positive terminal of the first diode, one end of the first capacitor and the RESET pin of the secondary MCU chip, and the other end of the first capacitor is grounded; the first GPIO pin of the main MCU chip is connected to the RESET pin of the secondary MCU chip through a first control path; The second reset unit includes a second resistor, a third diode, and a second capacitor; the power supply voltage is connected to one end of the second resistor and the negative terminal of the third diode, the other end of the second resistor is connected to the positive terminal of the third diode, one end of the second capacitor, and the RESET pin of the main MCU chip, and the other end of the second capacitor is grounded; the second GPIO pin of the secondary MCU chip is connected to the RESET pin of the main MCU chip through a second control path; The main MCU chip is configured to reset the secondary MCU chip by controlling its first GPIO pin to output a low level, thereby pulling the RESET pin low via the first control path. The secondary MCU chip is configured to reset the main MCU chip by controlling its second GPIO pin to output a low level, thereby pulling the RESET pin low via the second control path. The first control path includes a second diode and a third resistor; the first GPIO pin of the main MCU chip is connected to the negative terminal of the second diode, the positive terminal of the second diode is connected to the RESET pin of the secondary MCU chip, and the third resistor is connected between the positive terminal of the second diode and the power supply voltage. The second control path includes a fourth diode and a fourth resistor; the second GPIO pin of the secondary MCU chip is connected to the negative terminal of the fourth diode, the positive terminal of the fourth diode is connected to the RESET pin of the main MCU chip, and the fourth resistor is connected between the positive terminal of the fourth diode and the power supply voltage.

[0005] The technical solution of this utility model has a novel structure, ingenious and simple design, and achieves precise reset, realizing the heartbeat signal detection and reset trigger feedback control between the main MCU chip U2 and the secondary MCU chip U1. Attached Figure Description

[0006] Figure 1 This is a schematic diagram of the circuit structure of this utility model; Figure 2 This is a schematic diagram of the signal detection structure of this utility model. Detailed Implementation

[0007] The present invention will be further described below with reference to the accompanying drawings and embodiments. Example

[0008] like Figure 1 , 2 The dual MCU mutual reset control circuit shown includes a main MCU chip U2 and a secondary MCU chip U1, and also includes a first reset unit and a second reset unit. The first reset unit includes a first resistor R1, a first diode D1, and a first capacitor C1; the power supply voltage is connected to one end of the first resistor R1 and the cathode of the first diode D1, the other end of the first resistor R1 is connected to the anode of the first diode D1, one end of the first capacitor C1 and the RESET pin of the secondary MCU chip U1, and the other end of the first capacitor C1 is grounded; the first GPIO pin of the main MCU chip U2 is connected to the RESET pin of the secondary MCU chip U1 through a first control path; The second reset unit includes a second resistor R2, a third diode D3, and a second capacitor C2; the power supply voltage is connected to one end of the second resistor R2 and the negative terminal of the third diode D3, the other end of the second resistor R2 is connected to the positive terminal of the third diode D3, one end of the second capacitor C2 and the RESET pin of the main MCU chip U2, and the other end of the second capacitor C2 is grounded; the second GPIO pin of the secondary MCU chip U1 is connected to the RESET pin of the main MCU chip U2 through a second control path; The main MCU chip U2 is configured to control its first GPIO pin to output a low level, thereby pulling down the RESET pin of the secondary MCU chip U1 to reset it via the first control path. The secondary MCU chip U1 is configured to control its second GPIO pin to output a low level, thereby pulling down the RESET pin of the main MCU chip U2 to reset it via the second control path. The first control path includes a second diode D2 and a third resistor R3; the first GPIO pin of the main MCU chip U2 is connected to the cathode of the second diode D2, the anode of the second diode D2 is connected to the RESET pin of the secondary MCU chip U1, and the third resistor R3 is connected between the anode of the second diode D2 and the power supply voltage. The second control path includes a fourth diode D4 and a fourth resistor R4; the second GPIO pin of the secondary MCU chip U1 is connected to the cathode of the fourth diode D4, the anode of the fourth diode D4 is connected to the RESET pin of the main MCU chip U2, and the fourth resistor R4 is connected between the anode of the fourth diode D4 and the power supply voltage.

[0009] A dual-MCU mutual reset control circuit includes a secondary MCU chip U1 and a primary MCU chip U2. A +5V power supply is connected to one end of a first resistor R1 and the cathode of a first diode D1. The other end of the first resistor R1 is connected to the anode of the first diode D1. One end of a first capacitor C1 is connected to the RESET pin of the secondary MCU chip U1. The other end of the first capacitor C1 is connected to GND. The first resistor R1 and the first diode D1 are connected in parallel, and then connected in series with the first capacitor C1 to form an RC charging circuit. The GPIO pin P40 of the primary MCU chip U2 is connected to the cathode of a second diode D2 and one end of a third resistor R3. The anode of the second diode D2 is connected to the RESET pin of the secondary MCU chip U1. The other end of the third resistor R3 is connected to the +5V power supply. ，The main MCU chip U2 triggers a reset signal to reset the secondary MCU chip U1 by controlling its P40 pin to output a low level. The +5V power supply is connected to one end of the second resistor R2 and the cathode of the third diode D3. The other end of the second resistor R2 is connected to the anode of the third diode D3, one end of the second capacitor C2, and the RESET pin of the main MCU chip U2. The other end of the second capacitor C2 is connected to GND. The second resistor R2 and the third diode D3 are connected in parallel, and then in series with the second capacitor C2, forming an RC charging circuit. The GPIO pin P40 of the secondary MCU chip U1 is connected to the cathode of the fourth diode D4 and one end of the fourth resistor R4. The anode of the fourth diode D4 is connected to the RESET pin of the main MCU chip U2. The other end of the fourth resistor R4 is connected to the +5V power supply. The secondary MCU chip U1 triggers a reset signal to reset the main MCU chip U2 by controlling its P40 pin to output a low level.

[0010] A method for a dual MCU mutual reset control circuit, comprising the following steps: Heartbeat signal transmission steps: The main MCU chip U2 and the secondary MCU chip U1 transmit heartbeat signals to each other at a predetermined frequency; Heartbeat signal detection steps: The main MCU chip U2 detects whether it receives a heartbeat signal from the secondary MCU chip U1, and the secondary MCU chip U1 detects whether it receives a heartbeat signal from the main MCU chip U2; Reset judgment steps: If one MCU chip does not receive a heartbeat signal from the other MCU chip within a predetermined timeout period, it is determined that the other MCU chip is faulty; Reset execution steps: The MCU chip that determines the other MCU chip is faulty outputs a low-level reset pulse through its GPIO pin to reset the faulty MCU chip. The width of the low-level reset pulse is greater than the natural reset time of the RC charging circuit.

[0011] In use, the main MCU chip U2 performs core control tasks, while the secondary MCU chip U1 performs auxiliary control tasks. Diodes D1, D2, D3, and D4 are unidirectional signal conductions. Diode D1 quickly releases the charge from capacitor C1 upon power-up. Diode D2 isolates the U2_P40 signal to prevent reverse voltage flow at the reset terminal. Diodes D3 and D4 are similar, corresponding to the main MCU U2 channel. Resistor R1 limits the charging current of capacitor C1, determining the reset duration in conjunction with C1. Resistor R3 is the pull-up resistor for the U2_P40 port (default 10kΩ). Signal flow: Secondary chip power-up reset signal path: +5V → R1 / / D1 → C1 → GND → U1_RESET; At the moment of system power-on, the +5V power supply begins charging the first capacitor C1 through the first resistor R1. Since the voltage across the capacitor cannot change abruptly, at the moment of power-on, the RESET pin potential of the secondary MCU chip U1 is approximately 0V (low level). As charging progresses, the voltage across the first capacitor C1 slowly rises, and the voltage on the RESET pin gradually increases from 0V to +5V (high level). This slowly rising voltage signal provides the secondary MCU chip U1 with a reliable low-level reset pulse lasting for several hundred milliseconds, ensuring that the secondary MCU chip completes initialization after power-on stabilization. External reset signal path for the secondary chip: U2_P40 → D2 (negative) → D2 (positive) → U1_RESET; The P40 pin of the main MCU chip U2 is set to high-level output or high-impedance state. Due to the pull-up resistor R3, the RESET pin of the secondary MCU chip U1 is pulled high, and the system operates normally. Reset trigger: When the secondary MCU chip U1 needs to be reset, the main MCU chip U2 configures the P40 pin to output mode and continuously outputs a low-level signal for at least 100ms. This low-level signal is transmitted to the RESET pin of the secondary MCU chip U1 through the second diode D2 (forward conduction), pulling it low and triggering the reset sequence of the secondary MCU chip U1. The second diode D2 acts as isolation to prevent the reset signal of the secondary MCU chip U1 from affecting the P40 port of the main MCU chip U2 in reverse. Main chip power-on reset signal path: +5V → R2 / / D3 → C2 → GND → U2_RESET; At the moment of system power-on, the +5V power supply begins to charge the second capacitor C2 through the second resistor R2. Since the voltage across the capacitor cannot change abruptly, at the moment of power-on, the potential of the RESET pin of the main MCU chip U2 is approximately 0V (low level). As charging proceeds, the voltage across the second capacitor C2 slowly rises, and the voltage of the RESET pin gradually increases from 0V to +5V (high level). This slowly rising voltage signal provides the main MCU chip U2 with a reliable low-level reset pulse that lasts for hundreds of milliseconds, ensuring that the main MCU completes initialization after power-on stabilization.External reset signal path for the main chip: U1_P40 → D4 (negative) → D4 (positive) → U2_RESET; Working principle: In normal operation (no reset), the P40 pin of the secondary MCU chip U1 is set to a high-level output or high-impedance state. Due to the pull-up resistor R4, the RESET pin of the main MCU chip U2 is pulled high, and the system works normally. Reset trigger: When the secondary MCU needs to be reset, the secondary MCU configures the P40 pin to output mode and continuously outputs a low-level signal for at least 100ms. This low-level signal is transmitted to the RESET pin of the main MCU chip U2 through the fourth diode D4 (forward conduction), pulling it low and thus triggering the reset of the main MCU. In the sequence, the fourth diode D4 acts as an isolation element, preventing the main MCU's reset signal from affecting the P40 port of the secondary MCU in reverse. Electrical isolation: the second diode D2 and the fourth diode D4 enable unidirectional signal transmission, preventing reverse voltage from damaging the I / O port. Optimal parameters: Reset capacitors C1 and C2: 10μF electrolytic capacitors (reset delay ≈ 100ms); Diodes D1, D2, D3, and D4: IN4148 (reverse withstand voltage 100V); Resistors R1 and R2: 10kΩ (reset current limiting).

[0012] Comparison table of innovation points: Reset control direction Power Supply Only → MCU Power supply → MCU + MCU ↔ MCU Fault response methods System-level reset Precise fault MCU reset System crash recovery time >1 second (watchdog cycle) <100ms (direct reset) Additional costs Dedicated watchdog chip (¥2+) 4 diodes (¥0.3)

Claims

1. A dual MCU mutual reset control circuit, comprising a main MCU chip (U2) and a secondary MCU chip (U1), characterized in that: It also includes a first reset unit and a second reset unit; The first reset unit includes a first resistor (R1), a first diode (D1), and a first capacitor (C1); the power supply voltage is connected to one end of the first resistor (R1) and the negative terminal of the first diode (D1), the other end of the first resistor (R1) is connected to the positive terminal of the first diode (D1), one end of the first capacitor (C1) and the RESET pin of the secondary MCU chip (U1), and the other end of the first capacitor (C1) is grounded; the first GPIO pin of the main MCU chip (U2) is connected to the RESET pin of the secondary MCU chip (U1) through a first control path; The second reset unit includes a second resistor (R2), a third diode (D3), and a second capacitor (C2); the power supply voltage is connected to one end of the second resistor (R2) and the negative terminal of the third diode (D3), the other end of the second resistor (R2) is connected to the positive terminal of the third diode (D3), one end of the second capacitor (C2) and the RESET pin of the main MCU chip (U2), and the other end of the second capacitor (C2) is grounded; the second GPIO pin of the secondary MCU chip (U1) is connected to the RESET pin of the main MCU chip (U2) through a second control path; The main MCU chip (U2) is configured to control its first GPIO pin to output a low level, thereby pulling the RESET pin of the secondary MCU chip (U1) low via the first control path to reset it; the secondary MCU chip (U1) is configured to control its second GPIO pin to output a low level, thereby pulling the RESET pin of the main MCU chip (U2) low via the second control path to reset it.

2. The dual MCU mutual reset control circuit as described in claim 1, characterized in that, The first control path includes a second diode (D2) and a third resistor (R3); the first GPIO pin of the main MCU chip (U2) is connected to the negative terminal of the second diode (D2), the positive terminal of the second diode (D2) is connected to the RESET pin of the secondary MCU chip (U1), and the third resistor (R3) is connected between the positive terminal of the second diode (D2) and the power supply voltage.

3. The dual MCU mutual reset control circuit as described in claim 1 or 2, characterized in that, The second control path includes a fourth diode (D4) and a fourth resistor (R4); the second GPIO pin of the secondary MCU chip (U1) is connected to the negative terminal of the fourth diode (D4), the positive terminal of the fourth diode (D4) is connected to the RESET pin of the main MCU chip (U2), and the fourth resistor (R4) is connected between the positive terminal of the fourth diode (D4) and the power supply voltage.

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