Switching power converter circuit

Abstract

The utility model discloses a switching power converter circuit, containing a power stage circuit, for converting an input voltage into an output voltage according to a control signal, a control circuit, receiving a first ramp signal and a reference voltage from a first input end, and receiving a second ramp signal and the output voltage from a second input end, for comparing the signal of the first input end with the signal of the second input end to generate the control signal, thereby controlling the power stage circuit, a double ramp signal generating circuit, for generating the first ramp signal according to a first voltage and the working period of the control signal, and for generating the second ramp signal according to a second voltage and the working period of the control signal, wherein the first voltage and the second voltage are selected from the input voltage and the output voltage.

Description

Technical Field

[0001] This utility model relates to a switching power converter circuit, and more particularly to a switching power converter circuit that can improve system stability and optimize load transient response performance. Background Technology

[0002] Switching power converters are widely used in various electronic devices, such as mobile devices, computer systems, and consumer electronics, to convert input voltage into a stable output voltage to power the load circuit. Generally, a switching power converter includes a power stage circuit and a control circuit, which regulates the on and off states of switching elements through control signals to achieve efficient voltage conversion.

[0003] However, in practical applications, existing switching power converters often suffer from unstable Q-factors (quality factors) due to the design of their control loops. This can lead to system oscillations, especially under load changes or input voltage fluctuations, which in turn affect the stability of the output voltage. Such oscillations not only reduce system reliability but can also cause overheating or damage to circuit components, limiting the application range of the power converter.

[0004] Furthermore, when the load current changes rapidly, such as switching from a low load to a high load, existing designs cannot quickly adjust the output voltage, resulting in poor load transient performance. This can easily lead to overshoot or undershoot in the output voltage, affecting the normal operation of the load circuit. This problem is particularly pronounced in applications requiring high-precision power supplies, such as high-performance processors or sensitive analog circuits.

[0005] Furthermore, existing technologies typically lack sufficient noise immunity. In high-frequency operation or complex electromagnetic environments, switching power converters are susceptible to external noise interference or high-frequency noise generated by internal switching, which can affect the stability of the output voltage and the overall performance of the system. These noise problems can lead to circuit malfunctions, especially in high-precision or low-power applications.

[0006] Therefore, the industry urgently needs an improved switching power converter that can overcome Q-value instability and oscillation problems, improve load transient response performance, and enhance noise suppression capabilities to meet the needs of modern electronic devices for efficient and stable power supply. Utility Model Content

[0007] Therefore, the main objective of this invention is to provide a switching power converter circuit to overcome the shortcomings of the prior art.

[0008] An embodiment of this utility model provides a switching power converter circuit, comprising an input terminal for receiving an input voltage; an output terminal for outputting an output voltage; a power stage circuit coupled to the input terminal and the output terminal for converting the input voltage into the output voltage according to a control signal; a control circuit coupled to the power stage circuit, receiving a first ramp signal and a reference voltage at a first input terminal, and receiving a second ramp signal and the output voltage at a second input terminal, for comparing the signal at the first input terminal with the signal at the second input terminal to generate the control signal, thereby controlling the power stage circuit; and a dual ramp signal generation circuit coupled to the first input terminal and the second input terminal for generating the first ramp signal according to a first voltage and a working cycle of the control signal, and for generating the second ramp signal according to a second voltage and the working cycle of the control signal; wherein the first voltage is selected from one of the input voltage and the output voltage, and the second voltage is the other of the input voltage and the output voltage that is not selected as the first voltage.

[0009] In one embodiment of this utility model, the dual-ramp signal generation circuit includes a first ramp signal generation circuit and a second ramp signal generation circuit; wherein, the first ramp signal generation circuit includes: a first current generation circuit for generating a first current according to the first voltage; a first switch coupled between the first current generation circuit and the first input terminal of the control circuit, for switching the connection between the first current generation circuit and the first input terminal of the control circuit according to the working cycle of the control signal; and a first capacitor coupled between a node and the first input terminal of the control circuit; wherein, the second ramp signal generation circuit includes: a second current generation circuit. The circuit comprises: a first current generating circuit, used to generate a second current based on the second voltage; a second switch, coupled between the second current generating circuit and the second input terminal of the control circuit, used to switch the connection between the second current generating circuit and the second input terminal of the control circuit according to the working cycle of the control signal; and a second capacitor, coupled between the node and the second input terminal of the control circuit; wherein the first current generating circuit is composed of one selected from a current source and a resistor, and the second current generating circuit is composed of the other of the current source and the resistor that is not selected to generate the first current; wherein the node is coupled to one of the output voltage, the reference voltage, or a ground voltage.

[0010] In one embodiment of this utility model, the current source is an active current source, which converts the first voltage into the first current or the second voltage into the second current according to a coefficient, and the resistance value of the resistor is related to the coefficient.

[0011] In one embodiment of the present invention, when the first voltage is the output voltage, the first current generating circuit generates the first current based on a weighted result of the first voltage; and when the second voltage is the output voltage, the second current generating circuit generates the second current based on a weighted result of the second voltage.

[0012] In one embodiment of this utility model, the node is coupled to the output voltage and is used to respond to the change of the output voltage to the control circuit, so as to improve the load transient response speed.

[0013] In one embodiment of the present invention, the dual-ramp signal generator further includes a level adjustment module coupled to the output terminal, the reference voltage, and the second input terminal of the control circuit, for adjusting the level of the second ramp signal.

[0014] In one embodiment of the present invention, the level adjustment module includes: an error amplifier coupled to the output terminal, the reference voltage and the second input terminal of the control circuit, used to compare the output voltage with the reference voltage to generate an error signal, and output the error signal to the second input terminal of the control circuit.

[0015] In one embodiment of the present invention, the level adjustment module includes: an error amplifier coupled to the output terminal and the reference voltage, used to compare the output voltage with the reference voltage to generate an error signal; and an active current source coupled to the error amplifier and the second input terminal of the control circuit, used to generate an error current according to the error signal and output the error signal to the second input terminal of the control circuit.

[0016] In one embodiment of the present invention, the combination of the signal at the first input terminal and the signal at the second input terminal is related to a weighted result of the output voltage and the combination of the input voltage.

[0017] In one embodiment of the present invention, the circuit further includes: a first resistor coupled between the reference voltage and the first input terminal of the control circuit, for transmitting the reference voltage to the first input terminal; and a second resistor coupled between the output terminal and the second input terminal of the control circuit, for transmitting the output voltage to the second input terminal. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of a switching power converter circuit according to an embodiment of the present invention.

[0019] Figure 2 This is a schematic diagram of a switching power converter circuit according to an embodiment of the present invention.

[0020] Figure 3A and Figure 3B This is a schematic diagram of the current generating circuit according to an embodiment of the present invention.

[0021] Figure 4 This is a schematic diagram of a switching power converter circuit according to an embodiment of the present invention.

[0022] Figure 5 This is a schematic diagram of a switching power converter circuit according to an embodiment of the present invention.

[0023] Figure 6 and Figure 7 for Figure 5 The simulated waveform diagram of the switching power converter circuit.

[0024] Figure 8 This is a schematic diagram of a control flow according to an embodiment of the present utility model.

[0025] Figure Label Explanation: 10 - Switching power converter circuit; 100 - Input terminal; 102 - Output terminal; 12 - Power stage circuit; 14 - Control circuit; 16 - Dual ramp signal generation circuit; VIN - Input voltage; VOUT - Output voltage; CTRL - Control signal; T1 - First input terminal; RMP1 - First ramp signal; VREF - Reference voltage; T2 - Second input terminal; RMP2 - Second ramp signal; RMP3 - Third ramp signal; RMP4 - Fourth ramp signal; V1 - First voltage; V2 - Second voltage; D - Operating cycle; 20 - Switching power converter circuit; HS - High-side switch; LS - Low-side switch; L - Inductor; COUT - Output capacitor; NSW - Switching node; GND - Ground; RL - Equivalent resistance; S_D - Switching signal; S_DB - Switching signal; 202 - Comparator circuit; 204 - On-time generation circuit; 206 - Switching signal generation circuit. Generator; COMP - Comparison Result; 21 - First Ramp Signal Generation Circuit; 22 - Second Ramp Signal Generation Circuit; 210 - First Current Generation Circuit; 212 - First Switch; 214 - First Capacitor; 216 - Node; I1 - First Current; 220 - Second Current Generation Circuit; 222 - Second Switch; 224 - Second Capacitor; I2 - Second Current; 30 - Current Generation Circuit; 32 - Current Generation Circuit; CS - Current Source; Vx - Voltage; Ix - Current; R - Resistor; Vy - Voltage; Iy - Current; 40 - Switching Power Converter Circuit; 400 - Level Adjustment Module; EA - Error Amplifier; VEA - Error Signal; CS_EA - Active Current Source; IEA - Error Current; R1 - First Resistor; R2 - Second Resistor; 50 - Switching Power Converter Circuit; 600, 602, 700, 702 - Curves; 80 - Control Flow; 800~812 - Steps. Detailed Implementation

[0026] To overcome the problems of unstable Q value and oscillation, insufficient load transient response performance and poor noise suppression in the existing technology, this utility model adopts a dual ramp signal generation architecture, which provides two ramp signals to different input terminals of the control circuit, and uses the working cycle of the control signal to adjust the generation of ramp signals, so as to improve system stability, load transient response speed and noise immunity.

[0027] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a switching power converter circuit 10 according to an embodiment of the present invention. The switching power converter circuit 10 includes an input terminal 100, an output terminal 102, a power stage circuit 12, a control circuit 14, and a dual-ramp signal generation circuit 16. The input terminal 100 receives an input voltage VIN, such as a DC voltage from a battery or power supply, while the output terminal 102 outputs an output voltage VOUT to supply power to a load circuit. The power stage circuit 12 is coupled between the input terminal 100 and the output terminal 102, and can convert the input voltage VIN into the output voltage VOUT according to a control signal CTRL. It can be a buck, boost, or buck-boost power converter. The control circuit 14 is coupled to the power stage circuit 12, and receives a first ramp signal RMP1 and a reference voltage VREF through a first input terminal T1, and receives a second ramp signal RMP2 and the output voltage VOUT through a second input terminal T2. The control circuit 14 compares a third ramp signal RMP3 (i.e., a combination of the first ramp signal RMP1 and the reference voltage VREF) at the first input terminal T1 with a fourth ramp signal RMP4 (i.e., a combination of the second ramp signal RMP2 and the output voltage VOUT) at the second input terminal T2, thereby generating a control signal CTRL to control the switching operation of the power supply stage circuit 12. A dual-ramp signal generation circuit 16 is coupled to the input terminal 100, the output terminal 102, and the first input terminal T1 and the second input terminal T2 of the control circuit 14. It generates the first ramp signal RMP1 based on a first voltage V1 and the operating period D of the control signal CTRL, and generates the second ramp signal RMP2 based on a second voltage V2 and the operating period D of the control signal CTRL. The first voltage V1 can be either the input voltage VIN or the output voltage VOUT, while the second voltage V2 is the other of the input voltage VIN and the output voltage VOUT that is not selected as the first voltage V1.

[0028] In other words, the first voltage V1 and the second voltage V2 are interchangeable voltage configurations. Besides providing design flexibility, this configuration also improves the system's noise suppression capability by introducing components of the input voltage VIN and the output voltage VOUT to different input terminals (first input terminal T1 and second input terminal T2) of the control circuit 14, allowing the high-frequency noise of the third ramp signal RMP3 and the fourth ramp signal RMP4 to cancel each other out. Furthermore, for different applications, the weighting ratios of the output voltage VOUT and the input voltage VIN relative to the first voltage V1 or the second voltage V2 can be appropriately adjusted. For example, the weighting of the input voltage VIN can be set to m, and the weighting of the output voltage VOUT can be n. That is, one of the first voltage V1 and the second voltage V2 can be m times the input voltage VIN, and the other can be n times the output voltage VOUT. In this way, the combination of the third ramp signal RMP3 and the fourth ramp signal RMP4 will be related to the combination of the m-fold weighted result of the input voltage VIN and the n-fold weighted result of the output voltage VOUT. This can further reflect the specific dynamic changes of the input voltage VIN and the output voltage VOUT, and improve the adaptability of the control loop.

[0029] In short, the switching power converter circuit 10 distributes the components of the input voltage VIN and output voltage VOUT at different input terminals of the control circuit 14, and regulates them according to the duty cycle D. The control circuit 14 then generates a control signal CTRL to control the switching operation of the power stage circuit 12. This architecture not only stabilizes the Q value of the control loop and reduces oscillations, but also achieves mutual cancellation of high-frequency noise through the split input design, thereby improving system stability and noise immunity.

[0030] It should be noted that, Figure 1 The functional block diagram shown is a general embodiment of this utility model, intended to illustrate the core architecture and operating principle of the switching power converter circuit 10. Those skilled in the art should appropriately design or adjust its circuit architecture according to system requirements, application areas, etc. For example, please refer to... Figure 2 , Figure 2This is a schematic diagram of a switching power converter circuit 20 according to an embodiment of the present invention. The switching power converter circuit 20 is derived from the switching power converter circuit 10 and can also be regarded as an implementation of the switching power converter circuit 10. Therefore, the same symbols are used to represent the same circuits or signals. Specifically, in the switching power converter circuit 20, the power stage circuit 12 includes a high-side switch HS, a low-side switch LS, an inductor L, and an output capacitor COUT. The high-side switch HS is coupled between the input terminal 100 and a switching node NSW, the low-side switch LS is coupled between the switching node NSW and a ground terminal GND, the inductor L is coupled between the switching node NSW and the output terminal 102, and the output capacitor COUT is coupled between the output terminal 102 and the ground terminal GND. The operating principle of the power supply stage circuit 12 is well known in the art. In short, the high-side switch HS and the low-side switch LS are used to switch the coupling path between the inductor L and the input voltage VIN or ground GND. Energy is accumulated or released through the inductor L, and then converted into an appropriate output voltage VOUT, which is supplied to the load circuit (e.g., ...). Figure 2 The equivalent resistance RL is shown. Furthermore, in this architecture, it should be ensured that at any given time, only one switch between the high-side switch HS and the low-side switch LS can be turned on, to avoid a shoot-through phenomenon caused by both switches being turned on simultaneously, which could lead to a short circuit. Therefore, in Figure 2 In the process, the control circuit 14 generates complementary switching signals S_D and S_DB based on the control signal CTRL, meaning that only one switching signal can be in the enabled state at any given time.

[0031] exist Figure 2 In this embodiment, the control circuit 14 of the switching power converter circuit 20 is a pulse width modulation (PWM) circuit, which includes a comparator circuit 202, an on-time generation circuit 204, and a switching signal generator 206. See also... Figure 2The positive input (+) of comparator circuit 202 is the first input T1 of control circuit 14, which can receive the third ramp signal RMP3 (i.e., the combination of the first ramp signal RMP1 and the reference voltage VREF); while the negative input (-) of comparator circuit 202 is the second input T2 of control circuit 14, which can receive the fourth ramp signal RMP4 (i.e., the combination of the second ramp signal RMP2 and the output voltage VOUT). In other words, comparator circuit 202 compares the third ramp signal RMP3 and the fourth ramp signal RMP4 to generate a comparison result COMP. The comparison result COMP reflects whether the third ramp signal RMP3 exceeds the fourth ramp signal RMP4, thereby triggering subsequent control logic. The on-time generation circuit 204 is coupled to the output of comparator circuit 202, receives the comparison result COMP, and generates an on-time control signal CTRL based on the comparison result COMP to determine the on-time of the high-side switch HS and the low-side switch LS, i.e., the working period of the switching signal S_D or the working period of the switching signal S_DB. Specifically, the on-time generation circuit 204 determines the duty cycle D of the control signal CTRL based on the comparison result COMP, and uses this to control the respective duty cycles of the complementary switching signals S_D and S_DB. The switching signal generator 206 is coupled to the on-time generation circuit 204 to receive the control signal CTRL, and uses it to generate complementary switching signals S_D and S_DB based on the control signal CTRL to drive the high-side switch HS and the low-side switch LS of the power stage circuit 12. In this embodiment, the duty cycle of the switching signal S_D is equal to the duty cycle D of the control signal CTRL; therefore, the duty cycle of the complementary switching signal S_DB is (1-D). The duty cycle D of the switching signal S_D corresponds to the on-time of the high-side switch HS, while the duty cycle (1-D) of the switching signal S_DB corresponds to the on-time of the low-side switch LS. The on-time generation circuit 204 ensures that the switching signals S_D and S_DB operate complementaryly at any given time, preventing the high-side switch HS and the low-side switch LS from being on simultaneously, thus preventing shoot-through. The switching signal generator 206 may include a driving circuit or logic circuit to ensure that the voltage levels and timing of the switching signals S_D and S_DB are accurate and synchronized to meet the driving requirements of the high-side switch HS and the low-side switch LS. For example, when the comparator circuit 202 detects that the fourth ramp signal RMP4 is lower than the third ramp signal RMP3, the comparison result COMP triggers the on-time generation circuit 204 to control the switching signal generator 206 through the control signal CTRL, causing the switching signal S_D to enter an enabled state (e.g., high potential), corresponding to the high-side switch HS being turned on, and the inductor L accumulating energy through the input voltage VIN. At the same time, the switching signal S_DB is in a disabled state (e.g., low potential), causing the low-side switch LS to turn off.As the fourth ramp signal RMP4 gradually rises, when it exceeds the third ramp signal RMP3, the comparison result COMP changes. The conduction time generation circuit 204 controls the switching signal generator 206 via the control signal CTRL to adjust the switching signal S_D to the disabled state, turning off the high-side switch HS and enabling the switching signal S_DB, turning on the low-side switch LS. The inductor L releases energy to the output terminal 102. This process is converted into the control signal CTRL by the switching signal generator 206, dynamically adjusting the energy transfer of the inductor L and stabilizing the output voltage VOUT.

[0032] In addition, Figure 2 In the circuit, the dual-ramp signal generation circuit 16 includes a first ramp signal generation circuit 21 and a second ramp signal generation circuit 22, which are used to generate a first ramp signal RMP1 and a second ramp signal RMP2, respectively. The first ramp signal generation circuit 21 includes a first current generation circuit 210, a first switch 212, and a first capacitor 214. The first current generation circuit 210 generates a first current I1 based on a first voltage V1. The first switch 212 is coupled between the first current generation circuit 210 and the first input terminal T1 of the control circuit 14, and switches the transmission path of the first current I1 according to the working period D of the control signal CTRL to dynamically adjust the generation of the first ramp signal RMP1. The first capacitor 214 is coupled between a node 216 and the first input terminal T1, and forms the ramp characteristics of the first ramp signal RMP1 through the charging or discharging of the first current I1. Similarly, the second ramp signal generation circuit 22 includes a second current generation circuit 220, a second switch 222, and a second capacitor 224. The second current generating circuit 220 generates a second current I2 based on the second voltage V2. A second switch 222 is coupled between the second current generating circuit 220 and the second input terminal T2 of the control circuit 14, switching the transmission path of the second current I2 according to the working cycle D of the control signal CTRL to adjust the generation of the second ramp signal RMP2. A second capacitor 224 is coupled between node 216 and the second input terminal T2, forming the ramp characteristic of the second ramp signal RMP2 through the charging or discharging of the second current I2. Node 216 can be coupled to one of the output voltage VOUT, the reference voltage VREF, or the ground voltage GND to adjust the reference point of the ramp signal according to application requirements.

[0033] exist Figure 2In this circuit, the first current generating circuit 210 generates a first current I1 based on a first voltage V1, and the second current generating circuit 220 generates a second current I2 based on a second voltage V2. The first voltage V1 can be either the input voltage VIN or the output voltage VOUT, while the second voltage V2 is the other of the input voltage VIN and the output voltage VOUT that is not selected as the first voltage V1. In this case, any circuit or module that can generate current according to the above current generation method can be applied to this invention. For example, please refer to... Figure 3A and Figure 3B , Figure 3A and Figure 3B This is a schematic diagram of the current generating circuits 30 and 32 according to an embodiment of the present invention. The current generating circuits 30 and 32 can interchangeably implement the first current generating circuit 210 and the second current generating circuit 220. For example, if the first current generating circuit 210 is implemented using the current generating circuit 30 to generate the first current I1, then the second current generating circuit 220 will be implemented using the current generating circuit 32 to generate the second current I2; conversely, if the first current generating circuit 210 is implemented using the current generating circuit 32 to generate the first current I1, then the second current generating circuit 220 will be implemented using the current generating circuit 30 to generate the second current I2.

[0034] Specifically, as shown in Figure 3, the current generating circuit 30 is composed of a current source CS, and the current source CS is an active current source that can convert a voltage Vx into a current Ix according to a coefficient. Figure 3B As shown, the current generating circuit 32 consists of a resistor R, which generates a current Iy based on a voltage Vy. Its resistance value is related to the coefficient upon which the current source CS is based; for example, if the coefficient upon which the current source CS is based is Gm, then the resistance value of resistor R can be 1 / Gm, and is not limited to this. In other words, when the first current generating circuit 210 is implemented using the current generating circuit 30, the second current generating circuit 220 will correspondingly be implemented using the current generating circuit 32. In this case, voltage Vx is the first voltage V1, current Ix is the first current I1, voltage Vy is the second voltage V2, and current Iy is the second current I2. Similarly, when the first current generating circuit 210 is implemented using the current generating circuit 32, the second current generating circuit 220 will correspondingly be implemented using the current generating circuit 30. In this case, voltage Vy is the first voltage V1, current Iy is the first current I1, voltage Vx is the second voltage V2, and current Ix is the second current I2. This interchangeable current generating mechanism allows for the selection of an appropriate current generating method according to application requirements, increasing the flexibility of circuit design.

[0035] On the other hand, when selecting the first voltage V1 and the second voltage V2, it is sufficient to ensure that one of them is related to the input voltage VIN and the other to be related to the output voltage VOUT to meet the operational requirements of the dual-slope signal generation circuit 16. Furthermore, for different applications, the weighting ratio of the output voltage VOUT and the input voltage VIN can be appropriately adjusted. For example, the weighting of the input voltage VIN can be set to m, and the weighting of the output voltage VOUT can be set to n. That is, setting one of the first voltage V1 and the second voltage V2 to be m times the input voltage VIN and the other to be n times the output voltage VOUT can also meet the operational requirements of the dual-slope signal generation circuit 16 and further reflect the specific dynamic changes of the input voltage VIN and the output voltage VOUT, improving the adaptability of the control loop.

[0036] As described above, the implementation of the first current generation circuit 210 and the second current generation circuit 220 is highly flexible. The current source CS or the resistor R can be selected as the current generation element. Combined with the flexible configuration of the first voltage V1 and the second voltage V2 (i.e., interchangeable selection of input voltage VIN or output voltage VOUT), diverse design options are provided. This design not only allows adjustment of the current generation method according to application requirements, but also allows precise adjustment of the first current I1 and the second current I2 through a weighted ratio (m times the input voltage VIN and n times the output voltage VOUT), thereby affecting the ramp characteristics of the first ramp signal RMP1 and the second ramp signal RMP2. The flexibility of this invention is further extended to the coupling method of node 216, i.e., node 216 can be coupled to the output voltage VOUT, the reference voltage VREF, or the ground voltage GND, adjusting the reference point of the ramp signal according to different applications, thereby meeting different circuit design requirements and optimizing the stability and response speed of the control loop.

[0037] When node 216 is coupled to the output voltage VOUT, the first capacitor 214 and the second capacitor 224 can quickly reflect changes in the output voltage VOUT to the first input terminal T1 and the second input terminal T2 of the control circuit 14. This allows the control circuit 14 to quickly respond to changes in the load current and adjust the control signal CTRL to reduce overshoot or undershoot of the output voltage VOUT, thereby improving the load transient response speed and solving the problem of poor load transient performance in the prior art. When node 216 is coupled to the reference voltage VREF, the reference points of the first capacitor 214 and the second capacitor 224 are fixed at a stable voltage, ensuring that the ramp characteristics of the first ramp signal RMP1 and the second ramp signal RMP2 are relatively stable. This is suitable for applications requiring high-precision control, such as maintaining the stability of the output voltage VOUT under low load conditions. When node 216 is coupled to the ground voltage GND, the reference points of the first capacitor 214 and the second capacitor 224 are set to zero potential, simplifying the ramp signal generation process. This is suitable for cost-sensitive applications while maintaining the stability of the control loop. Therefore, the diverse coupling methods of node 216 enhance the adaptability of the dual-ramp signal generation circuit 16, enabling it to flexibly respond to different operating conditions and system requirements. Furthermore, the capacitance values ​​of the first capacitor 214 and the second capacitor 224 can be designed to be approximately the same to ensure the symmetry between the first ramp signal RMP1 and the second ramp signal RMP2.

[0038] In short, Figure 2 The dual-slope signal generation circuit 16 not only ensures that the control circuit 14 generates a stable control signal CTRL based on the comparison result of the third slope signal RMP3 and the fourth slope signal RMP4, but also provides a highly flexible circuit configuration through the interchangeability of the first voltage V1 and the second voltage V2 and the various coupling methods of node 216.

[0039] Figure 2 and Figure 3A , Figure 3B Showing in implementation Figure 1 When implementing the switching power converter circuit 10, the dual-slope signal generation circuit 16 can adopt a highly flexible circuit configuration. Furthermore, in realizing... Figure 1 When using the switching power converter circuit 10, other adjustment mechanisms can be added as appropriate. For example, please refer to... Figure 4 , Figure 4This is a schematic diagram of a switching power converter circuit 40 according to an embodiment of the present invention. The switching power converter circuit 40 is derived from the switching power converter circuit 10 and can also be considered as an implementation of the switching power converter circuit 10; therefore, the same symbols are used to represent the same circuits or signals. Unlike the switching power converter circuit 10, the switching power converter circuit 40 additionally adds a level adjustment module 400, coupled to the output terminal 102 (to receive the output voltage VOUT), the reference voltage VREF, and the second input terminal T2 of the control circuit 14, to dynamically adjust the level of the second ramp signal RMP2, thereby enhancing the stability of the control loop and further optimizing the dynamic response of the control loop. In one embodiment, the level adjustment module 400 is an error amplifier, used to compare the output voltage VOUT with the reference voltage VREF, generate an error signal, and output the error signal to the second input terminal T2 to adjust the level of the second ramp signal RMP2. In another embodiment, the level adjustment module 400 may consist of an error amplifier and an active current source; the error amplifier compares the output voltage VOUT with the reference voltage VREF and generates an error signal to the active current source, which then generates an error current and outputs it to the second input terminal T2.

[0040] Furthermore, in the aforementioned embodiments, the reference voltage VREF is directly combined with the first ramp signal RMP1 to form the third ramp signal RMP3 without processing, and the output voltage VOUT is directly combined with the second ramp signal RMP2 to form the fourth ramp signal RMP4 without processing. However, this is not the only possibility. The reference voltage VREF can also be combined with the first ramp signal RMP1 through a first impedance element to form the third ramp signal RMP3. Similarly, the output voltage VOUT can also be combined with the second ramp signal RMP2 through a second impedance element to form the fourth ramp signal RMP4. By transmitting the reference voltage VREF and the output voltage VOUT through the first and second impedance elements, the signal amplitude can be effectively adjusted to ensure that the dynamic range of the third ramp signal RMP3 and the fourth ramp signal RMP4 meets the input requirements of the control circuit 14, thereby improving the accuracy and stability of the control loop. In addition, the first and second impedance elements can also provide voltage division or filtering functions to further filter out high-frequency noise in the input signal, enhance the noise suppression capability of the system, and maintain the symmetry of signal transmission, which helps to support seamless conversion from discontinuous conduction mode (DCM) to continuous conduction mode (CCM).

[0041] The aforementioned variations can be appropriately integrated as needed. For example, please refer to... Figure 5 , Figure 5This is a schematic diagram of a switching power converter circuit 50 according to an embodiment of the present invention. The switching power converter circuit 50 is derived from switching power converter circuits 10, 20, and 40, and therefore uses the same symbols to represent the same circuits or signals. Specifically, the switching power converter circuit 50 adopts the architecture of the switching power converter circuit 20, and the first current generating circuit 210 therein uses... Figure 3A The first current generating circuit 30 is implemented, while the second current generating circuit 220 adopts... Figure 3B The current generation circuit 32 is implemented. At the same time, the first voltage V1 is set to n times the output voltage VOUT, the second voltage V2 is set to the input voltage VIN, and node 216 is coupled to the output terminal 102 (that is, the voltage of node 216 is the output voltage VOUT).

[0042] The switching power converter circuit 50 also incorporates Figure 4 The level adjustment module 400 is implemented by an error amplifier EA and an active current source CS_EA. Specifically, the error amplifier EA generates an error signal VEA based on the difference between its output voltage VOUT and the reference voltage VREF, which is then sent to the active current source CS_EA. The active current source CS_EA then generates an error current IEA and outputs it to the second input terminal T2. Alternatively, the level adjustment module 400 can be implemented solely by the error amplifier EA. In this case, the error signal VEA generated by the error amplifier EA will be directly output to the second input terminal T2 to adjust the level of the second ramp signal RMP2.

[0043] In addition, the switching power converter circuit 50 adds a first resistor R1 (to realize the aforementioned first impedance element) on the path from the reference voltage VREF input to the first input terminal T1, and a second resistor R2 (to realize the aforementioned second impedance element) on the path from the output voltage VOUT input to the second input terminal T2. In other words, the reference voltage VREF passes through the first resistor R1 and is combined with the first ramp signal RMP1 to form the third ramp signal RMP3, while the output voltage VOUT passes through the second resistor R2 and is combined with the second ramp signal RMP2 to form the fourth ramp signal RMP4. Furthermore, the resistance values ​​of the first resistor R1 and the second resistor R2 can be designed to be approximately the same to ensure the symmetry of signal transmission. This symmetrical configuration not only enhances the stability of the control loop, but also supports seamless switching from discontinuous conduction mode (DCM) to continuous conduction mode (CCM), further improving the system's adaptability under different load conditions.

[0044] Please refer to Figure 6 , Figure 6 This is a simulated waveform diagram of the switching power converter circuit 50. Figure 6In the diagram, curve 600 corresponds to the third ramp signal RMP3, while curve 602 corresponds to the fourth ramp signal RMP4. Since the first voltage V1 is set to n times the output voltage VOUT, and the second voltage V2 is set to the input voltage VIN, the combination of the third ramp signal RMP3 and the fourth ramp signal RMP4 is related to the combination of the n-fold weighted result of the output voltage VOUT and the input voltage VIN, thus increasing the noise suppression capability.

[0045] It should be noted that, as mentioned earlier, when selecting the first voltage V1 and the second voltage V2, it is only necessary to ensure that one of them is related to the input voltage VIN and the other is related to the output voltage VOUT to meet the operational requirements of the dual-slope signal generation circuit 16. Therefore, in Figure 5 In the switching power converter circuit 50, the first voltage V1 can be changed to the input voltage VIN, and the second voltage V2 can be changed to n times the output voltage VOUT. The analog waveform diagram is as follows: Figure 7 As shown. In Figure 7 In the diagram, curve 700 corresponds to the third ramp signal RMP3, while curve 702 corresponds to the fourth ramp signal RMP4. (Comparison) Figure 6 and Figure 7 It can be seen that after the settings of the first voltage V1 and the second voltage V2 are swapped, the combination of the third ramp signal RMP3 and the fourth ramp signal RMP4 is still related to the combination of the n-fold weighted result of the output voltage VOUT and the input voltage VIN, which can also increase the noise suppression capability. The only difference is that the components are different.

[0046] Furthermore, the implementation of the first capacitor 214, the second capacitor 224, the first resistor R1, and the second resistor R2 is not limited to traditional capacitors or resistors; they can be replaced by other equivalent components depending on the application requirements. For example, the first capacitor 214 and the second capacitor 224 can be implemented using a capacitor array, a variable capacitor, or an equivalent charge storage element (such as a charge pump or an inductive energy storage element) to provide similar charging and discharging functions, thereby adjusting the characteristics of the ramp signal under different frequency ranges or load conditions. Similarly, the first resistor R1 and the second resistor R2 can be implemented using a variable resistor, a resistor network, or an equivalent impedance element (such as an impedance module composed of transistors or an impedance circuit configured with an operational amplifier) ​​to flexibly adjust the signal amplitude or filtering characteristics. This flexibility allows designers to optimize circuit performance in different application scenarios, such as using a capacitor array in high-frequency applications to improve response speed, or using a variable resistor in low-power applications to reduce power consumption, thereby further enhancing the adaptability and efficiency of the switching power converter circuit 10.

[0047] As described above, the switching power converter circuit 10 and its derived switching power converter circuits 20, 40, and 50 of this invention place the first ramp signal RMP1 and the second ramp signal RMP2 at different input terminals of the control circuit 14, and adjust them according to the duty cycle D. This stabilizes the Q value of the control loop and effectively reduces oscillation problems. The weighted combination and separate placement design of the first ramp signal RMP1 and the second ramp signal RMP2 achieves mutual cancellation of high-frequency noise, improving noise immunity. In addition, in the switching power converter circuits 20 and 50, the first capacitor 214 and the second capacitor 224 can be coupled to the output voltage VOUT to quickly respond to load changes, improve transient response speed, and overcome the problem of poor load transient performance in the prior art. Furthermore, the symmetrical configuration of the first resistor R1 and the second resistor R2 supports seamless switching between DCM and CCM, ensuring the stability of the system under various operating conditions. Therefore, the design of this invention is suitable for high-efficiency power management applications, such as mobile devices, servers, and automotive electronic systems, providing a stable, efficient, and cost-effective solution.

[0048] The operation modes of the switching power converter circuits 10, 20, 40, and 50 described above can be summarized into a control flow 80, such as... Figure 8 As shown. Control flow 80 can be achieved using switching power converter circuits 10, 20, 40, and 50, and includes the following steps:

[0049] Step 800: Begin.

[0050] Step 802: Receive input voltage VIN.

[0051] Step 804: Based on the control signal CTRL, the input voltage VIN is converted into the output voltage VOUT through the power supply stage circuit 12.

[0052] Step 806: Generate the first ramp signal RMP1 based on the first voltage V1 and the working period D of the control signal CTRL.

[0053] Step 808: Generate the second ramp signal RMP2 based on the second voltage V2 and the working period D of the control signal CTRL.

[0054] Step 810: The first input terminal T1 of the control circuit 14 receives the first ramp signal RMP1 and the reference voltage VREF, and the second input terminal T2 of the control circuit receives the second ramp signal RMP2 and the output voltage VOUT. The signals of the first input terminal T1 and the second input terminal T2 are compared to generate the control signal CTRL.

[0055] Step 812: End.

[0056] For detailed operation or derivative variations of control process 80, please refer to the foregoing description, which will not be repeated here.

[0057] As described above, this invention, through a dual-slope signal generation architecture, introduces the components of the input voltage VIN and the output voltage VOUT to different input terminals of the control circuit 14, enabling high-frequency noise to cancel each other out and thus improving the system's noise suppression capability. Furthermore, this invention utilizes the first capacitor 214 and the second capacitor 224 coupled to the output voltage VOUT to quickly respond to load changes and improve transient response speed. The symmetrical configuration of the first resistor R1 and the second resistor R2 supports seamless transition from discontinuous conduction mode (DCM) to continuous conduction mode (CCM), ensuring system stability under various operating conditions.

[0058] In summary, the switching power converter circuit of this utility model overcomes the limitations of existing technologies in terms of stability, load transient response, and circuit complexity, and has a variety of flexible designs, providing a stable, efficient, and cost-effective power solution.

Claims

1. A switching power converter circuit, characterized in that, Include: One input terminal is used to receive an input voltage; One output terminal is used to output an output voltage; A power supply stage circuit, coupled to the input terminal and the output terminal, is used to convert the input voltage into the output voltage according to a control signal; A control circuit, coupled to the power stage circuit, receives a first ramp signal and a reference voltage at a first input terminal, and receives a second ramp signal and the output voltage at a second input terminal, to compare the signal at the first input terminal with the signal at the second input terminal to generate the control signal, thereby controlling the power stage circuit. A dual-ramp signal generation circuit, coupled to the first input terminal and the second input terminal, is used to generate the first ramp signal according to a first voltage and a working cycle of the control signal, and to generate the second ramp signal according to a second voltage and the working cycle of the control signal. The first voltage is selected from the input voltage and the output voltage, and the second voltage is the other of the input voltage and the output voltage that is not selected as the first voltage.

2. The switching power converter circuit as described in claim 1, characterized in that, The dual-slope signal generation circuit includes a first slope signal generation circuit and a second slope signal generation circuit. The first ramp signal generation circuit includes: A first current generating circuit is used to generate a first current based on the first voltage; A first switch, coupled between the first current generating circuit and the first input terminal of the control circuit, is used to switch the connection between the first current generating circuit and the first input terminal of the control circuit according to the operating cycle of the control signal; and A first capacitor is coupled between a node and the first input terminal of the control circuit; The second ramp signal generation circuit includes: A second current generating circuit is used to generate a second current based on the second voltage; A second switch, coupled between the second current generating circuit and the second input terminal of the control circuit, is used to switch the connection between the second current generating circuit and the second input terminal of the control circuit according to the operating cycle of the control signal; and A second capacitor is coupled between the node and the second input terminal of the control circuit; The first current generating circuit is composed of one of a current source and a resistor, and the second current generating circuit is composed of the other of the current source and the resistor that is not selected to generate the first current. The node is coupled to one of the output voltage, the reference voltage, or a ground voltage.

3. The switching power converter circuit as described in claim 2, characterized in that, The current source is an active current source that converts the first voltage into the first current or the second voltage into the second current according to a coefficient, and the resistance value of the resistor is related to the coefficient.

4. The switching power converter circuit as described in claim 2, characterized in that, When the first voltage is the output voltage, the first current generating circuit generates the first current based on a weighted result of the first voltage; and when the second voltage is the output voltage, the second current generating circuit generates the second current based on a weighted result of the second voltage.

5. The switching power converter circuit as described in claim 2, characterized in that, This node is coupled to the output voltage and is used to respond to changes in the output voltage to the control circuit in order to improve the load transient response speed.

6. The switching power converter circuit as described in claim 1, characterized in that, The dual-ramp signal generator further includes a level adjustment module coupled to the output terminal, the reference voltage, and the second input terminal of the control circuit, used to adjust the level of the second ramp signal.

7. The switching power converter circuit as described in claim 6, characterized in that, This level adjustment module includes: An error amplifier is coupled to the output terminal, the reference voltage, and the second input terminal of the control circuit to compare the output voltage with the reference voltage, generate an error signal, and output the error signal to the second input terminal of the control circuit.

8. The switching power converter circuit as described in claim 6, characterized in that, This level adjustment module includes: An error amplifier, coupled to the output terminal and the reference voltage, is used to compare the output voltage with the reference voltage to generate an error signal; as well as An active current source is coupled to the error amplifier and the second input terminal of the control circuit to generate an error current based on the error signal and output the error signal to the second input terminal of the control circuit.

9. The switching power converter circuit as described in claim 1, characterized in that, The combination of the signal at the first input terminal and the signal at the second input terminal is related to a weighted result of the output voltage and the combination of the input voltage.

10. The switching power converter circuit as described in claim 1, characterized in that, Also includes: A first resistor, coupled between the reference voltage and the first input terminal of the control circuit, is used to transmit the reference voltage to the first input terminal; and A second resistor is coupled between the output terminal and the second input terminal of the control circuit to transmit the output voltage to the second input terminal.

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