A power device testing apparatus
Patent Information
- Application Number
- CN202521996588.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-16
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2035-09-16
AI Technical Summary
[0004]本申请通过提供一种电力设备测试装置,解决了传统的测试方法工序复杂且效率低的问题,实现了测试工序简单且高效的效果
[0006] The beneficial effects of the above embodiments are as follows: the power equipment testing device, through the integrated design of multiple modules, solves the problems of reliance on external instruments, complex wiring, and low efficiency in traditional testing methods, and achieves the effects of simplified testing procedures, high integration, and improved testing accuracy. It can simultaneously complete the measurement of multiple parameters such as signal transmission time, spread time, return loss, and line impedance, and is applicable to a wider range of scenarios.
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Figure CN224732065U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of power equipment technology, and in particular to a power equipment testing device. Background Technology
[0002] To ensure the safe and efficient operation of the system, it is often necessary to test and verify power equipment. This includes verifying and calibrating important indicators that affect communication, such as carrier channel transmission time, delay time, spread time, and line impedance, as well as important parameters such as return loss of wave traps and filters.
[0003] Traditional testing methods involve setting up test circuits on-site using resistors, capacitors, test leads, and test clips, and then using other instruments such as signal generators, oscilloscopes, and millisecond meters for measurement and calculation. This results in large test errors, high skill requirements for personnel, high testing costs, and low efficiency. Utility Model Content
[0004] This application provides a power equipment testing device that solves the problems of complex procedures and low efficiency in traditional testing methods, and achieves a simple and efficient testing process.
[0005] This application provides a power equipment testing device, including: a central processing unit, and an LCD display module, a measurement mode selection module, a test command button module, a test module, an excitation signal output selection control module, an input / output interface module, an input status LED indicator module, and a power supply module electrically connected to the central processing unit; it also includes a return loss and line impedance testing module; the central processing unit is used for button monitoring and recognition, input signal detection, output signal control, test function execution, and result processing and display; the LCD display module is used to display test item information and measurement results; the measurement mode selection module is used to realize channel selection, measurement object switching, and self-testing; the test command button module is used to select the excitation method and output port; the excitation signal output selection control module is used to realize the switching and indication of the excitation source; the input / output interface module is used to connect to the device under test and realize excitation signal output and measured signal input; the input status LED indicator module is used to realize the isolation detection and status visualization of the input signal; the return loss and line impedance testing module is used to measure the return loss and line impedance of the protected line.
[0006] The beneficial effects of the above embodiments are as follows: the power equipment testing device, through the integrated design of multiple modules, solves the problems of reliance on external instruments, complex wiring, and low efficiency in traditional testing methods, and achieves the effects of simplified testing procedures, high integration, and improved testing accuracy. It can simultaneously complete the measurement of multiple parameters such as signal transmission time, spread time, return loss, and line impedance, and is applicable to a wider range of scenarios.
[0007] Based on the above embodiments, this application can be further improved as follows:
[0008] In one embodiment of this application, the central processing unit includes a CPU and a CPLD, which communicate via a parallel bus. The CPU is used for key signal translation, test result processing, and display control, while the CPLD is used for status indicator control, test program execution, and measurement result latching. Technical advantages: The CPU+CPLD parallel processing architecture, where the CPU handles command, data transmission, and result processing, and the CPLD performs complex logic operations and real-time signal control and status indication, demonstrates clear division of labor and high communication efficiency. This solves the problem of single-processor response latency, improves the speed of test command execution and the real-time performance of measurement results, and ensures the accuracy of high-precision time parameter measurements such as short pulses (100ms).
[0009] In one embodiment of this application, the measurement mode selection module includes: a Channel A / B key for selecting channel A / B to measure the transmission time and spread time of Rx and Aux pulse signals; a UB 1 / 2 key for selecting the unlock pulse measurement object to measure its pulse delay and length; and a Test key for triggering device self-testing to detect the input / output interface, LCD display module, and input status LED indicator module, and displaying the self-test results on the LCD display module. Technical advantages: The multi-mode key switching design enables targeted measurement of different channels and different types of signals (such as Rx / Aux pulses and unlock pulses), meeting diverse testing needs; the self-test function can pre-detect device faults, avoiding test errors caused by device malfunctions and improving test reliability.
[0010] In one embodiment of this application, the test command key module includes a TRIP A / B key, a CONT A / B key, and a START A / B key. The TRIP A / B key is used to output a signal from the Tx port in a short pulse excitation mode to measure the signal transmission time and spread time of channels A / B. The CONT A / B key is used to output a signal from the Tx port in a long pulse excitation mode to measure the operating voltage and current of channels A / B. The START A / B key has the same function as the CONT A / B key, with the excitation signal output from the START port. Technical effect: By switching between short pulse (TRIP) and long pulse (CONT / START) excitation modes, it can adapt to the response characteristics of different devices under test (e.g., fast-acting devices require short pulse excitation, while delayed-acting devices require long pulse excitation), achieving accurate measurement of multiple parameters such as signal transmission time, spread time, and operating voltage / current, thus improving the compatibility of test scenarios.
[0011] In one embodiment of this application, the input status LED indicator module includes an input signal detection unit, which includes an optocoupler, a reverse protection diode, a current-limiting resistor, and a status indicator light. When an input signal (Rx, Aux, AL, or UB) is connected, the optocoupler conducts, the status indicator light illuminates, and the detection signal is transmitted to the CPLD. Technical advantages: Through optocoupler isolation and reverse protection design, damage to the internal circuitry caused by input signal overvoltage or reverse connection is avoided, improving the device's anti-interference capability; the status indicator light provides real-time feedback on the input signal status, and combined with the CPLD's rapid detection mechanism, it achieves visualized and automated identification of signal access, reducing human judgment errors.
[0012] In one embodiment of this application, the power module provides: an internal operating power supply and three sets of DC power supplies for charging external portable devices; it also provides excitation signal sources required for testing. Technical advantages: Integrating multiple internal power supplies and external charging interfaces meets the power supply needs of the device itself and field auxiliary equipment (such as level meters and oscillators), improving the convenience of on-site testing; the programmable switching of the excitation signal sources (controlled by a CPLD) can adapt to devices under test with different voltage levels, avoiding the cumbersome operation of external power supplies and simplifying the testing process.
[0013] In one embodiment of this application, the input / output interface module includes dual-channel interfaces X5 and X6, each channel providing 2 outputs (TX, START) and 4 inputs (RX, AUX, AL, UB); when the TX or START port outputs an excitation signal, the corresponding channel's LED indicator lights up. Technical advantages: The independent dual-channel design supports parallel testing of channels A and B, improving the efficiency of simultaneous testing of multiple devices; the output port status indicator provides intuitive feedback on the signal output status, avoiding test errors caused by incorrect interface connections, and improving operational safety and convenience.
[0014] In one embodiment of this application, the return loss and line impedance testing module includes an X1 oscillator interface, an X2 frequency-selective level meter interface, an X3 calibration interface, and an X4 device under test interface; the return loss test is achieved through the bridge balance principle, and the line impedance test is obtained by combining the frequency-selective level meter reading with the panel scale or by calculation using a formula. The calculation formula is: Rx=75×(10 (-VdB / 20) -1), where VdB is the reading of the frequency-selective level meter (dB). Technical benefits: Through the built-in bridge circuit and formulaic calculation, return loss and line impedance measurements can be completed without the need for complex external test circuits; the reading method combining panel scales and formulas enables rapid acquisition of test results, solving the problems of traditional impedance measurement relying on external bridges and cumbersome calculations, and improving test efficiency. Attached Figure Description
[0015] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.
[0016] Figure 1 This is a structural block diagram of a power equipment testing device according to an embodiment of this application;
[0017] Figure 2 This is a schematic diagram of the panel of a power equipment testing device according to an embodiment of this application;
[0018] Figure 3 This is a schematic diagram of the TRIP A / B test process in an embodiment of this application;
[0019] Figure 4 This is a schematic diagram of the signal transmission waveform in an embodiment of this application;
[0020] Figure 5 This is a schematic diagram of the measurement logic combination in the embodiments of this application;
[0021] Figure 6 This is a schematic diagram of the pulse width measurement process in an embodiment of this application;
[0022] Figure 7 This is a schematic diagram illustrating the equivalent principle of input signal detection and status indication in the embodiments of this application;
[0023] Figure 8 This is a schematic diagram illustrating the excitation source selection and status indication control principle in an embodiment of this application.
[0024] Figure 9 This is a schematic diagram illustrating the return loss test principle in an embodiment of this application;
[0025] Figure 10 This is a schematic diagram illustrating the equivalent principle of line impedance testing in the embodiments of this application;
[0026] Figure 11 This is a schematic diagram illustrating the equivalent principle of line impedance calibration in the embodiments of this application. Detailed Implementation
[0027] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are only for illustrating the present invention and not for limiting the scope of the present invention. After reading the present invention, any modifications of the present invention in various equivalent forms by those skilled in the art will fall within the scope defined by the appended claims.
[0028] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0029] This application provides a power equipment testing device that solves the problems of complex procedures and low efficiency in traditional testing methods, and achieves simple and efficient testing procedures with high testing accuracy.
[0030] The technical solution in this application is to solve the above problems, and the overall approach is as follows:
[0031] Example:
[0032] like Figure 1-2 As shown, a power equipment testing device includes: a central processing unit, and an LCD display module, a measurement mode selection module, a test command button module, a test module, an excitation signal output selection control module, an input / output interface module, an input status LED indicator module, and a power supply module electrically connected thereto. It also includes a return loss and line impedance testing module.
[0033] Central Processing Unit (CPU+CPLD): Composed of a CPU, CPLD, and parallel bus communication circuitry, the CPU is responsible for translating key signals and processing results, while the CPLD is responsible for status indication control and test program execution. The central processing unit is used for key detection and recognition, input signal detection and output signal control, various function tests and processing / displaying test results, and monitoring and indicating various statuses.
[0034] The central processing unit (CPU) and CPLD communicate via a parallel bus. The CPU translates and processes the key signals and sends relevant commands to the CPLD. The CPLD controls the status indicator lights accordingly to turn them on or off. If it is a test command, it enters the relevant test program to perform the measurement. After the measurement is completed, the measurement results are latched and an interrupt signal is sent to the CPU. The CPU reads the corresponding test result data according to the interrupt signal, processes it, and displays it on the LCD.
[0035] LCD display module: Consists of an LCD screen and driving circuit, used to display relevant information and measurement results of test items.
[0036] Measurement mode selection module (Mode): Composed of Channel A / B keys, UB 1 / 2 keys, Loop key, Test key, and signal processing circuitry, it enables channel selection, measurement object switching, and self-test functions. Specifically:
[0037] Channel A / B key: Select channel A / B to measure the transmission time and spread time of Rx and Aux pulse signals. Press this key continuously to select the measurement objects in sequence as RxA / RxB, AuxA / AuxB, and RxA+AuxA / RxB+AuxB.
[0038] UB 1 / 2 key: Perform pulse delay and pulse length measurement of the unlock pulse. Press this key continuously to select the measurement objects in sequence as UB1, UB2, UB1+UB2.
[0039] Loop key: Performs remote measurement, the input signal is output directly without delay, that is: the receiving signal is sent through the transmitting end in the same way in the RX→TX manner;
[0040] Test button: Pressing this button puts the device into self-test mode, performing a comprehensive test on all inputs / outputs, LCD, LEDs, etc., to ensure the device is working properly. The self-test results are displayed on the LCD, and if there is a fault, the faulty component will be displayed.
[0041] Test command keypad module (TRIP, CONT, START): Consists of TRIP A / B keys, CONT A / B keys, START A / B keys, and control logic circuitry, used to select and control the excitation signal output, specifically including:
[0042] TRIP A / B: Measures the signal transmission time and spread time of channel A / B using short pulse (100ms) excitation mode. The excitation signal is output from the Tx port. If the mode is selected as Channel A / B, the measurement results are displayed.
[0043] CONT A / B: The operating voltage and operating current of channel A / B are measured using a long pulse (15s, 1s for 220V). The excitation signal is output from the Tx port.
[0044] START A / B; Same as CONT A / B, except the excitation signal is output from the START port;
[0045] UB: Outputs a 2s unlock signal from the BNC terminal (X7) to measure the delay time and length of the unlock pulse. If the mode is selected as UB 1 / 2, the LCD displays the measurement results.
[0046] Taking the TRIP A / B test command as an example, the test process is as follows: Figure 3 As shown, the UB, CONT, and START tests operate on the same principle.
[0047] Test module: Logic processing and measurement are both completed by the CPLD of the central processing unit; according to instructions, it completes the measurement of protection signal transmission time, extension time, and unlocking pulse pulse delay, pulse length, etc.
[0048] All time measurements can be transformed into pulse width measurements through certain logic processing.
[0049] Taking Tx and Rx signals as examples, the measurement principles are the same for other signals. The transmission waveform is as follows: Figure 4 As shown, the measurement logic combination is as follows Figure 5 As shown, where: S1 is the waveform of the transmitted signal Tx, where T1 is the excitation pulse length; S2 is the waveform of the received signal Rx, where T2 is the pulse length after widening; S3 is the waveform after ANDing S1 and S2, which is the signal transmission time T3 to be tested (for a relay, this is the relay's pull-in time); S4 is the waveform after ORing and NOTing S1 and S2 (T4 is the relay's release time for a relay), transmission time = T3, widening time = T2 - T1. The measurement flowchart is as follows. Figure 6 As shown.
[0050] Excitation signal output selection control module (48V, 100V, 220V): Composed of a voltage selection switch (48V / 100V / 220V), control signal circuit, and status indicator lights, it realizes the switching and indication of the excitation source. The excitation signal output selection control module is used to select a suitable excitation voltage signal according to the test requirements and send it to the device under test through the corresponding output port (Tx / START). For example... Figure 2 The 48V, 100V, and 220V buttons allow you to select the test output excitation source (DC48V / 100V / 220V / passive dry contact). After selecting the desired voltage, the corresponding indicator light will illuminate. Pressing and holding any button for 3 seconds will output a dry contact passive signal, and all three indicator lights will illuminate simultaneously. Excitation source selection and indicator light control are as follows... Figure 8 As shown:
[0051] P_LED(0)~P_LED(2) are the control signals (active low) for the 48V, 100V, and 220V indicator lights, respectively. Pw_48V, Pw_100V, Pw_220V, and Pw_Close are the control signals (active low) for the 48V, 100V, 220V, and passive dry contact excitation sources, respectively. When the excitation source is a passive dry contact, all three indicator lights illuminate simultaneously.
[0052] Input / output interface modules (X5, X6): Composed of dual-channel X5 / X6 interfaces (including TX / START output terminals and RX / AUX / AL / UB input terminals) and signal conditioning circuitry, supporting signal input / output and channel switching, providing multiple outputs and inputs. Excitation signals are sent to the device under test (DUT) through the output interfaces, and switch signals from the DUT are received through the input interfaces. Input signals: Alarm signal AL, unlock signal UB, receive signal Rx, auxiliary signal Aux; Output signals: transmit signal Tx, continuous signal CONT, START.
[0053] like Figure 2 As shown, X5 is the input / output interface for channel A and X6 is the input / output interface for channel B. Each channel provides 2 outputs (TX, START) and 4 inputs (RX, AUX, AL, UB). When there is an output from TX or START, the corresponding channel indicator (A / B) lights up; otherwise, it turns off.
[0054] Input and Status LED Indicator Module: Composed of optocouplers, reverse protection diodes, current-limiting resistors, and LED indicators, this module provides isolated detection and status visualization of input signals. It is used to monitor and provide corresponding indications in real time for power supply status, excitation signal status, output signal status, external device charging port status, and various input signals. For example... Figure 2 As shown, when there is a signal input to channel A or channel B, the corresponding status indicator (AL1 / 2, UB1 / 2, RxA / B, AuxA / B) will light up. If the mode is selected to the corresponding signal, the measurement result will be displayed on the LCD.
[0055] The input signal detection unit consists of an optocoupler, a reverse protection diode, and a current-limiting resistor, and is used to detect alarm signals AL, unlock signals UB, receive signals Rx, and auxiliary signals Aux from the input port.
[0056] Simplified equivalent schematic diagram of input signal detection is shown below Figure 7 As shown (taking the detection of the Rx signal as an example, the other signals are the same); Figure 7 V+ and V- are the positive and negative terminals of the internal auxiliary power supply, Rx+ and Rx- are the input signal input terminals, D101 is the reverse protection diode, R101 and R102 are the current limiting resistors, U101 is the optocoupler, and L101 is the status indicator. Kin is connected to the CPLD detection input port.
[0057] The input signal is connected to the Rx+ and Rx- terminals. When a signal is returned, it is equivalent to the switch S1 being closed. V+ is applied to pin 1 of the optocoupler through R101, the optocoupler is turned on, Kin changes from high to low, and the L101 indicator light illuminates at the same time.
[0058] The power supply module consists of an internal power conversion circuit (output 12V / 5V / 3.3V), an external charging interface (3 sets of 14V), and an excitation signal source circuit (DC48V / 100V / 220V / passive dry contact). It provides the tester with internal operating power (12V, 5V, 3.3V, etc.); provides 3 sets of 14V (max 500mA) DC power for external portable devices to operate / charge; and provides the excitation signal source (DC48V / 100V / 220V / passive dry contact) required for testing, with the selection of the excitation signal source controlled by the CPLD.
[0059] like Figure 2 As shown, the panel provides a standard three-prong power socket, power switch, fuse box, and indicator lights ON, PM, PS, and SPM. The power indicator light ON illuminates during normal operation and flashes when a fault occurs. PM, PS, and SPM are charging output indicator lights for three external portable devices (such as level meter oscillators, frequency selective level meters, etc.). The CPU detects the operating / charging current; when the current exceeds 5mA, the corresponding port's indicator light illuminates.
[0060] Return loss and line impedance test module (X1-4, frequency selector): Composed of X1-X4 interfaces (oscillator / frequency selector / calibrator / device under test interface), bridge circuit, and frequency selector level meter, it measures parameters through bridge balance principle and formula calculation. The return loss and line impedance test module is an independent additional function module of this device, measuring the return loss and line impedance of the protected line. For convenient and quick testing, the device has a level and impedance comparison table printed on the panel for quick reference, such as... Figure 2 As shown, X1 is the oscillator interface, X2 is the frequency-selective level meter interface, X3 is the calibration interface, and X4 is the device under test interface. The return loss measurement result is directly read from the frequency-selective level meter, and the line impedance test result is read from the panel scale (Z / Ω) corresponding to the frequency-selective level meter reading (dB).
[0061] (1) The principle of return loss test is as follows: Figure 9 As shown: Among them, It is a level oscillator (OSC). For the frequency selector meter (SLM), R1, R2, Rn, and Rx are the bridge arm resistors (when the bridge is balanced, R1 / R2 = Rn / Rx, and R1 = R2 = 75Ω is set in the device).
[0062] Before testing, set the internal resistance of the level oscillator to 0, the frequency to the operating frequency (20-500KHz), connect the 75Ω calibration resistor to Rn, and set the frequency selector to high resistance (∞) for measurement, with the frequency setting consistent with the oscillator. Adjust the oscillator output so that the frequency selector reading is 0dB, and then connect it to the device under test. The absolute value of the frequency selector reading at this time is the return loss value.
[0063] (2) Line impedance testing principle, wiring, and calibration principle (unlike return loss, Rn is open-circuited). Figure 10 , Figure 11 As shown: Before testing, open Rn and short Rx. Set the internal resistance of the level oscillator to 0, the frequency to the operating frequency (20-500kHz), and the frequency selector to be connected across a 75Ω resistor. The frequency setting should be consistent with the oscillator. Adjust the oscillator output so that the frequency selector reading is 0dB, then connect it to the device under test for testing.
[0064] The line impedance value can be calculated using the following formula based on the reading of the level meter.
[0065] Rx=75×(1 / (10 (VdB / 20) )-1)=75×(10 (-VdB / 20) -1);
[0066] Where: VdB is the reading of the frequency selector (dB).
[0067] The technical solutions described in the embodiments of this application above have at least the following technical effects or advantages:
[0068] This power equipment testing device integrates multiple testing functions and has many advantages such as simple wiring, high testing accuracy, and portability.
[0069] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A power equipment testing device, characterized in that, include: The system includes a central processing unit (CPU), and electrically connected to it an LCD display module, a measurement mode selection module, a test command button module, a test module, an excitation signal output selection control module, an input / output interface module, and an input status LED indicator module; it also includes a return loss and line impedance testing module. The CPU is used for button monitoring and recognition, input signal detection, output signal control, test function execution, and result processing and display. The LCD display module displays test item information and measurement results. The measurement mode selection module enables channel selection, measurement object switching, and self-testing. The test command button module selects the excitation method and output port. The excitation signal output selection control module switches and indicates the excitation source. The input / output interface module connects to the device under test (DUT) to output excitation signals and input DUT signals. The input status LED indicator module detects the isolation of input signals and visualizes their status. The return loss and line impedance testing module measures the return loss and line impedance of the protected circuit.
2. The power equipment testing device according to claim 1, characterized in that: The central processing unit includes a CPU and a CPLD, which communicate with each other via a parallel bus. The CPU is used for key signal translation, test result processing and display control, and the CPLD is used for status indicator control, test program execution and measurement result latching.
3. The power equipment testing device according to claim 2, characterized in that: The measurement mode selection module includes: Channel A / B key: used to select channel A / B to measure the transmission time and spread time of Rx and Aux pulse signals; UB 1 / 2 key: used to select the unlock pulse measurement object to measure its pulse delay and length; Test key: used to trigger device self-test, to test the input / output interface, LCD display module and input status LED indicator module, and to display the self-test results through the LCD display module.
4. The power equipment testing device according to claim 3, characterized in that: The test command key module includes TRIP A / B keys, CONT A / B keys, and START A / B keys; the TRIP A / B keys are used to output signals from the Tx port in a short pulse excitation mode to measure the signal transmission time and spread time of channels A and B. The CONT A / B key is used to output a signal from the Tx port in a long pulse excitation mode to measure the operating voltage and current of channel A / B; the START A / B key has the same function as the CONT A / B key, and the excitation signal is output from the START port.
5. The power equipment testing device according to claim 4, characterized in that: The input status LED indicator module includes an input signal detection unit, which includes an optocoupler, a reverse protection diode, a current limiting resistor, and a status indicator light. When an input signal is received, the optocoupler is turned on, the status indicator light is lit, and the detection signal is transmitted to the CPLD.
6. The power equipment testing device according to claim 1, characterized in that: The input / output interface module includes a dual-channel interface, with each channel providing 2 outputs and 4 inputs; When the port outputs an excitation signal, the corresponding LED indicator light of the channel will light up.
7. The power equipment testing device according to claim 1, characterized in that: The return loss and line impedance test module includes an X1 oscillator interface, an X2 frequency-selective level meter interface, an X3 calibration interface, and an X4 device under test interface. The return loss test is achieved through the bridge balance principle, and the line impedance test is obtained by combining the reading of the frequency-selective level meter with the panel scale or by calculation using formulas.
8. The power equipment testing device according to claim 1, characterized in that: It also includes a power module, which provides power to the equipment and peripherals and the excitation signal source required for testing.