Power management chip and electronic device

Abstract

The present disclosure relates to a power management chip and an electronic device. The power management chip comprises: a plurality of power supply pins, each of which is a pin of a voltage conversion circuit, and each of which is arranged in a first region of the power management chip; a plurality of control pins, each of which is a pin of a first control circuit, and each of which is arranged in a second region of the power management chip; wherein the first region surrounds the second region. By arranging the power supply pins with complex connection lines on the periphery of the power management chip and the control pins with simple connection lines in the center of the power management chip, the connection of the connection lines and the power management chip is facilitated, thereby reducing the number of power supply pins to reduce the size of the power management chip.

Description

Technical Field

[0001] This disclosure relates to the field of power supply technology, and in particular to a power management chip and electronic device. Background Technology

[0002] Power management chips in electronic devices convert the voltage of the input power supply and output the converted voltage to the screen of the electronic device to power the screen. However, due to the unreasonable pin layout and the large number of power pins, power management chips have a large size. Utility Model Content

[0003] To overcome the problems existing in related technologies, this disclosure provides a power management chip and an electronic device.

[0004] According to a first aspect of this disclosure, a power management chip is provided, the power management chip comprising:

[0005] Multiple power pins, each of which is a pin of a voltage conversion circuit, and each of which is located in the first region of the power management chip;

[0006] Multiple control pins, each of which is a pin of the first control circuit, and each of which is located in the second region of the power management chip;

[0007] The first region surrounds the second region.

[0008] In some embodiments of this disclosure, the number of voltage conversion circuits is multiple; the power supply pins of the same voltage conversion circuit are arranged adjacent to each other; and / or, multiple power supply pins with the same function are arranged adjacent to each other.

[0009] In some embodiments of this disclosure, the voltage conversion circuit includes a first voltage conversion circuit and a second voltage conversion circuit, both of which are used to power the display panel; the plurality of power supply pins include a plurality of first power supply pins of the first voltage conversion circuit and a plurality of second power supply pins of the second voltage conversion circuit;

[0010] Each of the first power pins is located in a first sub-region of the first region, and each of the second power pins is located in a second sub-region of the first region; the second region is located between the first sub-region and the second sub-region in a first preset direction.

[0011] In some embodiments of this disclosure, each of the first power pins includes:

[0012] The first power supply pin is used for electrical connection with the input power supply;

[0013] The first switch pin is used to electrically connect to the first terminal of the first inductor;

[0014] The second switch pin is used to electrically connect to the second terminal of the first inductor;

[0015] The first grounding pin is used for electrical connection with the grounding terminal;

[0016] The first output pin is used to electrically connect to the first input terminal of the display panel;

[0017] The first feedback pin is electrically connected to the first output pin;

[0018] Select pin, the select pin is used to be electrically connected to the ground terminal or left floating;

[0019] Wherein, the first power supply pin, the first switch pin, the first ground pin, the second switch pin, the first output pin, and the first feedback pin are arranged sequentially along a second preset direction; and / or, the first power supply pin, the first switch pin, the first ground pin, the second switch pin, the first output pin, and the selection pin are arranged sequentially along a second preset direction.

[0020] The second preset direction is perpendicular to the first preset direction.

[0021] In some embodiments of this disclosure, there are multiple first power supply pins, first switch pins, second switch pins, first ground pins, and first output pins; multiple first power supply pins with the same function are arranged sequentially along the first preset direction;

[0022] In the first preset direction, the first feedback pin and the selection pin are arranged sequentially.

[0023] In some embodiments of this disclosure, each of the second power supply pins includes:

[0024] The second power supply pin is used for electrical connection with the input power supply;

[0025] The third power supply pin is used to electrically connect to the input power supply;

[0026] The third switch pin is used to electrically connect to the first terminal of the second inductor;

[0027] The fourth switch pin is used for electrical connection with the first terminal of the third inductor;

[0028] The second grounding pin is used for electrical connection with the grounding terminal;

[0029] The second output pin is used to electrically connect to the second input terminal of the display panel;

[0030] The third output pin is used to electrically connect to the second input terminal of the display panel;

[0031] Wherein, the second end of the second inductor is electrically connected to the second end of the third inductor; the second power supply pin, the third switch pin, the second output pin, the third output pin, the fourth switch pin, and the third power supply pin are arranged sequentially along a second preset direction; the second ground pin and the second output pin and / or the third output pin are arranged sequentially along the first preset direction.

[0032] The second preset direction is perpendicular to the first preset direction.

[0033] In some embodiments of this disclosure, there are multiple second power supply pins, third power supply pins, third switch pins, fourth switch pins, second ground pins, second output pins, and third output pins; multiple second power supply pins with the same function are arranged sequentially along the first preset direction;

[0034] Among them, some of the second grounding pins and the second output pins are arranged sequentially along the first preset direction, and some of the second grounding pins and the third output pins are arranged sequentially along the first preset direction.

[0035] In some embodiments of this disclosure, the voltage conversion circuit further includes a third voltage conversion circuit, a fourth voltage conversion circuit, and a fifth voltage conversion circuit, all of which are used to power the display driver chip; the plurality of power supply pins include a plurality of third power supply pins of the third voltage conversion circuit, a plurality of fourth power supply pins of the fourth voltage conversion circuit, and a plurality of fifth power supply pins of the fifth voltage conversion circuit;

[0036] Each of the third power pins is located in the third sub-region of the first region, each of the fourth power pins is located in the fourth sub-region of the first region, and each of the fifth power pins is located in the fifth sub-region of the first region. The second region is located in the second preset direction between the third sub-region, the fourth sub-region, and the fifth sub-region.

[0037] In some embodiments of this disclosure, each of the third power supply pins includes:

[0038] The fifth switch pin is used to electrically connect to the first terminal of the fourth inductor;

[0039] The third grounding pin is used for electrical connection with the grounding terminal;

[0040] The fourth output pin is used to electrically connect to the first input terminal of the display driver chip;

[0041] The second end of the fourth inductor is used to be electrically connected to the input power supply; the fourth output pin, the fifth switch pin, and the third grounding pin are arranged sequentially along a first preset direction, which is perpendicular to the second preset direction.

[0042] In some embodiments of this disclosure, each of the fourth power pins includes:

[0043] The fourth power supply pin is used for electrical connection with the input power supply;

[0044] The sixth switch pin is used for electrical connection with the first terminal of the fifth inductor;

[0045] The fourth grounding pin is used for electrical connection with the grounding terminal;

[0046] The fifth output pin is used to electrically connect to both the second terminal of the fifth inductor and the second input terminal of the display driver chip;

[0047] The second feedback pin is electrically connected to the fifth output pin;

[0048] Enable pin, which is electrically connected to the fifth output pin;

[0049] A voltage regulating pin, which is electrically connected to the fifth output pin;

[0050] Specifically, the fourth power supply pin, the sixth switch pin, and the fourth ground pin are arranged sequentially along the first preset direction; the second feedback pin, the fifth output pin, and the enable pin are arranged sequentially along the first preset direction; the fourth power supply pin and the second feedback pin are arranged sequentially along the second preset direction; the sixth switch pin, the fifth output pin, and the voltage regulating pin are arranged sequentially along the second preset direction; and the fourth ground pin and the enable pin are arranged sequentially along the second preset direction.

[0051] The first preset direction is perpendicular to the second preset direction.

[0052] In some embodiments of this disclosure, each of the fifth power supply pins includes:

[0053] The fifth power supply pin is used for electrical connection with the input power supply;

[0054] The seventh switch pin is used to electrically connect to the first terminal of the sixth inductor;

[0055] The fifth grounding pin is used for electrical connection with the grounding terminal;

[0056] The sixth output pin is used to electrically connect to the third input terminal of the display driver chip;

[0057] The second end of the sixth inductor is used to be electrically connected to the grounding terminal; the fifth grounding pin, the sixth output pin, the seventh switch pin, and the fifth power supply pin are arranged sequentially along a first preset direction, which is perpendicular to the second preset direction.

[0058] In some embodiments of this disclosure, the plurality of control pins include:

[0059] A clock pin, which is used to electrically connect to the fourth input terminal of the display driver chip;

[0060] Data pin, the data pin being used for electrical connection with the fifth input terminal of the display driver chip;

[0061] Interrupt pin; the interrupt pin is used to electrically connect to the first input terminal of the second control circuit;

[0062] Reset pin; the reset pin is used for electrical connection with the second input terminal of the second control circuit.

[0063] The clock pin and the reset pin are arranged sequentially along a first preset direction, and the data pin and the interrupt pin are arranged sequentially along the first preset direction; the clock pin and the data pin are arranged sequentially along a second preset direction, and the first preset direction is perpendicular to the second preset direction.

[0064] In some embodiments of this disclosure, the power management chip further includes:

[0065] The sixth power supply pin is used for electrical connection with the input power supply;

[0066] The conversion pin is used for electrical connection with the input power supply.

[0067] The sixth grounding pin is used for electrical connection with the grounding terminal;

[0068] The seventh grounding pin is used for electrical connection with the grounding terminal;

[0069] The eighth grounding pin is used for electrical connection with the grounding terminal;

[0070] The sixth grounding pin, the conversion pin, and the sixth power supply pin are arranged sequentially along a first preset direction; the seventh grounding pin, the second region, and the sixth grounding pin are arranged sequentially along a second preset direction; and the eighth grounding pin and the sixth power supply pin are arranged sequentially along the second preset direction.

[0071] The first preset direction is perpendicular to the second preset direction.

[0072] According to a second aspect of this disclosure, an electronic device is provided, the electronic device including the power management chip as described above.

[0073] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:

[0074] The power management chip includes multiple power pins and multiple control pins. The power pins are located in a first region of the chip, and the control pins are located in a second region, with the first region surrounding the second region. By placing the power pins (with complex wiring) around the perimeter of the chip and the control pins (with simple wiring) in the center, the connection between the wiring and the chip is facilitated, thereby reducing the number of power pins and thus the size of the power management chip.

[0075] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0076] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the present invention and, together with the description, serve to explain the principles of the present invention.

[0077] Figure 1 This is a schematic diagram of the structure of a power management chip provided in an exemplary embodiment of the present disclosure;

[0078] Figure 2 This is a schematic diagram of the structure of a power management chip provided in another exemplary embodiment of this disclosure;

[0079] Figure 3 This is an equivalent circuit diagram of a power management chip;

[0080] Figure 4 This is a system block diagram of an electronic device provided in an exemplary embodiment of the present disclosure.

[0081] In the picture:

[0082] 10 - Power supply pin; 20 - Control pin; 400 - Electronic device; 402 - Processing component; 404 - Memory; 406 - Power supply component; 408 - Multimedia component; 410 - Audio component; 412 - Input / output interface; 414 - Sensor component; 416 - Communication component; 420 - Processor; S1 - First area; S2 - Second area; PVIN1 - First power supply pin; PVIN2A - Second power supply pin; PVIN2B - Third power supply pin; PVIN4 - Fourth power supply pin; PVIN5 - Fifth power supply pin; AVIN - Sixth power supply pin; SW1A - First switch pin; SW1B - Second switch pin; SW2A - Third switch pin; SW2B - Fourth switch pin; SW3 - Fifth switch pin; SW4 - Sixth switch pin; SW5 - Seventh switch pin; PGND1 - First ground pin; PGND2 - Second ground pin; PGND3 - Third ground pin; PGND 4 - Fourth ground pin; PGND5 - Fifth ground pin; AGND1 - Sixth ground pin; AGND2 - Seventh ground pin; AGND3 - Eighth ground pin; VO1 - First output pin; VO2A - Second output pin; VO2B - Third output pin; VO3 - Fourth output pin; VO4 - Fifth output pin; VO5 - Sixth output pin; FB1 - First feedback pin; FB2 - Second feedback pin; BOB - Select pin; EN - Enable pin; SEL - Voltage regulation pin; REGN - Conversion pin; SCL - Clock pin; SDA - Data pin; INT - Interrupt pin; RST - Reset pin; C - Filter capacitor; L1 - First inductor; L2 - Second inductor; L3 - Third inductor; L4 - Fourth inductor; L5 - Fifth inductor; L6 - Sixth inductor; GND - Ground terminal; Vin - Input power supply; PANEL - Display panel; DDIC - Display driver chip; AP - Application processor. Detailed Implementation

[0083] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this invention as detailed in the appended claims. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0084] Power management chips in electronic devices convert the voltage of the input power supply and output the converted voltage to the screen of the electronic device to power the screen. The screen requires various power supply voltages, such as digital voltage DVDD, analog voltage AVDD, pixel voltage VGL, positive voltage ELVDD, and negative voltage ELVSS.

[0085] In related technologies, a power management chip is provided, which includes multiple power pins and control pins to convert the input voltage of the input power supply into the five supply voltages mentioned above. However, due to the unreasonable layout of the power pins and control pins, some power pins are located in the center of the power management chip, making it difficult to connect the wiring to the power management chip. To reduce the complexity of the wiring, a large number of power pins in the power management chip are repeatedly placed, resulting in an increase in the size of the power management chip.

[0086] Based on this, the present disclosure provides a power management chip that places the power pins with complex connection lines around the periphery of the power management chip and the control pins with simple connection lines in the center of the power management chip. Compared with placing the power pins in the center of the power management chip, this facilitates the connection of the connection lines to the power management chip, thereby reducing the number of power pins and reducing the size of the power management chip.

[0087] An exemplary embodiment of this disclosure provides a power management chip, such as Figure 1 As shown, the power management chip includes multiple power pins 10 and multiple control pins 20. Each power pin 10 is a pin of a voltage conversion circuit, and each power pin 10 is located in the first region S1 of the power management chip. Each control pin 20 is a pin of a first control circuit, and each control pin 20 is located in the second region S2 of the power management chip. The first region S1 surrounds the second region S2.

[0088] In this embodiment, the power management chip includes multiple power pins and multiple control pins. The power pins are all located in a first region of the power management chip, and the control pins are located in a second region of the power management chip, with the first region surrounding the second region. By placing the power pins with complex wiring around the perimeter of the power management chip and the control pins with simple wiring in the center, the connection between the wiring and the power management chip is facilitated, thereby reducing the number of power pins and thus reducing the size of the power management chip.

[0089] For example, some power pins 10 are used to be electrically connected to the input power supply, some power pins 10 are used to be electrically connected to the display panel, and some power pins are used to be electrically connected to the display driver chip.

[0090] For example, some control pins 20 are used for electrical connection with the second control circuit, and some control pins 20 are used for electrical connection with the display driver chip.

[0091] In one embodiment, there are multiple voltage conversion circuits. The power supply pins 10 of the same voltage conversion circuit are arranged adjacent to each other.

[0092] In this embodiment, since there are multiple voltage conversion circuits, each of them can provide different power supply voltages, enabling the screen to operate normally and improving the reliability of the power management chip. Furthermore, by arranging the power pins of the same voltage conversion circuit adjacent to each other, the connection lines of the power pins of the same voltage conversion circuit are confined to a certain area, preventing the connection lines of the same voltage conversion circuit from crossing multiple areas, thus reducing the size of the power management chip.

[0093] In one embodiment, multiple power pins 10 with the same function are arranged adjacent to each other.

[0094] In this embodiment, since the current flowing through each power pin is limited, for voltage conversion circuits that carry large currents, some power pins need to be configured with multiple pins. By arranging multiple power pins with the same function adjacent to each other, it is easier to connect the wiring to the power pins, thereby reducing the size of the power management chip.

[0095] For example, at least some power pins can carry a current of 2A.

[0096] In one embodiment, the voltage conversion circuit includes a first voltage conversion circuit and a second voltage conversion circuit, both of which are used to power the display panel. The plurality of power pins 10 include a plurality of first power pins of the first voltage conversion circuit and a plurality of second power pins of the second voltage conversion circuit. Each first power pin is located in a first sub-region of the first region S1, and each second power pin is located in a second sub-region of the first region S1. The second region S2 is located between the first and second sub-regions in a first preset direction.

[0097] In this embodiment, since the display panel requires both positive and negative voltages for power supply, the first power pin converts the input voltage of the power supply into the positive voltage required by the display panel and supplies power to the display panel. The second power pin converts the input voltage of the power supply into the negative voltage required by the display panel and supplies power to the display panel so that the display panel can operate normally. Because the first and second power pins are respectively located in the edge area of ​​the power management chip, it facilitates the connection of wiring, reducing the number of power pins and thus reducing the size of the power management chip.

[0098] For example, the first preset direction can be a horizontal direction. The first preset direction can be from left to right or from right to left.

[0099] For example, the first voltage conversion circuit can be a Buck-Boost circuit (i.e., a BOB circuit), the second voltage conversion circuit can be a negative Buck-Boost circuit, and the second voltage conversion circuit can be a two-phase negative Buck-Boost circuit.

[0100] In one embodiment, such as Figure 2 and Figure 3 As shown, the first power supply pin includes a first power supply pin PVIN1, a first switch pin SW1A, a second switch pin SW1B, a first ground pin PGND1, a first output pin VO1, a first feedback pin FB1, and a selection pin BOB. The first power supply pin PVIN1 is electrically connected to the input power supply Vin. The first switch pin SW1A is electrically connected to the first terminal of the first inductor L1. The second switch pin SW1B is electrically connected to the second terminal of the first inductor L1. The first ground pin PGND1 is electrically connected to the ground terminal GND. The first output pin VO1 is electrically connected to the first input terminal of the display panel PANEL. The first feedback pin FB1 is electrically connected to the first output pin VO1. The first power supply pin PVIN1, the first switch pin SW1A, the first ground pin PGND1, the second switch pin SW1B, the first output pin VO1, and the first feedback pin FB1 are arranged sequentially along a second preset direction. The second preset direction is perpendicular to the first preset direction.

[0101] In this embodiment, since the input power supply can provide input voltage to the first voltage conversion circuit through the first power supply pin, the input voltage can be converted into a positive voltage after passing through the switches corresponding to the first and second switch pins and the first inductor, and then provided to the display panel to enable the display panel to operate normally, thereby improving the reliability of the power management chip. Furthermore, when the select pins are electrically connected to the ground terminal or floating, the first voltage conversion circuit can decrease or increase the input voltage to supply power to the display panel. Regardless of whether the input voltage of the input power supply is greater than the positive voltage required by the display panel, it can be converted into the positive voltage required by the display panel, thereby further improving the reliability of the power management chip. Simultaneously, since the first feedback pin is electrically connected to the first output pin, the first feedback pin can detect whether the output voltage of the first output pin meets the requirements and adjust the output voltage accordingly, thereby further improving the reliability of the power management chip. Furthermore, by arranging the first power supply pin, first switch pin, first ground pin, second switch pin, first output pin, and first feedback pin sequentially along a second preset direction, with all of these pins located at the edge of the power management chip, it is easier to connect the first power supply pin to the input power supply and the filter capacitor, the first and second switch pins to the first inductor, the first output pin to the filter capacitor, and the first feedback pin to the first output pin, thereby reducing the size of the power management chip.

[0102] For example, the second preset direction can be a vertical direction. The second preset direction can be a downward direction or a top-up direction.

[0103] In one embodiment, the first power supply pin PVIN1, the first switch pin SW1A, the first ground pin PGND1, the second switch pin SW1B, the first output pin VO1, and the selection pin BOB are arranged sequentially along a second preset direction.

[0104] In this embodiment, by arranging the first power supply pin, the first switch pin, the first ground pin, the second switch pin, the first output pin, and the first feedback pin sequentially along a second preset direction, and by placing the first power supply pin, the first switch pin, the first ground pin, the second switch pin, the first output pin, and the first feedback pin all in the edge region of the power management chip, it is convenient for the first power supply pin to be electrically connected to the input power supply and the filter capacitor, the first switch pin and the second switch pin to be electrically connected to the first inductor, and the first output pin to be electrically connected to the filter capacitor and the display panel. The selection pin is electrically connected to or left floating with the ground terminal, thereby reducing the size of the power management chip.

[0105] In one embodiment, there are multiple first power supply pins PVIN1, SW1A, SW1B, PGND1, and VO1. Multiple first power supply pins with the same function are arranged sequentially along a first preset direction. Specifically, in the first preset direction, the first feedback pin FB1 and the selection pin BOB are arranged sequentially.

[0106] In this embodiment, by providing multiple first power supply pins, first switch pins, second switch pins, first ground pins, and first output pins, multiple first power supply pins with the same function can evenly distribute the current, preventing damage to the power management chip and improving its reliability. Furthermore, since the connection lines for first power supply pins with the same function are identical, arranging multiple first power supply pins with the same function sequentially along a first preset direction facilitates the connection of the wiring and reduces the size of the power management chip.

[0107] For example, there are two first power supply pins PVIN1, SW1A, SW1B, PGND1, and VO1.

[0108] For example, the first power supply pin PVIN1 is electrically connected to both the first end of the filter capacitor C and the input power supply Vin, and the second end of the filter capacitor C is electrically connected to the ground terminal GND. The first output pin VO1 is electrically connected to both the first end of the filter capacitor C and the first input terminal of the display panel PANEL, and the second end of the filter capacitor C is electrically connected to the ground terminal GND.

[0109] In one embodiment, the second power supply pin includes a second power supply pin PVIN2A, a third power supply pin PVIN2B, a third switch pin SW2A, a fourth switch pin SW2B, a second ground pin PGND2, a second output pin VO2A, and a third output pin VO2B. The second power supply pin PVIN2A is electrically connected to the input power supply Vin. The third power supply pin PVIN2B is electrically connected to the input power supply Vin. The third switch pin SW2A is electrically connected to the first terminal of the second inductor L2. The fourth switch pin SW2B is electrically connected to the first terminal of the third inductor L3. The second ground pin PGND2 is electrically connected to the ground terminal GND. The second output pin VO2A is electrically connected to the second input terminal of the display panel PANEL. The third output pin VO2B is electrically connected to the second input terminal of the display panel PANEL. The second terminal of the second inductor L2 is electrically connected to the second terminal of the third inductor L3. The second power supply pin PVIN2A, the third switch pin SW2A, the second output pin VO2A, the third output pin VO2B, the fourth switch pin SW2B, and the third power supply pin PVIN2B are arranged sequentially along a second preset direction. The second ground pin PGND2 and the second output pin VO2A and / or the third output pin VO2B are arranged sequentially along a first preset direction. The second preset direction is perpendicular to the first preset direction.

[0110] In this embodiment, since the input power supply can provide input voltage to the second voltage conversion circuit through the second power supply pin and the third power supply pin, the input voltage can be converted into a negative voltage after passing through the switches corresponding to the third and fourth switch pins, the second inductor, and the third inductor, and is provided to the display panel to enable the display panel to operate normally, thereby improving the reliability of the power management chip. Furthermore, by arranging the second power supply pin, the third switch pin, the second output pin, the third output pin, the fourth switch pin, and the third power supply pin sequentially along a second preset direction, and by placing all three pins at the edge of the power management chip, it is convenient for the second and third power supply pins to be electrically connected to the input power supply and the filter capacitor, the second and third switch pins to be electrically connected to the first and second inductors, and the second and third output pins to be electrically connected to the filter capacitor and the display panel, thereby reducing the size of the power management chip.

[0111] In one embodiment, there are multiple second power supply pins PVIN2A, PVIN2B, SW2A, SW2B, PGND2, VO2A, and VO2B. Multiple second power supply pins with the same function are arranged sequentially along a first preset direction. Specifically, some of the second ground pins PGND2 and VO2A are arranged sequentially along the first preset direction, and some of the second ground pins PGND2 and VO2B are arranged sequentially along the first preset direction.

[0112] In this embodiment, by providing multiple second power supply pins, third power supply pins, third switch pins, fourth switch pins, second ground pins, second output pins, and third output pins, multiple second power supply pins with the same function can evenly distribute the current, preventing damage to the power management chip and improving its reliability. Furthermore, since the connection lines for second power supply pins with the same function are identical, arranging multiple second power supply pins with the same function sequentially along a first preset direction facilitates the connection of the wiring and reduces the size of the power management chip.

[0113] For example, the number of the second power supply pin PVIN2A, the third power supply pin PVIN2B, the third switch pin SW2A, the fourth switch pin SW2B, the second ground pin PGND2, the second output pin VO2A, and the third output pin VO2B are all 2.

[0114] For example, the second power supply pin PVIN2A is electrically connected to both the first terminal of the filter capacitor C and the input power supply Vin, and the second terminal of the filter capacitor C is electrically connected to the ground terminal GND. The second output pin VO2A is electrically connected to both the first terminal of the filter capacitor C and the second input terminal of the display panel PANEL, and the second terminal of the filter capacitor C is electrically connected to the ground terminal. The second terminals of the second inductor L2 and the third inductor L3 are both electrically connected to the ground terminal GND.

[0115] In one embodiment, the voltage conversion circuit further includes a third voltage conversion circuit, a fourth voltage conversion circuit, and a fifth voltage conversion circuit, all of which are used to supply power to the display driver chip DDIC. The plurality of power supply pins 10 include a plurality of third power supply pins of the third voltage conversion circuit, a plurality of fourth power supply pins of the fourth voltage conversion circuit, and a plurality of fifth power supply pins of the fifth voltage conversion circuit. Each third power supply pin is located in a third sub-region of the first region S1, each fourth power supply pin is located in a fourth sub-region of the first region S1, and each fifth power supply pin is located in a fifth sub-region of the first region S1. The second region S2 is located between the third, fourth, and fifth sub-regions in a second preset direction.

[0116] In this embodiment, since the display driver chip requires digital voltage, analog voltage, and pixel voltage for power supply, the third power pin converts the input voltage of the input power supply into the analog voltage required by the display driver chip and supplies power to the display driver chip. The fourth power pin converts the input voltage of the input power supply into the digital voltage required by the display driver chip and supplies power to the display driver chip. The fifth power pin converts the input voltage of the input power supply into the pixel voltage required by the display driver chip and supplies power to the display driver chip so that the display driver chip can operate normally. Since the third, fourth, and fifth power pins are respectively located in the edge area of ​​the power management chip, it is convenient to connect the wiring to reduce the number of power pins, thereby reducing the size of the power management chip.

[0117] For example, the third voltage conversion circuit can be a Boost circuit, the fourth voltage conversion circuit can be a Buck circuit, and the fifth voltage conversion circuit can be a negative Buck-Boost circuit.

[0118] In one embodiment, each third power supply pin includes a fifth switch pin SW3, a third ground pin PGND3, and a fourth output pin VO3. The fifth switch pin SW3 is electrically connected to the first terminal of the fourth inductor L4. The third ground pin PGND3 is electrically connected to the ground terminal GND. The fourth output pin VO3 is electrically connected to the first input terminal of the display driver chip DDIC. The second terminal of the fourth inductor L4 is electrically connected to the input power supply Vin. The fourth output pin VO3, the fifth switch pin SW3, and the third ground pin PGND3 are arranged sequentially along a first preset direction, which is perpendicular to a second preset direction.

[0119] In this embodiment, since the input power supply can provide input voltage to the third voltage conversion circuit through the fourth inductor, the input voltage can be converted into an analog voltage after passing through the fourth inductor and the switch corresponding to the fifth switch pin, and then provided to the display driver chip to enable the display driver chip to operate normally, thereby improving the reliability of the power management chip. Furthermore, by arranging the fourth output pin, the fifth switch pin, and the third ground pin sequentially along a first preset direction, all three pins are located in the edge region of the power management chip. This facilitates the electrical connection of the fifth switch pin with the fourth inductor, the filter capacitor, and the input power supply, as well as the electrical connection of the fourth output pin with the filter capacitor and the display driver chip, thereby reducing the size of the power management chip.

[0120] For example, the second terminal of the fourth inductor L4 is electrically connected to the first terminal of the filter capacitor C and the input power supply Vin, and the second terminal of the filter capacitor C is used to be electrically connected to the ground terminal GND. The fourth output pin VO3 is electrically connected to the first terminal of the filter capacitor C and the first input terminal of the display driver chip DDIC, and the second terminal of the filter capacitor C is used to be electrically connected to the ground terminal GND.

[0121] In one embodiment, each fourth power supply pin includes a fourth power supply pin PVIN4, a sixth switch pin SW4, a fourth ground pin PGND4, a fifth output pin VO4, a second feedback pin FB2, an enable pin EN, and a voltage regulation pin SEL. The fourth power supply pin PVIN4 is electrically connected to the input power supply Vin. The sixth switch pin SW4 is electrically connected to the first terminal of the fifth inductor L5. The fourth ground pin PGND4 is electrically connected to the ground terminal GND. The fifth output pin VO4 is electrically connected to both the second terminal of the fifth inductor L5 and the second input terminal of the display driver chip DDIC. The second feedback pin FB2 is electrically connected to the fifth output pin VO4. The enable pin EN is electrically connected to the fifth output pin VO4, and the voltage regulation pin SEL is electrically connected to the fifth output pin VO4. The fourth power supply pin PVIN4, the sixth switch pin SW4, and the fourth ground pin PGND4 are arranged sequentially along the first preset direction. The second feedback pin FB2, the fifth output pin VO4, and the enable pin EN are arranged sequentially along the first preset direction. The fourth power supply pin PVIN4 and the second feedback pin FB2 are arranged sequentially along the second preset direction. The sixth switch pin SW4, the fifth output pin VO4, and the voltage regulating pin SEL are arranged sequentially along the second preset direction. The fourth ground pin PGND4 and the enable pin EN are arranged sequentially along the second preset direction. The first preset direction is perpendicular to the second preset direction.

[0122] In this embodiment, the input power supply can provide input voltage to the fourth voltage conversion circuit through the fourth power supply pin. This input voltage, after passing through the switch corresponding to the sixth switch pin and the fifth inductor, can be converted into a digital voltage and supplied to the display driver chip to ensure its normal operation, thereby improving the reliability of the power management chip. Simultaneously, since the second feedback pin is electrically connected to the fifth output pin, the second feedback pin can detect whether the output voltage of the fifth output pin meets the requirements and adjust the output voltage accordingly, further improving the reliability of the power management chip. Furthermore, the select pin is electrically connected to the fifth output pin, allowing the select pin to adjust the output voltage level to meet the digital voltage requirements of display driver chips manufactured using different processes. By enabling the fourth voltage conversion circuit to prioritize power supply to the display driver chip through the enable pin, the feedback from the display driver chip can reflect whether the power management chip is functioning correctly, thus determining whether other voltage conversion circuits should supply power to the screen, thereby improving the reliability of the power management chip. Furthermore, the arrangement of the fourth power supply pin, the sixth switch pin, and the fifth output pin allows the fourth power supply pin and the sixth switch pin to be located at the edge of the power management chip, while the fifth output pin is also close to the edge. This facilitates electrical connections between the fourth power supply pin and the input power supply and filter capacitor, between the sixth switch pin and the fifth inductor, and between the fifth output pin and the fifth inductor and the current display driver chip, thereby reducing the size of the power management chip. In addition, since the second feedback pin and the voltage regulation pin both need to be electrically connected to the fifth output pin, placing the second feedback pin and the voltage regulation pin around the fifth output pin further reduces the size of the power management chip.

[0123] For example, the voltage output by the fifth output pin VO4 of the fourth voltage conversion circuit is different when the voltage regulating pin SEL receives a high level, a low level, or is floating.

[0124] For example, the fourth power supply pin PVIN4 is electrically connected to both the first terminal of the filter capacitor C and the input power supply Vin, and the second terminal of the filter capacitor C is electrically connected to the ground terminal GND. The second terminal of the fifth inductor L5 is electrically connected to both the first terminal of the filter capacitor C and the second input terminal of the display driver chip DDIC, and the second terminal of the filter capacitor C is electrically connected to the ground terminal GND.

[0125] In one embodiment, the fifth power supply pin includes a fifth power supply pin PVIN5, a seventh switch pin SW5, a fifth ground pin PGND5, and a sixth output pin VO5. The fifth power supply pin PVIN5 is electrically connected to the input power supply Vin. The seventh switch pin SW5 is electrically connected to the first terminal of the sixth inductor L6. The fifth ground pin PGND5 is electrically connected to the ground terminal GND. The sixth output pin VO5 is electrically connected to the third input terminal of the display driver chip DDIC. The second terminal of the sixth inductor L6 is electrically connected to the ground terminal GND. The fifth ground pin PGND5, the sixth output pin VO5, the seventh switch pin SW5, and the fifth power supply pin PVIN5 are arranged sequentially along a first preset direction. The first preset direction is perpendicular to a second preset direction.

[0126] In this embodiment, since the input power supply can provide input voltage to the fifth voltage conversion circuit through the fifth power supply pin, the input voltage can be converted into pixel voltage after passing through the switch corresponding to the seventh switch pin and the sixth inductor, and provided to the display driver chip to enable the display driver chip to operate normally, thereby improving the reliability of the power management chip. Moreover, by arranging the fifth ground pin, the sixth output pin, the seventh switch pin, and the fifth power supply pin sequentially along the first preset direction, the fifth ground pin, the sixth output pin, the seventh switch pin, and the fifth power supply pin are all located in the edge area of ​​the power management chip, which facilitates the electrical connection of the fifth power supply pin to the input power supply and the filter capacitor, the electrical connection of the seventh switch pin to the sixth inductor, and the electrical connection of the sixth output pin to the sixth inductor and the current display driver chip, thereby reducing the size of the power management chip.

[0127] For example, the fifth power supply pin PVIN5 is electrically connected to both the first terminal of the filter capacitor C and the input power supply Vin, and the second terminal of the filter capacitor C is electrically connected to the ground terminal GND. The second terminal of the sixth output pin VO5 is electrically connected to both the first terminal of the filter capacitor C and the third input terminal of the display driver chip DDIC, and the second terminal of the filter capacitor C is electrically connected to the ground terminal GND.

[0128] In one embodiment, the plurality of control pins include a clock pin SCL, a data pin SDA, an interrupt pin INT, and a reset pin RST. The clock pin SCL is electrically connected to the fourth input terminal of the display driver chip DDIC. The data pin SDA is electrically connected to the fifth input terminal of the display driver chip DDIC. The interrupt pin INT is electrically connected to the first input terminal of the second control circuit. The reset pin RST is electrically connected to the second input terminal of the second control circuit. The clock pin SCL and the reset pin RST are arranged sequentially along a first preset direction, and the data pin SDA and the interrupt pin INT are arranged sequentially along the same first preset direction. The clock pin SCL and the data pin SDA are arranged sequentially along a second preset direction, and the reset pin RST and the interrupt pin INT are arranged sequentially along the same second preset direction. The first preset direction is perpendicular to the second preset direction.

[0129] In this embodiment, the power management chip and the display driver chip can communicate via clock and data pins to control the power management chip, thereby improving the reliability of power management. Furthermore, when the power management chip malfunctions, the interrupt pin transmits an interrupt signal to the second control circuit, causing the second control circuit to reset the power management chip via the reset pin, thus enhancing the safety of the power management chip.

[0130] For example, the first control circuit includes circuitry for implementing communication, reset, and interrupt functions. The second control circuit includes an application processor (AP) of the electronic device.

[0131] In one embodiment, the power management chip further includes a sixth power supply pin AVIN, a conversion pin REGN, a sixth ground pin AGND1, a seventh ground pin AGND2, and an eighth ground pin AGND3. The sixth power supply pin AVIN is electrically connected to the input power supply Vin. The conversion pin REGN is electrically connected to the input power supply Vin. The sixth ground pin AGND1 is electrically connected to the ground terminal GND. The seventh ground pin AGND2 is electrically connected to the ground terminal GND. The eighth ground pin AGND3 is electrically connected to the ground terminal GND. The sixth ground pin AGND1, the conversion pin REGN, and the sixth power supply pin AVIN are arranged sequentially along a first preset direction. The seventh ground pin AGND2, the second region S2, and the sixth ground pin AGND1 are arranged sequentially along a second preset direction. The eighth ground pin AGND3 and the sixth power supply pin AVIN are arranged sequentially along the second preset direction. The first preset direction is perpendicular to the second preset direction.

[0132] In this embodiment, since the power management chip requires a corresponding voltage to power the analog circuit, the input voltage of the input power supply can be input to the power management chip through the sixth power supply pin, and the input voltage can be converted into a corresponding voltage through the corresponding circuit to power the analog circuit of the power management chip, thereby improving the reliability of the power management chip.

[0133] For example, the conversion pin REGN and the first terminal of the filter capacitor C are both electrically connected to the input power supply Vin. The second terminal of the filter capacitor C is used to electrically connect to the ground terminal GND.

[0134] An exemplary embodiment of this disclosure provides a power management chip, such as Figure 2 As shown, the power management chip has 49 pins arranged in 7 rows and 7 columns. The first row contains the following pins in sequence: first power supply pin PVIN1, fourth power supply pin PVIN4, sixth switch pin SW4, fourth ground pin PGND4, second power supply pin PVIN2A, and second power supply pin PVIN2A. The second row contains the following pins in sequence: first switch pin SW1A, second feedback pin FB2, fifth output pin VO4, enable pin EN, third switch pin SW2A, and third switch pin SW2A. The third row contains the following pins in sequence: first ground pin PGND1, seventh ground pin AGND2, voltage regulation pin SEL, second ground pin PGND2, second output pin VO2A, and second output pin VO2A. The fourth row sequentially lists the second switch pin SW1B, the second switch pin SW1B, the clock pin SCL, the reset pin RST, the second ground pin PGND2, the third output pin VO2B, and the third output pin VO2B. The fifth row sequentially lists the first output pin VO1, the first output pin VO1, the data pin SDA, the interrupt pin INT, the eighth ground pin AGND3, the fourth switch pin SW2B, and the fourth switch pin SW2B. The sixth row sequentially lists the first feedback pin FB1, the select pin BOB, the sixth ground pin AGND1, the conversion pin REGN, the sixth power supply pin AVIN, the third power supply pin PVIN2B, and the third power supply pin PVIN2B. The seventh row sequentially lists the fourth output pin VO3, the fifth switch pin SW3, the third ground pin PGND3, the fifth ground pin PGND5, the sixth output pin VO5, the seventh switch pin SW5, and the fifth power supply pin PVIN5.

[0135] For example, power management chips in related technologies have a total of 64 pins and a size of 10.89 mm², and can only output 4.6V or 2.8V voltage to the display panel, resulting in incompatibility. The power management chip of this disclosure reduces the total number of pins to 49 by rationally arranging the pins and selectively setting the number of power pins according to the current flow capability of the pins of different voltage conversion circuits. The size of the power management chip is reduced to 2.8 mm * 3.0 mm = 8.4 mm², reducing the chip size, and it can selectively output 4.6V and 2.8V voltage to the display panel, thus improving the compatibility of the power management chip. The maximum current flow of the pins of the power management chip of this disclosure is 2A, and the output voltage and current capability of the power management chip is improved by 20% compared to the power management chips in related technologies.

[0136] An exemplary embodiment of this disclosure provides an electronic device including a power management chip as described above.

[0137] refer to Figure 4 As shown, the electronic device 400 may include one or more of the following components: a processing component 402, a memory 404, a power supply component 406, a multimedia component 408, an audio component 410, an input / output (I / O) interface 412, a sensor component 414, and a communication component 416.

[0138] Processing component 402 typically controls the overall operation of electronic device 400, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 402 may include one or more processors 420 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 402 may include one or more modules to facilitate interaction between processing component 402 and other components. For example, processing component 402 may include a multimedia module to facilitate interaction between multimedia component 408 and processing component 402.

[0139] Memory 404 is configured to store various types of data to support the operation of electronic device 400. Examples of this data include instructions for any application or method operating on electronic device 400, contact data, phonebook data, messages, pictures, videos, etc. Memory 404 can be implemented by any type of volatile or non-volatile storage terminal or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0140] Power supply component 406 provides power to various components of electronic device 400. Power supply component 406 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 400.

[0141] Multimedia component 408 includes a screen that provides an output interface between electronic device 400 and user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 408 includes a front-facing camera module and / or a rear-facing camera module. When electronic device 400 is in an operating mode, such as shooting mode or video mode, the front-facing camera module and / or rear-facing camera module may receive external multimedia data. Each front-facing camera module and rear-facing camera module may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0142] Audio component 410 is configured to output and / or input audio signals. For example, audio component 410 includes a microphone (MIC) configured to receive external audio signals when electronic device 400 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 404 or transmitted via communication component 416. In some embodiments, audio component 410 also includes a speaker for outputting audio signals.

[0143] I / O interface 412 provides an interface between processing component 402 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0144] Sensor assembly 414 includes one or more sensors for providing state assessments of various aspects of electronic device 400. For example, sensor assembly 414 may detect the on / off state of electronic device 400, the relative positioning of components such as the display and keypad of electronic device 400, changes in position of electronic device 400 or a component of electronic device 400, the presence or absence of user contact with electronic device 400, orientation or acceleration / deceleration of electronic device 400, and temperature changes of electronic device 400. Sensor assembly 414 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 414 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 414 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0145] Communication component 416 is configured to facilitate wired or wireless communication between electronic device 400 and other terminals. Electronic device 400 can access wireless networks based on communication standards, such as WiFi, 2G, 3G, 4G, 5G, or combinations thereof. In one exemplary embodiment, communication component 416 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 416 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0146] In an exemplary embodiment, the electronic device 400 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing terminals (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0147] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0148] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0149] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the utility models disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0150] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A power management chip, characterized in that, The power management chip includes: Multiple power pins, each of which is a pin of a voltage conversion circuit, and each of which is located in the first region of the power management chip; Multiple control pins, each of which is a pin of the first control circuit, and each of which is located in the second region of the power management chip; The first region surrounds the second region.

2. The power management chip according to claim 1, characterized in that, The number of voltage conversion circuits is multiple; the power pins of the same voltage conversion circuit are arranged adjacent to each other; and / or, multiple power pins with the same function are arranged adjacent to each other.

3. The power management chip according to claim 1, characterized in that, The voltage conversion circuit includes a first voltage conversion circuit and a second voltage conversion circuit, both of which are used to power the display panel; the plurality of power supply pins include a plurality of first power supply pins of the first voltage conversion circuit and a plurality of second power supply pins of the second voltage conversion circuit; Each of the first power pins is located in a first sub-region of the first region, and each of the second power pins is located in a second sub-region of the first region; the second region is located between the first sub-region and the second sub-region in a first preset direction.

4. The power management chip according to claim 3, characterized in that, Each of the first power pins includes: The first power supply pin is used for electrical connection with the input power supply; The first switch pin is used to electrically connect to the first terminal of the first inductor; The second switch pin is used to electrically connect to the second terminal of the first inductor; The first grounding pin is used for electrical connection with the grounding terminal; The first output pin is used to electrically connect to the first input terminal of the display panel; The first feedback pin is electrically connected to the first output pin; Select pin, the select pin is used to be electrically connected to the ground terminal or left floating; Wherein, the first power supply pin, the first switch pin, the first ground pin, the second switch pin, the first output pin, and the first feedback pin are arranged sequentially along a second preset direction; and / or, the first power supply pin, the first switch pin, the first ground pin, the second switch pin, the first output pin, and the selection pin are arranged sequentially along a second preset direction. The second preset direction is perpendicular to the first preset direction.

5. The power management chip according to claim 4, characterized in that, The number of the first power supply pin, the first switch pin, the second switch pin, the first ground pin, and the first output pin are all multiple; the multiple first power supply pins with the same function are arranged sequentially along the first preset direction; In the first preset direction, the first feedback pin and the selection pin are arranged sequentially.

6. The power management chip according to claim 3, characterized in that, Each of the second power supply pins includes: The second power supply pin is used for electrical connection with the input power supply; The third power supply pin is used to electrically connect to the input power supply; The third switch pin is used to electrically connect to the first terminal of the second inductor; The fourth switch pin is used for electrical connection with the first terminal of the third inductor; The second grounding pin is used for electrical connection with the grounding terminal; The second output pin is used to electrically connect to the second input terminal of the display panel; The third output pin is used to electrically connect to the second input terminal of the display panel; Wherein, the second end of the second inductor is electrically connected to the second end of the third inductor; the second power supply pin, the third switch pin, the second output pin, the third output pin, the fourth switch pin, and the third power supply pin are arranged sequentially along a second preset direction; the second ground pin and the second output pin and / or the third output pin are arranged sequentially along the first preset direction. The second preset direction is perpendicular to the first preset direction.

7. The power management chip according to claim 6, characterized in that, The number of the second power supply pin, the third power supply pin, the third switch pin, the fourth switch pin, the second ground pin, the second output pin, and the third output pin are all multiple; the multiple second power supply pins with the same function are arranged sequentially along the first preset direction; Among them, some of the second grounding pins and the second output pins are arranged sequentially along the first preset direction, and some of the second grounding pins and the third output pins are arranged sequentially along the first preset direction.

8. The power management chip according to claim 1, characterized in that, The voltage conversion circuit further includes a third voltage conversion circuit, a fourth voltage conversion circuit, and a fifth voltage conversion circuit. The third voltage conversion circuit, the fourth voltage conversion circuit, and the fifth voltage conversion circuit are all used to supply power to the display driver chip. The plurality of power supply pins include a plurality of third power supply pins of the third voltage conversion circuit, a plurality of fourth power supply pins of the fourth voltage conversion circuit, and a plurality of fifth power supply pins of the fifth voltage conversion circuit. Each of the third power pins is located in the third sub-region of the first region, each of the fourth power pins is located in the fourth sub-region of the first region, and each of the fifth power pins is located in the fifth sub-region of the first region. The second region is located in the second preset direction between the third sub-region, the fourth sub-region, and the fifth sub-region.

9. The power management chip according to claim 8, characterized in that, Each of the aforementioned third power supply pins includes: The fifth switch pin is used to electrically connect to the first terminal of the fourth inductor; The third grounding pin is used for electrical connection with the grounding terminal; The fourth output pin is used to electrically connect to the first input terminal of the display driver chip; The second end of the fourth inductor is used to connect to the input power supply; the fourth output pin, the fifth switch pin, and the third grounding pin are arranged sequentially along a first preset direction, which is perpendicular to the second preset direction.

10. The power management chip according to claim 8, characterized in that, Each of the aforementioned fourth power pins includes: The fourth power supply pin is used for electrical connection with the input power supply; The sixth switch pin is used for electrical connection with the first terminal of the fifth inductor; The fourth grounding pin is used for electrical connection with the grounding terminal; The fifth output pin is used to electrically connect to both the second terminal of the fifth inductor and the second input terminal of the display driver chip; The second feedback pin is electrically connected to the fifth output pin; Enable pin, which is electrically connected to the fifth output pin; A voltage regulating pin, which is electrically connected to the fifth output pin; Specifically, the fourth power supply pin, the sixth switch pin, and the fourth ground pin are arranged sequentially along a first preset direction; the second feedback pin, the fifth output pin, and the enable pin are arranged sequentially along the first preset direction; the fourth power supply pin and the second feedback pin are arranged sequentially along a second preset direction; the sixth switch pin, the fifth output pin, and the voltage regulating pin are arranged sequentially along the second preset direction; and the fourth ground pin and the enable pin are arranged sequentially along the second preset direction. The first preset direction is perpendicular to the second preset direction.

11. The power management chip according to claim 8, characterized in that, Each of the fifth power pins includes: The fifth power supply pin is used for electrical connection with the input power supply; The seventh switch pin is used to electrically connect to the first terminal of the sixth inductor; The fifth grounding pin is used for electrical connection with the grounding terminal; The sixth output pin is used to electrically connect to the third input terminal of the display driver chip; The second end of the sixth inductor is used to be electrically connected to the grounding terminal; the fifth grounding pin, the sixth output pin, the seventh switch pin, and the fifth power supply pin are arranged sequentially along a first preset direction, which is perpendicular to the second preset direction.

12. The power management chip according to any one of claims 1 to 11, characterized in that, The plurality of control pins include: A clock pin, which is used to electrically connect to the fourth input terminal of the display driver chip; Data pin, the data pin being used for electrical connection with the fifth input terminal of the display driver chip; Interrupt pin; the interrupt pin is used to electrically connect to the first input terminal of the second control circuit; Reset pin; the reset pin is used for electrical connection with the second input terminal of the second control circuit. The clock pin and the reset pin are arranged sequentially along a first preset direction, and the data pin and the interrupt pin are arranged sequentially along the first preset direction; the clock pin and the data pin are arranged sequentially along a second preset direction, and the reset pin and the interrupt pin are arranged sequentially along the second preset direction, wherein the first preset direction is perpendicular to the second preset direction.

13. The power management chip according to any one of claims 1 to 11, characterized in that, The power management chip also includes: The sixth power supply pin is used for electrical connection with the input power supply; The conversion pin is used for electrical connection with the input power supply. The sixth grounding pin is used for electrical connection with the grounding terminal; The seventh grounding pin is used for electrical connection with the grounding terminal; The eighth grounding pin is used for electrical connection with the grounding terminal; The sixth grounding pin, the conversion pin, and the sixth power supply pin are arranged sequentially along a first preset direction; the seventh grounding pin, the second region, and the sixth grounding pin are arranged sequentially along a second preset direction; and the eighth grounding pin and the sixth power supply pin are arranged sequentially along the second preset direction. The first preset direction is perpendicular to the second preset direction.

14. An electronic device, characterized in that, The electronic device includes a power management chip as described in any one of claims 1 to 13.

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