Low-power dual power input protection circuit
Patent Information
- Application Number
- CN202522300409.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2025-08-19
- Filing Date
- 2025-10-30
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2035-10-30
AI Technical Summary
Existing dual-power-input protection circuits for small fixed-wing drones suffer from high power consumption, leading to reduced system reliability and increasing the risk of drone crashes during power failures.
A low-power dual-supply input protection circuit is adopted, which uses an NMOS switch and a control chip LM74610 to form an equivalent ideal diode circuit to replace the traditional diode, thereby realizing dual-supply redundant input and low-power characteristics. The power loss is significantly reduced through the conduction path of the NMOS transistor, and the circuit automatically switches to the auxiliary power supply when the main power supply fails.
It enables automatic switching in the event of a main power failure, ensuring the system continues to operate and preventing drone crashes. It also significantly reduces circuit power consumption and temperature rise, improving system reliability and redundancy.
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Figure CN224935430U_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuits, and more particularly to a low-power dual-supply input protection circuit. Background Technology
[0002] Currently, the drone industry is developing rapidly, and small fixed-wing drones have gained widespread attention in domestic and international markets in recent years. Several mature models of small fixed-wing drones have already been developed in China. To reduce costs, the internal electrical equipment of drones often uses a single power supply, resulting in low redundancy. Furthermore, with the development of anti-drone equipment such as high-power electromagnetic weapons, electromagnetically sensitive components such as power modules are prone to failure. Once the power supply fails, the drone will crash directly into the air, resulting in significant losses. Therefore, it is necessary to design redundant power supply circuits for fixed-wing drone equipment; dual power input is a commonly used solution.
[0003] However, conventional dual-power input protection circuits contain freewheeling diodes. During main power supply operation, these diodes generate voltage drops and power consumption, leading to energy loss and temperature rise, thus reducing system reliability. Therefore, designing low-power circuits while ensuring redundant power supply protection for the system is essential. Summary of the Invention
[0004] Purpose of the invention: The technical problem to be solved by the present invention is to provide a low-power dual-power input protection circuit that addresses the problems and shortcomings of the prior art.
[0005] To address the aforementioned technical problems, this invention discloses a low-power dual-supply input protection circuit, comprising a dual-input power supply circuit and an equivalent ideal diode circuit. The equivalent ideal diode circuit is connected in series in the dual power input protection circuit.
[0006] The dual power input protection circuit includes a grounding resistor R2, a PMOS transistor switch Q1, and a PMOS transistor switch Q2.
[0007] The equivalent ideal diode circuit includes an NMOS transistor switch Q3 and an NMOS control chip LM74610 SW1.
[0008] The low-power dual-supply input protection circuit is connected to dual power supplies V1 and V2. Under normal conditions without faults, the system is powered by power supply V1. If power supply V1 fails, the system automatically switches to power supply V2.
[0009] In this invention, preferably, the external power supplies V1 and V2 are DC power supplies, typically converted from lithium battery packs via a power module. These two power supplies have identical characteristics, with the same output voltage and load capacity. V1 is the primary power supply, and V2 is the auxiliary power supply. This power input protection circuit can be integrated into the control unit or any other electrical load. This circuit connects to both power supplies V1 and V2. Under normal circumstances, the system is powered by V1. In the event of a fault in V1, the system automatically switches to power supply V2, thus providing power redundancy protection.
[0010] In this invention, preferably, as a power input protection circuit, it can accept input voltages of conventional levels such as 3.3V, 5V, 12V, and 24V. The input voltage limit is determined by the voltage stress of the selected switching transistor; the input current limit is also determined by the current stress of the selected switching transistor. Specifically, the NMOS switch Q3 limits the voltage and current ranges of the main power supply V1; the PMOS switches Q1 and Q2 limit the voltage and current ranges of the auxiliary power supply V2. Generally, switches Q1 and Q2 are selected to be the same type. The output power supply is denoted as V. This circuit features low power consumption and almost no input loss.
[0011] In this invention, preferably, in order to reduce the power consumption of the power input circuit, an equivalent ideal diode circuit is constructed using an NMOS switch and a control chip LM74610; this circuit does not require power supply, can realize the function of an ideal diode, and has the characteristics of low voltage drop and low power consumption.
[0012] In this invention, preferably, to achieve a low-power dual-supply input protection circuit, the dual-supply input protection circuit is integrated with an equivalent ideal diode circuit; that is, the diode in the original circuit is replaced by an equivalent ideal diode circuit composed of an NMOS switch and an LM74610 control chip, thereby combining dual-supply redundant input and low-power characteristics. The working principle of the equivalent ideal diode circuit is as follows: 1) Start-up phase (T0): When initially powered on, the load current flows through the body diode of NMOS transistor Q3, generating a forward voltage drop (Vt), which is used to charge the charge pump capacitor (Vcap) to a high threshold of approximately 6.3V; 2) NMOS (T1): When Vcap voltage reaches 6.3V, the charge pump is turned off and NMOS transistor Q3 is turned on. At this time, the current flows through the low-resistance conduction path of NMOS transistor Q3, which significantly reduces power loss and the duty cycle is about 98%. When Vcap voltage drops to a low threshold (about 5.15V), NMOS transistor Q3 is turned off and the charge pump restarts to charge for the next cycle. 3) Reverse polarity protection: The LM74610-Q1 continuously monitors the voltage difference between the source and drain of the NMOS transistor Q3 through the ANODE and CATHODE pins. If a reverse voltage is detected (the threshold is about -20mV), the gate will be pulled down quickly (by a current of 160mA) to turn off the NMOS transistor Q3, thereby limiting the reverse current flow.
[0013] Based on the above process, the function of an ideal diode can be realized, thereby achieving low power consumption of the system. Beneficial effects
[0014] (1) Compared with the traditional power supply scheme for small UAVs, this scheme adds an auxiliary power supply as a backup for the main power supply. The dual-input circuit can ensure that the auxiliary power supply can continue to output in the event of failure of the main power supply, ensuring that the system continues to work and avoiding the possibility of UAV crashing due to power failure.
[0015] (2) Compared with the traditional redundant power supply circuit, this scheme uses an ideal equivalent diode circuit to replace the original diode circuit, thereby achieving low power consumption at the input and avoiding losses and temperature rise caused by diode voltage drop.
[0016] (3) Compared with the traditional power supply scheme for small UAV equipment, this scheme proposes a dual-input power protection circuit using an equivalent ideal diode, which improves system redundancy and ensures low power consumption of the power supply. Attached Figure Description
[0017] Figure 1 This is the complete circuit diagram of the present invention.
[0018] Figure 2 This is a functional diagram of the present invention.
[0019] Figure 3 This is a schematic diagram of the equivalent ideal diode of the present invention. Detailed Implementation
[0020] This embodiment is a low-power dual-supply input protection circuit for small unmanned aerial vehicle (UAV) control units: like Figure 1 As shown, a low-power dual-supply input protection circuit includes a dual-input power supply circuit and an equivalent ideal diode circuit. The equivalent ideal diode circuit is connected in series in the dual power input protection circuit; The dual power input protection circuit includes a grounding resistor R2, a PMOS transistor switch Q1, and a PMOS transistor switch Q2.
[0021] The equivalent ideal diode circuit includes an NMOS transistor switch Q3 and an NMOS control chip LM74610 SW1.
[0022] The low-power dual-power input protection circuit is connected to dual power supplies V1 and V2. Under normal power supply conditions without faults, the system is powered by power supply V1. If power supply V1 fails and cannot supply power, the system automatically switches to power supply V2.
[0023] External power supplies V1 and V2 are DC power supplies, typically converted from the drone's lithium battery pack via a power module. These two power supplies have identical characteristics, with the same output voltage and load capacity. V1 is the primary power supply, and V2 is the auxiliary power supply. This power input protection circuit can be integrated into the drone control unit or any other electrical load. This circuit connects to both power supplies V1 and V2. Under normal circumstances, the system is powered by V1. If V1 fails and cannot provide power, the system automatically switches to V2, thus providing power redundancy protection.
[0024] As a power input protection circuit, it can accept input voltages of conventional levels such as 3.3V, 5V, 12V, and 24V. The input voltage limit is determined by the voltage stress of the selected switching transistor; similarly, the input current limit is determined by the current stress of the selected switching transistor. Specifically, the NMOS switch Q3 limits the voltage and current ranges of the main power supply V1; the PMOS switches Q1 and Q2 limit the voltage and current ranges of the auxiliary power supply V2. Generally, switches Q1 and Q2 are selected in the same manner. The output power supply is denoted as V. This circuit features low power consumption and virtually no input loss.
[0025] To reduce the power consumption of the power input circuit, an equivalent ideal diode circuit is constructed using an NMOS switch and a control chip LM74610. This circuit does not require a power supply, can realize the function of an ideal diode, and has the characteristics of low voltage drop and low power consumption.
[0026] To implement a low-power dual-supply input protection circuit, the dual-supply input protection circuit is integrated with an equivalent ideal diode circuit; that is, the diode in the original circuit is replaced by an equivalent ideal diode circuit composed of an NMOS switch and an LM74610 control chip, thus combining dual-supply redundant input and low-power characteristics. The working principle of the equivalent ideal diode circuit is as follows: Figure 3 : 1) Start-up phase (T0): Upon initial power-up, the load current flows through the body diode of the external MOSFET, generating a forward voltage drop (Vt), which is used to charge the charge pump capacitor (Vcap) to a high threshold of approximately 6.3V; 2) NMOS (T1): When the Vcap voltage reaches 6.3V, the charge pump is turned off and the NMOS is turned on. At this time, the current flows through the low-resistance conduction path of the NMOS, which significantly reduces power loss and the duty cycle is about 98%. When the Vcap voltage drops to a low threshold (about 5.15V), the NMOS is turned off and the charge pump restarts to charge for the next cycle. 3) Reverse polarity protection: The LM74610-Q1 continuously monitors the voltage difference between the source and drain of the NMOS through the ANODE and CATHODE pins. If a reverse voltage is detected (the threshold is about -20mV), the gate will be pulled down quickly (by a current of 160mA) to turn off the NMOS, thereby limiting the reverse current flow.
[0027] Based on the above process, the function of an ideal diode can be realized, thereby achieving low power consumption of the system. The working process of the protection circuit is as follows: Step S1: Connect power supplies V1 and V2 to the system.
[0028] When the drone's electrical equipment is simultaneously connected to power supplies V1 and V2, since the voltages of V1 and V2 are equal, PMOS transistor Q1 is turned off, and V2 cannot supply power to the load. At this time, the system is powered by V1, the capacitor in the LM74610 chip charges, raising the gate level of NMOS transistor Q3, turning Q3 on, and power supply V1 is output to the load via Q3 (the working principle of an ideal equivalent diode circuit). Because NMOS transistors have a lower on-state voltage drop than diodes, the system power consumption is reduced. Step S2: Based on step S1, when the system is simultaneously connected to power supplies V1 and V2, the system supplies power to the load via Q3 from V1. After operating for a period of time, power supply V1 fails. When power supply V1 fails and cannot supply power, the voltage level at the V1 connection point is pulled down to 0V by the grounding resistor. At this time, the gate-source voltage Vgs of PMOS transistor Q1 is less than 0, and Q1 is turned on. Simultaneously, the gate of PMOS transistor Q2 is pulled down to 0V. Since the capacitor voltage cannot change abruptly, the load capacitor voltage, i.e., the source voltage of Q2, is still not high. At this time, Q2 is turned on. Thus, power supply V2 is transmitted to the output terminal V via PMOS transistors Q1 and Q2, realizing system power supply.
[0029] The described low-power dual-power input protection circuit can power the UAV control unit and provide redundant protection. In the event of a main power failure, it switches to auxiliary power supply to improve system power reliability. Furthermore, addressing the diode voltage drop and power consumption issues of traditional dual-power input protection circuits, an equivalent ideal diode replacement circuit is proposed and integrated into the original dual-power input circuit. Thus, a low-power dual-power input protection circuit is achieved. This invention provides a low-power dual-input power supply protection circuit. The above description is merely a specific embodiment of this invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of this invention, and these improvements and modifications should also be considered within the scope of protection of this invention. All components not explicitly stated in this embodiment can be implemented using existing technology.
Claims
1. A low-power dual-supply input protection circuit, characterized in that, Includes a dual-input power supply circuit and an equivalent ideal diode circuit; The equivalent ideal diode circuit is connected in series in the dual power input protection circuit; the equivalent ideal diode circuit includes an NMOS transistor Q3 and an NMOS control chip LM74610SW1; The control chip LM74610-Q1 of the equivalent ideal diode circuit continuously monitors the voltage difference between the source and drain of the NMOS transistor Q3 through the ANODE and CATHODE pins. If a reverse voltage is detected, the gate is quickly pulled down to turn off the NMOS transistor Q3 and limit the reverse current flow. The equivalent ideal diode circuit: When initially powered on, the load current flows through the body diode of NMOS transistor Q3, generating a forward voltage drop, which charges the charge pump capacitor C1 to a high threshold. When the voltage of the charge pump capacitor C1 reaches the threshold, the charge pump is turned off, and the NMOS transistor Q3 is turned on. Current flows through the low-resistance conduction path of the NMOS transistor Q3, reducing power loss. When the voltage of the charge pump capacitor C1 drops to the low threshold, the NMOS transistor Q3 is turned off, and the charge pump restarts to charge for the next cycle.
2. The low-power dual-supply input protection circuit according to claim 1, characterized in that, The dual power input protection circuit includes a grounding resistor R, a PMOS transistor Q1, and a PMOS transistor Q2.
3. The low-power dual-supply input protection circuit according to claim 1, characterized in that, The low-power dual power input protection circuit is connected to dual power supplies V1 and V2. When power supply V1 is supplying power normally, the system is powered by power supply V1. When power supply V1 fails to supply power, the system automatically switches to power supply V2.
4. The low-power dual-supply input protection circuit according to claim 3, characterized in that, When electrical equipment is connected to power supplies V1 and V2 simultaneously, the voltages of power supplies V1 and V2 are equal. At this time, PMOS transistor Q1 is turned off, and V2 cannot supply power to the load. The system is powered by V1, the capacitor of chip LM74610 is charged, which raises the gate level of NMOS transistor Q3, turns on NMOS transistor Q3, and power supply V1 is output to the load through NMOS transistor Q3.
5. A low-power dual-supply input protection circuit according to claim 4, characterized in that, When power supply V1 fails to supply power, the voltage level at the V1 connection point is pulled down to 0V by the grounding resistor, the gate-source voltage Vgs of PMOS transistor Q1 is less than 0, and PMOS transistor Q1 is turned on. At the same time, the gate of PMOS transistor Q2 is pulled down to 0V, and the voltage of the load capacitor C, i.e., the source voltage of PMOS transistor Q2, is still not high, so PMOS transistor Q2 is turned on. Power supply V2 is transmitted to the output terminal V through PMOS transistors Q1 and Q2 to realize system power supply.
6. A low-power dual-supply input protection circuit according to claim 4, characterized in that, External power supply V1 is the main power supply, and external power supply V2 is the auxiliary power supply.
7. A low-power dual-supply input protection circuit according to claim 6, characterized in that, Both external power supply V1 and external power supply V2 are DC power supplies.
